Changeset 89344d85 in mainline for arch/amd64/include/cpu.h

Timestamp:

2005-09-03T00:19:23Z (20 years ago)

Author:

Ondrej Palkovsky <ondrap@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

36b209a

Parents:

e4a6dda

Message:

Changes, that were needed to make it work on Bochs.

• We CAN use the NX bit in paging tables, but we have

to initialize the NXE bit in EFER register first.

File:

• arch/amd64/include/cpu.h (modified) (2 diffs)

arch/amd64/include/cpu.h

@@ -30 +30 @@
 #define __amd64_CPU_H__
 
-#include <config.h>
-#include <proc/thread.h>
+
+#define EFER_MSR_NUM    0xc0000080
+#define AMD_SCE_FLAG    0
+#define AMD_LME_FLAG    8
+#define AMD_LMA_FLAG    10
+#define AMD_FFXSR_FLAG  14
+#define AMD_NXE_FLAG    11
+
+#ifndef __ASM__
+
 #include <typedefs.h>
 #include <arch/pm.h>
-#include <arch/asm.h>
 
 struct cpu_arch {
@@ -45 +52 @@
 
 
-void set_TS_flag(void);
-void reset_TS_flag(void);
+extern void set_TS_flag(void);
+extern void reset_TS_flag(void);
+extern void set_efer_flag(int flag);
+extern __u64 read_efer_flag(void);
+
+#endif /* __ASM__ */
 
 #endif