Changeset 8565a42 in mainline for uspace/lib/c/arch/mips32/src/syscall.c
- Timestamp:
- 2018-03-02T20:34:50Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a1a81f69, d5e5fd1
- Parents:
- 3061bc1 (diff), 34e1206 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:34:50)
- git-committer:
- GitHub <noreply@…> (2018-03-02 20:34:50)
- File:
-
- 1 edited
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- Unmodified
- Added
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uspace/lib/c/arch/mips32/src/syscall.c
r3061bc1 r8565a42 46 46 register sysarg_t __mips_reg_t1 asm("$9") = p6; 47 47 register sysarg_t __mips_reg_v0 asm("$2") = id; 48 48 49 49 asm volatile ( 50 50 "syscall\n" … … 63 63 : "%ra" 64 64 ); 65 65 66 66 return __mips_reg_v0; 67 67 }
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