Changeset 8565a42 in mainline for uspace/lib/c/arch/arm32/src/syscall.c
- Timestamp:
- 2018-03-02T20:34:50Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a1a81f69, d5e5fd1
- Parents:
- 3061bc1 (diff), 34e1206 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:34:50)
- git-committer:
- GitHub <noreply@…> (2018-03-02 20:34:50)
- File:
-
- 1 edited
Legend:
- Unmodified
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uspace/lib/c/arch/arm32/src/syscall.c
r3061bc1 r8565a42 60 60 register sysarg_t __arm_reg_r5 asm("r5") = p6; 61 61 register sysarg_t __arm_reg_r6 asm("r6") = id; 62 62 63 63 asm volatile ( 64 64 "swi 0" … … 72 72 "r" (__arm_reg_r6) 73 73 ); 74 74 75 75 return __arm_reg_r0; 76 76 }
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