Changeset 8565a42 in mainline for kernel/arch/amd64/src

Timestamp:

2018-03-02T20:34:50Z (8 years ago)

Author:

GitHub <noreply@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a1a81f69, d5e5fd1

Parents:

3061bc1 (diff), 34e1206 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

git-author:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:34:50)

git-committer:

GitHub <noreply@…> (2018-03-02 20:34:50)

Message:

Remove all trailing whitespace, everywhere.

See individual commit messages for details.

Location:

kernel/arch/amd64/src

Files:

• amd64.c (modified) (5 diffs)
• asm.S (modified) (14 diffs)
• boot/multiboot.S (modified) (15 diffs)
• boot/multiboot2.S (modified) (15 diffs)
• boot/vesa_ret.inc (modified) (2 diffs)
• context.S (modified) (5 diffs)
• cpu/cpu.c (modified) (3 diffs)
• ddi/ddi.c (modified) (5 diffs)
• debug/stacktrace.c (modified) (2 diffs)
• delay.S (modified) (2 diffs)
• interrupt.c (modified) (8 diffs)
• mm/page.c (modified) (4 diffs)
• pm.c (modified) (5 diffs)
• smp/ap.S (modified) (4 diffs)
• syscall.c (modified) (1 diff)
• userspace.c (modified) (3 diffs)

kernel/arch/amd64/src/amd64.c

@@ -92 +92 @@
         multiboot_info_parse(signature, (multiboot_info_t *) info);
         multiboot2_info_parse(signature, (multiboot2_info_t *) info);
-        
+
 #ifdef CONFIG_SMP
         /* Copy AP bootstrap routines below 1 MB. */
@@ -106 +106 @@
         /* Enable FPU */
         cpu_setup_fpu();
-        
+
         /* Initialize segmentation */
         pm_init();
-        
+
         /* Disable I/O on nonprivileged levels, clear the nested-thread flag */
         write_rflags(read_rflags() & ~(RFLAGS_IOPL | RFLAGS_NT));
         /* Disable alignment check */
         write_cr0(read_cr0() & ~CR0_AM);
-        
+
         if (config.cpu_active == 1) {
                 interrupt_init();
                 bios_init();
-                
+
                 /* PIC */
                 i8259_init();
@@ -132 +132 @@
                 /* Initialize IRQ routing */
                 irq_init(IRQ_COUNT, IRQ_COUNT);
-                
+
                 /* hard clock */
                 i8254_init();
-                
+
 #if (defined(CONFIG_FB) || defined(CONFIG_EGA))
                 bool bfb = false;
 #endif
-                
+
 #ifdef CONFIG_FB
                 bfb = bfb_init();
 #endif
-                
+
 #ifdef CONFIG_EGA
                 if (!bfb) {
@@ -151 +151 @@
                 }
 #endif
-                
+
                 /* Merge all memory zones to 1 big zone */
                 zone_merge_all();
         }
-        
+
         /* Setup fast SYSCALL/SYSRET */
         syscall_setup_cpu();
@@ -235 +235 @@
         }
 #endif
-        
+
         if (irqs_info != NULL)
                 sysinfo_set_item_val(irqs_info, NULL, true);

kernel/arch/amd64/src/asm.S

@@ -60 +60 @@
 FUNCTION_BEGIN(memcpy_to_uspace)
         movq MEMCPY_DST, %rax
-        
+
         movq MEMCPY_SIZE, %rcx
         shrq $3, %rcx           /* size / 8 */
-        
+
         rep movsq               /* copy as much as possible word by word */
-        
+
         movq MEMCPY_SIZE, %rcx
         andq $7, %rcx           /* size % 8 */
         jz 0f
-        
+
         rep movsb               /* copy the rest byte by byte */
-        
+
         0:
                 ret                 /* return MEMCPY_SRC, success */
@@ -92 +92 @@
         popq %rax
         movq %rax, %rdx
-        
+
         /* Flip the ID bit */
         xorl $RFLAGS_ID, %edx
-        
+
         /* Store RFLAGS */
         pushq %rdx
         popfq
         pushfq
-        
+
         /* Get the ID bit again */
         popq %rdx
         andl $RFLAGS_ID, %eax
         andl $RFLAGS_ID, %edx
-        
+
         /* 0 if not supported, 1 if supported */
         xorl %edx, %eax
@@ -114 +114 @@
         /* Preserve %rbx across function calls */
         movq %rbx, %r10
-        
+
         /* Load the command into %eax */
         movl %edi, %eax
-        
+
         cpuid
         movl %eax, 0(%rsi)
@@ -123 +123 @@
         movl %ecx, 8(%rsi)
         movl %edx, 12(%rsi)
-        
+
         movq %r10, %rbx
         ret
@@ -161 +161 @@
          * code.
          */
-        
+
         .iflt \i-32
                 .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
@@ -180 +180 @@
                 subq $(ISTATE_SOFT_SIZE + 8), %rsp
         .endif
-        
+
         /*
          * Save the general purpose registers.
@@ -230 +230 @@
         movq $(\i), %rdi   /* pass intnum in the first argument */
         movq %rsp, %rsi    /* pass istate address in the second argument */
-        
+
         cld
 
@@ -250 +250 @@
         movq ISTATE_OFFSET_R10(%rsp), %r10
         movq ISTATE_OFFSET_R11(%rsp), %r11
-        
+
         /* $8 = Skip error word */
         addq $(ISTATE_SOFT_SIZE + 8), %rsp
@@ -288 +288 @@
         /* Switch to hidden %gs */
         swapgs
-        
+
         movq %rsp, %gs:KSEG_OFFSET_USTACK_RSP  /* save this thread's user RSP */
         movq %gs:KSEG_OFFSET_KSTACK_RSP, %rsp  /* set this thread's kernel RSP */
@@ -346 +346 @@
         swapgs
         sti
-        
+
         /* Copy the 4th argument where it is expected  */
         movq %r10, %rcx
@@ -364 +364 @@
 
         cli
-        
+
         /*
          * Restore registers needed for return via the SYSRET instruction and
@@ -394 +394 @@
         callq fault_from_uspace
         /* not reached */
-        
+
 bad_rip_msg:
         .asciz "Invalid instruction pointer."
@@ -414 +414 @@
 FUNCTION_BEGIN(early_putchar)
 #if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
-        
+
         /* Prologue, save preserved registers */
         pushq %rbp
         movq %rsp, %rbp
         pushq %rbx
-        
+
         movq %rdi, %rsi
         movq $(PA2KA(0xb8000)), %rdi  /* base of EGA text mode memory */
         xorl %eax, %eax
-        
+
         /* Read bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
         shl $8, %ax
-        
+
         /* Read bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
-        
+
         /* Sanity check for the cursor on screen */
         cmp $2000, %ax
         jb early_putchar_cursor_ok
-        
+
                 movw $1998, %ax
-        
+
         early_putchar_cursor_ok:
-        
+
         movw %ax, %bx
         shl $1, %rax
         addq %rax, %rdi
-        
+
         movq %rsi, %rax
-        
+
         cmp $0x0a, %al
         jne early_putchar_backspace
-        
+
                 /* Interpret newline */
-                
+
                 movw %bx, %ax  /* %bx -> %dx:%ax */
                 xorw %dx, %dx
-                
+
                 movw $80, %cx
                 idivw %cx, %ax  /* %dx = %bx % 80 */
-                
+
                 /* %bx <- %bx + 80 - (%bx % 80) */
                 addw %cx, %bx
                 subw %dx, %bx
-                
+
                 jmp early_putchar_skip
-        
+
         early_putchar_backspace:
-        
+
                 cmp $0x08, %al
                 jne early_putchar_print
-                
+
                 /* Interpret backspace */
-                
+
                 cmp $0x0000, %bx
                 je early_putchar_skip
-                
+
                 dec %bx
                 jmp early_putchar_skip
-        
+
         early_putchar_print:
-        
+
                 /* Print character */
-                
+
                 movb $0x0e, %ah  /* black background, yellow foreground */
                 stosw
                 inc %bx
-        
+
         early_putchar_skip:
-        
+
         /* Sanity check for the cursor on the last line */
         cmp $2000, %bx
         jb early_putchar_no_scroll
-        
+
                 /* Scroll the screen (24 rows) */
                 movq $(PA2KA(0xb80a0)), %rsi
@@ -504 +504 @@
                 movl $480, %ecx
                 rep movsq
-                
+
                 /* Clear the 24th row */
                 xorl %eax, %eax
                 movl $20, %ecx
                 rep stosq
-                
+
                 /* Go to row 24 */
                 movw $1920, %bx
-        
+
         early_putchar_no_scroll:
-        
+
         /* Write bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bh, %al
         outb %al, %dx
-        
+
         /* Write bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bl, %al
         outb %al, %dx
-        
+
         /* Epilogue, restore preserved registers */
         popq %rbx
         leave
-        
+
 #endif
-        
+
         ret
 FUNCTION_END(early_putchar)

kernel/arch/amd64/src/boot/multiboot.S

@@ -78 +78 @@
         cli
         cld
-        
+
         /* Initialize stack pointer */
         movl $START_STACK, %esp
-        
+
         /*
          * Initialize Global Descriptor Table and
@@ -88 +88 @@
         lgdtl bootstrap_gdtr
         lidtl bootstrap_idtr
-        
+
         /* Kernel data + stack */
         movw $GDT_SELECTOR(KDATA_DES), %cx
@@ -94 +94 @@
         movw %cx, %ds
         movw %cx, %ss
-        
+
         /*
          * Simics seems to remove hidden part of GS on entering user mode
@@ -102 +102 @@
         movw %cx, %fs
         movw %cx, %gs
-        
+
         jmpl $GDT_SELECTOR(KTEXT32_DES), $multiboot_meeting_point
         multiboot_meeting_point:
-        
+
         /*
          * Protected 32-bit. We want to reuse the code-seg descriptor,
          * the Default operand size must not be 1 when entering long mode.
          */
-        
+
         /* Save multiboot arguments */
         movl %eax, multiboot_eax
         movl %ebx, multiboot_ebx
-        
+
         pm_status $status_prot
-        
+
         movl $(INTEL_CPUID_EXTENDED), %eax
         cpuid
         cmp $(INTEL_CPUID_EXTENDED), %eax
         ja extended_cpuid_supported
-        
+
                 pm_error $err_extended_cpuid
-        
+
         extended_cpuid_supported:
-        
+
         movl $(AMD_CPUID_EXTENDED), %eax
         cpuid
         bt $(AMD_EXT_LONG_MODE), %edx
         jc long_mode_supported
-        
+
                 pm_error $err_long_mode
-        
+
         long_mode_supported:
-        
+
         bt $(AMD_EXT_NOEXECUTE), %edx
         jc noexecute_supported
-        
+
                 pm_error $err_noexecute
-        
+
         noexecute_supported:
-        
+
         movl $(INTEL_CPUID_STANDARD), %eax
         cpuid
         bt $(INTEL_FXSAVE), %edx
         jc fx_supported
-        
+
                 pm_error $err_fx
-        
+
         fx_supported:
-        
+
         bt $(INTEL_SSE2), %edx
         jc sse2_supported
-        
+
                 pm_error $err_sse2
-        
+
         sse2_supported:
-        
+
 #include "vesa_prot.inc"
-        
+
         pm2_status $status_prot2
-        
+
         /*
          * Enable 64-bit page translation entries - CR4.PAE = 1.
          * Paging is not enabled until after long mode is enabled.
          */
-        
+
         movl %cr4, %eax
         orl $CR4_PAE, %eax
         movl %eax, %cr4
-        
+
         /* Set up paging tables */
         leal ptl_0, %eax
         movl %eax, %cr3
-        
+
         /* Enable long mode */
         movl $AMD_MSR_EFER, %ecx
@@ -180 +180 @@
         orl $AMD_LME, %eax        /* set LME = 1 */
         wrmsr
-        
+
         /* Enable paging to activate long mode (set CR0.PG = 1) */
         movl %cr0, %eax
         orl $CR0_PG, %eax
         movl %eax, %cr0
-        
+
         /* At this point we are in compatibility mode */
         jmpl $GDT_SELECTOR(KTEXT_DES), $start64
@@ -204 +204 @@
         movl $0xb8000, %edi  /* base of EGA text mode memory */
         xorl %eax, %eax
-        
+
         /* Read bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
         shl $8, %ax
-        
+
         /* Read bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
-        
+
         /* Sanity check for the cursor on screen */
         cmp $2000, %ax
         jb err_cursor_ok
-        
+
                 movw $1998, %ax
-        
+
         err_cursor_ok:
-        
+
         movw %ax, %bx
         shl $1, %eax
         addl %eax, %edi
-        
+
         err_ploop:
                 lodsb
-                
+
                 cmp $0, %al
                 je err_ploop_end
-                
+
                 movb $0x0c, %ah  /* black background, light red foreground */
                 stosw
-                
+
                 /* Sanity check for the cursor on the last line */
                 inc %bx
                 cmp $2000, %bx
                 jb err_ploop
-                
+
                 /* Scroll the screen (24 rows) */
                 movl %esi, %edx
@@ -254 +254 @@
                 movl $960, %ecx
                 rep movsl
-                
+
                 /* Clear the 24th row */
                 xorl %eax, %eax
                 movl $40, %ecx
                 rep stosl
-                
+
                 /* Go to row 24 */
                 movl %edx, %esi
                 movl $0xb8f00, %edi
                 movw $1920, %bx
-                
+
                 jmp err_ploop
         err_ploop_end:
-        
+
         /* Write bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bh, %al
         outb %al, %dx
-        
+
         /* Write bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bl, %al
         outb %al, %dx
-        
+
         cli
         hlt1:
@@ -311 +311 @@
         pushl %edx
         pushl %edi
-        
+
         movl $0xb8000, %edi  /* base of EGA text mode memory */
         xorl %eax, %eax
-        
+
         /* Read bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
         shl $8, %ax
-        
+
         /* Read bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
-        
+
         /* Sanity check for the cursor on screen */
         cmp $2000, %ax
         jb pm_puts_cursor_ok
-        
+
                 movw $1998, %ax
-        
+
         pm_puts_cursor_ok:
-        
+
         movw %ax, %bx
         shl $1, %eax
         addl %eax, %edi
-        
+
         pm_puts_ploop:
                 lodsb
-                
+
                 cmp $0, %al
                 je pm_puts_ploop_end
-                
+
                 movb $0x0a, %ah  /* black background, light green foreground */
                 stosw
-                
+
                 /* Sanity check for the cursor on the last line */
                 inc %bx
                 cmp $2000, %bx
                 jb pm_puts_ploop
-                
+
                 /* Scroll the screen (24 rows) */
                 movl %esi, %edx
@@ -364 +364 @@
                 movl $960, %ecx
                 rep movsl
-                
+
                 /* Clear the 24th row */
                 xorl %eax, %eax
                 movl $40, %ecx
                 rep stosl
-                
+
                 /* Go to row 24 */
                 movl %edx, %esi
                 movl $0xb8f00, %edi
                 movw $1920, %bx
-                
+
                 jmp pm_puts_ploop
         pm_puts_ploop_end:
-        
+
         /* Write bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bh, %al
         outb %al, %dx
-        
+
         /* Write bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bl, %al
         outb %al, %dx
-        
+
         popl %edi
         popl %edx
@@ -401 +401 @@
         popl %ebx
         popl %eax
-        
+
         ret
 
@@ -414 +414 @@
 
 start64:
-        
+
         /*
          * Long mode.
          */
-        
+
         movq $(PA2KA(START_STACK)), %rsp
-        
+
         /* Create the first stack frame */
         pushq $0
         movq %rsp, %rbp
-        
+
         long_status $status_long
-        
+
         /* Call amd64_pre_main(multiboot_eax, multiboot_ebx) */
         movl multiboot_eax, %edi
         movl multiboot_ebx, %esi
-        
+
 #ifdef MEMORY_MODEL_large
         movabsq $amd64_pre_main, %rax
@@ -437 +437 @@
         callq amd64_pre_main
 #endif
-        
+
         long_status $status_main
-        
+
         /* Call main_bsp() */
 #ifdef MEMORY_MODEL_large
@@ -447 +447 @@
         callq main_bsp
 #endif
-        
+
         /* Not reached */
         cli
@@ -468 +468 @@
  */
 early_puts:
-        
+
 #if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
-        
+
         /* Prologue, save preserved registers */
         pushq %rbp
         movq %rsp, %rbp
         pushq %rbx
-        
+
         movq %rdi, %rsi
         movq $(PA2KA(0xb8000)), %rdi  /* base of EGA text mode memory */
         xorq %rax, %rax
-        
+
         /* Read bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
         shl $8, %ax
-        
+
         /* Read bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         inb %dx, %al
-        
+
         /* Sanity check for the cursor on screen */
         cmp $2000, %ax
         jb early_puts_cursor_ok
-        
+
                 movw $1998, %ax
-        
+
         early_puts_cursor_ok:
-        
+
         movw %ax, %bx
         shl $1, %rax
         addq %rax, %rdi
-        
+
         early_puts_ploop:
                 lodsb
-                
+
                 cmp $0, %al
                 je early_puts_ploop_end
-                
+
                 movb $0x0e, %ah  /* black background, yellow foreground */
                 stosw
-                
+
                 /* Sanity check for the cursor on the last line */
                 inc %bx
                 cmp $2000, %bx
                 jb early_puts_ploop
-                
+
                 /* Scroll the screen (24 rows) */
                 movq %rsi, %rdx
@@ -529 +529 @@
                 movl $480, %ecx
                 rep movsq
-                
+
                 /* Clear the 24th row */
                 xorl %eax, %eax
                 movl $20, %ecx
                 rep stosq
-                
+
                 /* Go to row 24 */
                 movq %rdx, %rsi
                 movq $(PA2KA(0xb8f00)), %rdi
                 movw $1920, %bx
-                
+
                 jmp early_puts_ploop
         early_puts_ploop_end:
-        
+
         /* Write bits 8 - 15 of the cursor address */
         movw $0x3d4, %dx
         movb $0xe, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bh, %al
         outb %al, %dx
-        
+
         /* Write bits 0 - 7 of the cursor address */
         movw $0x3d4, %dx
         movb $0xf, %al
         outb %al, %dx
-        
+
         movw $0x3d5, %dx
         movb %bl, %al
         outb %al, %dx
-        
+
         /* Epilogue, restore preserved registers */
         popq %rbx
         leave
-        
+
 #endif
-        
+
         ret
 

kernel/arch/amd64/src/boot/multiboot2.S

@@ -47 +47 @@
         .long multiboot2_header_end - multiboot2_header_start
         .long -(MULTIBOOT2_HEADER_MAGIC + MULTIBOOT2_HEADER_ARCH_I386 + (multiboot2_header_end - multiboot2_header_start))
-        
+
         /* Information request tag */
         .align 8
@@ -61 +61 @@
 #endif
         tag_info_req_end:
-        
+
         /* Address tag */
         .align 8
@@ -73 +73 @@
                 .long 0
         tag_address_end:
-        
+
         /* Entry address tag */
         .align 8
@@ -82 +82 @@
                 .long multiboot2_image_start
         tag_entry_address_end:
-        
+
         /* Flags tag */
         .align 8
@@ -91 +91 @@
                 .long MULTIBOOT2_FLAGS_CONSOLE
         tag_flags_end:
-        
+
 #ifdef CONFIG_FB
         /* Framebuffer tag */
@@ -104 +104 @@
         tag_framebuffer_end:
 #endif
-        
+
         /* Module alignment tag */
         .align 8
@@ -113 +113 @@
                 .long 0
         tag_module_align_end:
-        
+
         /* Tag terminator */
         .align 8
@@ -126 +126 @@
         cli
         cld
-        
+
         /* Initialize stack pointer */
         movl $START_STACK, %esp
-        
+
         /*
          * Initialize Global Descriptor Table and
@@ -136 +136 @@
         lgdtl bootstrap_gdtr
         lidtl bootstrap_idtr
-        
+
         /* Kernel data + stack */
         movw $GDT_SELECTOR(KDATA_DES), %cx
@@ -142 +142 @@
         movw %cx, %ds
         movw %cx, %ss
-        
+
         /*
          * Simics seems to remove hidden part of GS on entering user mode
@@ -150 +150 @@
         movw %cx, %fs
         movw %cx, %gs
-        
+
         jmpl $GDT_SELECTOR(KTEXT32_DES), $multiboot2_meeting_point
         multiboot2_meeting_point:
-        
+
         /*
          * Protected 32-bit. We want to reuse the code-seg descriptor,
          * the Default operand size must not be 1 when entering long mode.
          */
-        
+
         /* Save multiboot arguments */
         movl %eax, multiboot_eax
         movl %ebx, multiboot_ebx
-        
+
         movl $(INTEL_CPUID_EXTENDED), %eax
         cpuid
         cmp $(INTEL_CPUID_EXTENDED), %eax
         ja extended_cpuid_supported
-        
-                jmp pm_error_halt
-        
+
+                jmp pm_error_halt
+
         extended_cpuid_supported:
-        
+
         movl $(AMD_CPUID_EXTENDED), %eax
         cpuid
         bt $(AMD_EXT_LONG_MODE), %edx
         jc long_mode_supported
-        
-                jmp pm_error_halt
-        
+
+                jmp pm_error_halt
+
         long_mode_supported:
-        
+
         bt $(AMD_EXT_NOEXECUTE), %edx
         jc noexecute_supported
-        
-                jmp pm_error_halt
-        
+
+                jmp pm_error_halt
+
         noexecute_supported:
-        
+
         movl $(INTEL_CPUID_STANDARD), %eax
         cpuid
         bt $(INTEL_FXSAVE), %edx
         jc fx_supported
-        
-                jmp pm_error_halt
-        
+
+                jmp pm_error_halt
+
         fx_supported:
-        
+
         bt $(INTEL_SSE2), %edx
         jc sse2_supported
-        
-                jmp pm_error_halt
-        
+
+                jmp pm_error_halt
+
         sse2_supported:
-        
+
         /*
          * Enable 64-bit page translation entries - CR4.PAE = 1.
          * Paging is not enabled until after long mode is enabled.
          */
-        
+
         movl %cr4, %eax
         orl $CR4_PAE, %eax
         movl %eax, %cr4
-        
+
         /* Set up paging tables */
         leal ptl_0, %eax
         movl %eax, %cr3
-        
+
         /* Enable long mode */
         movl $AMD_MSR_EFER, %ecx
@@ -222 +222 @@
         orl $AMD_LME, %eax        /* set LME = 1 */
         wrmsr
-        
+
         /* Enable paging to activate long mode (set CR0.PG = 1) */
         movl %cr0, %eax
         orl $CR0_PG, %eax
         movl %eax, %cr0
-        
+
         /* At this point we are in compatibility mode */
         jmpl $GDT_SELECTOR(KTEXT_DES), $start64
@@ -240 +240 @@
 
 start64:
-        
+
         /*
          * Long mode.
          */
-        
+
         movq $(PA2KA(START_STACK)), %rsp
-        
+
         /* Create the first stack frame */
         pushq $0
         movq %rsp, %rbp
-        
+
         /* Call amd64_pre_main(multiboot_eax, multiboot_ebx) */
         movl multiboot_eax, %edi
         movl multiboot_ebx, %esi
-        
+
 #ifdef MEMORY_MODEL_large
         movabsq $amd64_pre_main, %rax
@@ -261 +261 @@
         callq amd64_pre_main
 #endif
-        
+
         /* Call main_bsp() */
 #ifdef MEMORY_MODEL_large
@@ -269 +269 @@
         callq main_bsp
 #endif
-        
+
         /* Not reached */
         cli

kernel/arch/amd64/src/boot/vesa_ret.inc

@@ -3 +3 @@
         cli
         cld
-        
+
         /* Initialize stack pointer */
         movl $START_STACK, %esp
-        
+
         /* Kernel data + stack */
         movw $GDT_SELECTOR(KDATA_DES), %cx
@@ -12 +12 @@
         movw %cx, %ds
         movw %cx, %ss
-        
+
         /*
          * Simics seems to remove hidden part of GS on entering user mode
          * when _visible_ part of GS does not point to user-mode segment.
          */
-        
+
         movw $GDT_SELECTOR(UDATA_DES), %cx
         movw %cx, %fs
         movw %cx, %gs
-        
+
         jmpl $GDT_SELECTOR(KTEXT32_DES), $vesa_meeting_point

kernel/arch/amd64/src/context.S

@@ -40 +40 @@
 FUNCTION_BEGIN(context_save_arch)
         movq (%rsp), %rdx     # the caller's return %rip
-        
+
         movq %rdx, CONTEXT_OFFSET_PC(%rdi)
         movq %rsp, CONTEXT_OFFSET_SP(%rdi)
-        
+
         movq %rbx, CONTEXT_OFFSET_RBX(%rdi)
         movq %rbp, CONTEXT_OFFSET_RBP(%rdi)
@@ -50 +50 @@
         movq %r14, CONTEXT_OFFSET_R14(%rdi)
         movq %r15, CONTEXT_OFFSET_R15(%rdi)
-        
+
 #ifdef MEMORY_MODEL_large
         movabsq $vreg_ptr, %rsi
@@ -59 +59 @@
         movq %fs:VREG_TP(%rsi), %rsi
         movq %rsi, CONTEXT_OFFSET_TP(%rdi)
-        
+
         xorl %eax, %eax       # context_save returns 1
         incl %eax
@@ -78 +78 @@
         movq CONTEXT_OFFSET_RBP(%rdi), %rbp
         movq CONTEXT_OFFSET_RBX(%rdi), %rbx
-        
+
         movq CONTEXT_OFFSET_SP(%rdi), %rsp
-        
+
         movq CONTEXT_OFFSET_PC(%rdi), %rdx
         movq %rdx, (%rsp)
-        
+
         movq CONTEXT_OFFSET_TP(%rdi), %rcx
 #ifdef MEMORY_MODEL_large
@@ -92 +92 @@
 #endif
         movq %rcx, %fs:VREG_TP(%rsi)
-        
+
         xorl %eax, %eax       # context_restore returns 0
         ret

kernel/arch/amd64/src/cpu/cpu.c

@@ -106 +106 @@
 {
         cpu_info_t info;
-        
+
         CPU->arch.vendor = VendorUnknown;
         if (has_cpuid()) {
                 cpuid(INTEL_CPUID_LEVEL, &info);
-                
+
                 /*
                  * Check for AMD processor.
@@ -119 +119 @@
                         CPU->arch.vendor = VendorAMD;
                 }
-                
+
                 /*
                  * Check for Intel processor.
@@ -128 +128 @@
                         CPU->arch.vendor = VendorIntel;
                 }
-                
+
                 cpuid(INTEL_CPUID_STANDARD, &info);
                 CPU->arch.family = (info.cpuid_eax >> 8) & 0xf;

kernel/arch/amd64/src/ddi/ddi.c

@@ -59 +59 @@
         /* First, copy the I/O Permission Bitmap. */
         irq_spinlock_lock(&TASK->lock, false);
-        
+
         size_t ver = TASK->arch.iomapver;
         size_t elements = TASK->arch.iomap.elements;
-        
+
         if (elements > 0) {
                 assert(TASK->arch.iomap.bits);
-                
+
                 bitmap_t iomap;
                 bitmap_initialize(&iomap, TSS_IOMAP_SIZE * 8,
                     CPU->arch.tss->iomap);
                 bitmap_copy(&iomap, &TASK->arch.iomap, elements);
-                
+
                 /*
                  * Set the trailing bits in the last byte of the map to disable
@@ -77 +77 @@
                 bitmap_set_range(&iomap, elements,
                     ALIGN_UP(elements, 8) - elements);
-                
+
                 /*
                  * It is safe to set the trailing eight bits because of the
@@ -84 +84 @@
                 bitmap_set_range(&iomap, ALIGN_UP(elements, 8), 8);
         }
-        
+
         irq_spinlock_unlock(&TASK->lock, false);
-        
+
         /*
          * Second, adjust TSS segment limit.
@@ -93 +93 @@
         ptr_16_64_t cpugdtr;
         gdtr_store(&cpugdtr);
-        
+
         descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
         size_t size = bitmap_size(elements);
         gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + size);
         gdtr_load(&cpugdtr);
-        
+
         /*
          * Before we load new TSS limit, the current TSS descriptor
@@ -106 +106 @@
         tss_desc->type = AR_TSS;
         tr_load(GDT_SELECTOR(TSS_DES));
-        
+
         /*
          * Update the generation count so that faults caused by

kernel/arch/amd64/src/debug/stacktrace.c

@@ -50 +50 @@
         uint64_t *stack = (void *) ctx->fp;
         *prev = stack[FRAME_OFFSET_FP_PREV];
-        
+
         return true;
 }
@@ -58 +58 @@
         uint64_t *stack = (void *) ctx->fp;
         *ra = stack[FRAME_OFFSET_RA];
-        
+
         return true;
 }

kernel/arch/amd64/src/delay.S

@@ -39 +39 @@
                 dec %rdi
                 jnz 0b
-        
+
         ret
 FUNCTION_END(asm_delay_loop)
@@ -47 +47 @@
                 dec %rdi
                 jz 0b
-        
+
         ret
 FUNCTION_END(asm_fake_loop)

kernel/arch/amd64/src/interrupt.c

@@ -70 +70 @@
             "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
             istate->cs, istate->rip, istate->rflags, istate->error_word);
-        
+
         if (istate_from_uspace(istate))
                 log_printf("ss =%0#18" PRIx64 "\n", istate->ss);
-        
+
         log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
             "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
             istate->rax, istate->rbx, istate->rcx, istate->rdx);
-        
+
         log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
             "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
@@ -83 +83 @@
             istate_from_uspace(istate) ? istate->rsp :
             (uintptr_t) &istate->rsp);
-        
+
         log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
             "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
             istate->r8, istate->r9, istate->r10, istate->r11);
-        
+
         log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
             "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
@@ -123 +123 @@
                 size_t ver = TASK->arch.iomapver;
                 irq_spinlock_unlock(&TASK->lock, false);
-                
+
                 if (CPU->arch.iomapver_copy != ver) {
                         /*
@@ -176 +176 @@
 {
         assert(n >= IVT_IRQBASE);
-        
+
         unsigned int inum = n - IVT_IRQBASE;
         bool ack = false;
         assert(inum < IRQ_COUNT);
         assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
-        
+
         irq_t *irq = irq_dispatch_and_lock(inum);
         if (irq) {
@@ -187 +187 @@
                  * The IRQ handler was found.
                  */
-                
+
                 if (irq->preack) {
                         /* Send EOI before processing the interrupt */
@@ -204 +204 @@
 #endif
         }
-        
+
         if (!ack)
                 trap_virtual_eoi();
@@ -212 +212 @@
 {
         unsigned int i;
-        
+
         for (i = 0; i < IVT_ITEMS; i++)
                 exc_register(i, "null", false, (iroutine_t) null_interrupt);
-        
+
         for (i = 0; i < IRQ_COUNT; i++) {
                 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
@@ -221 +221 @@
                             (iroutine_t) irq_interrupt);
         }
-        
+
         exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault);
         exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault);
         exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
         exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
-        
+
 #ifdef CONFIG_SMP
         exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,

kernel/arch/amd64/src/mm/page.c

@@ -57 +57 @@
         unsigned int identity_flags =
             PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE | PAGE_READ;
-                
+
         page_mapping_operations = &pt_mapping_operations;
-                
+
         page_table_lock(AS_KERNEL, true);
-                
+
         /*
          * PA2KA(identity) mapping for all low-memory frames.
@@ -68 +68 @@
             cur += FRAME_SIZE)
                 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, identity_flags);
-                
+
         page_table_unlock(AS_KERNEL, true);
-                
+
         exc_register(VECTOR_PF, "page_fault", true, (iroutine_t) page_fault);
         write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
@@ -78 +78 @@
 {
         uintptr_t badvaddr = read_cr2();
-        
+
         if (istate->error_word & PFERR_CODE_RSVD)
                 panic("Reserved bit set in page table entry.");
-        
+
         pf_access_t access;
-        
+
         if (istate->error_word & PFERR_CODE_RW)
                 access = PF_ACCESS_WRITE;
@@ -90 +90 @@
         else
                 access = PF_ACCESS_READ;
-        
+
         (void) as_page_fault(badvaddr, access, istate);
 }

kernel/arch/amd64/src/pm.c

@@ -130 +130 @@
 {
         tss_descriptor_t *td = (tss_descriptor_t *) d;
-        
+
         td->base_0_15 = base & 0xffffU;
         td->base_16_23 = ((base) >> 16) & 0xffU;
@@ -140 +140 @@
 {
         tss_descriptor_t *td = (tss_descriptor_t *) d;
-        
+
         td->limit_0_15 = limit & 0xffffU;
         td->limit_16_19 = (limit >> 16) & 0x0fU;
@@ -167 +167 @@
         idescriptor_t *d;
         unsigned int i;
-        
+
         for (i = 0; i < IDT_ITEMS; i++) {
                 d = &idt[i];
-                
+
                 d->unused = 0;
                 d->selector = GDT_SELECTOR(KTEXT_DES);
-                
+
                 d->present = 1;
                 d->type = AR_INTERRUPT;  /* masking interrupt */
         }
-        
+
         d = &idt[0];
         idt_setoffset(d++, (uintptr_t) &int_0);
@@ -252 +252 @@
         descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
         tss_descriptor_t *tss_desc;
-        
+
         /*
          * Each CPU has its private GDT and TSS.
          * All CPUs share one IDT.
          */
-        
+
         if (config.cpu_active == 1) {
                 idt_init();
@@ -270 +270 @@
                  * ahead of page_init */
                 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
-                
+
                 tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
                 if (!tss_p)
                         panic("Cannot allocate TSS.");
         }
-        
+
         tss_initialize(tss_p);
-        
+
         tss_desc = (tss_descriptor_t *) (&gdt_p[TSS_DES]);
         tss_desc->present = 1;
         tss_desc->type = AR_TSS;
         tss_desc->dpl = PL_KERNEL;
-        
+
         gdt_tss_setbase(&gdt_p[TSS_DES], (uintptr_t) tss_p);
         gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
-        
+
         gdtr_load(&gdtr);
         idtr_load(&idtr);

kernel/arch/amd64/src/smp/ap.S

@@ -55 +55 @@
         xorw %ax, %ax
         movw %ax, %ds
-        
+
         lgdtl ap_gdtr       # initialize Global Descriptor Table register
-        
+
         movl %cr0, %eax
         orl $CR0_PE, %eax
@@ -71 +71 @@
         movw $GDT_SELECTOR(UDATA_DES), %ax
         movw %ax, %gs
-        
+
         # Enable 64-bit page transaltion entries (CR4.PAE = 1).
         # Paging is not enabled until after long mode is enabled
-        
+
         movl %cr4, %eax
         orl $CR4_PAE, %eax
         movl %eax, %cr4
-        
+
         leal ptl_0, %eax
         movl %eax, %cr3
-        
+
         # Enable long mode
         movl $AMD_MSR_EFER, %ecx  # EFER MSR number
@@ -87 +87 @@
         orl $AMD_LME, %eax        # Set LME=1
         wrmsr                     # Write EFER
-        
+
         # Enable paging to activate long mode (set CR0.PG = 1)
         movl %cr0, %eax
         orl $CR0_PG, %eax
         movl %eax, %cr0
-        
+
         # At this point we are in compatibility mode
         jmpl $GDT_SELECTOR(KTEXT_DES), $start64 - BOOT_OFFSET + AP_BOOT_OFFSET
@@ -100 +100 @@
         movabsq $ctx, %rsp
         movq CONTEXT_OFFSET_SP(%rsp), %rsp
-        
+
         pushq $0
         movq %rsp, %rbp
-        
+
         movabsq $main_ap, %rax
         callq *%rax   # never returns

kernel/arch/amd64/src/syscall.c

@@ -51 +51 @@
 
         /* Setup syscall entry address */
-        
+
         /* This is _mess_ - the 64-bit CS is argument + 16,
          * the SS is argument + 8. The order is:

kernel/arch/amd64/src/userspace.c

@@ -49 +49 @@
 {
         uint64_t rflags = read_rflags();
-        
+
         rflags &= ~RFLAGS_NT;
         rflags |= RFLAGS_IF;
-        
+
         asm volatile (
                 "pushq %[udata_des]\n"
@@ -60 +60 @@
                 "pushq %[entry]\n"
                 "movq %[uarg], %%rax\n"
-                        
+
                 /* %rdi is defined to hold pcb_ptr - set it to 0 */
                 "xorq %%rdi, %%rdi\n"
@@ -73 +73 @@
                 : "rax"
         );
-        
+
         /* Unreachable */
         while (1);