Changeset 7fc78da in mainline for libc/arch/mips32/src/syscall.c
- Timestamp:
- 2006-03-13T20:53:02Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a19bdf8
- Parents:
- b419162
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
libc/arch/mips32/src/syscall.c
rb419162 r7fc78da 30 30 31 31 sysarg_t __syscall(const sysarg_t p1, const sysarg_t p2, 32 const sysarg_t p3, const syscall_t id) 32 const sysarg_t p3, const sysarg_t p4, 33 const syscall_t id) 33 34 { 34 35 register sysarg_t __mips_reg_a0 asm("$4") = p1; 35 36 register sysarg_t __mips_reg_a1 asm("$5") = p2; 36 37 register sysarg_t __mips_reg_a2 asm("$6") = p3; 37 register sysarg_t __mips_reg_a3 asm("$7") = id; 38 register sysarg_t __mips_reg_a3 asm("$7") = p4; 39 register sysarg_t __mips_reg_t0 asm("$8") = id; 38 40 register sysarg_t __mips_reg_v0 asm("$2"); 39 41 … … 44 46 "r" (__mips_reg_a1), 45 47 "r" (__mips_reg_a2), 46 "r" (__mips_reg_a3) 48 "r" (__mips_reg_a3), 49 "r" (__mips_reg_t0) 47 50 ); 48 51
Note:
See TracChangeset
for help on using the changeset viewer.