Changeset 7f1c620 in mainline for arch/ia32/include/asm.h


Ignore:
Timestamp:
2006-07-04T17:17:56Z (19 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
0ffa3ef5
Parents:
991779c5
Message:

Replace old u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.).

File:
1 edited

Legend:

Unmodified
Added
Removed

  • arch/ia32/include/asm.h

    r991779c5 r7f1c620  
    4141#include <config.h>
    4242
    43 extern __u32 interrupt_handler_size;
     43extern uint32_t interrupt_handler_size;
    4444
    4545extern void paging_on(void);
    … …  
    5050
    5151
    52 extern void asm_delay_loop(__u32 t);
    53 extern void asm_fake_loop(__u32 t);
     52extern void asm_delay_loop(uint32_t t);
     53extern void asm_fake_loop(uint32_t t);
    5454
    5555
    … …  
    6161static inline void cpu_sleep(void) { __asm__("hlt\n"); };
    6262
    63 #define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \
     63#define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
    6464    { \
    65         __native res; \
     65        unative_t res; \
    6666        __asm__ volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
    6767        return res; \
    6868    }
    6969
    70 #define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \
     70#define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
    7171    { \
    7272        __asm__ volatile ("movl %0, %%" #reg : : "r" (regn)); \
    … …  
    9999 * @param val Value to write
    100100 */
    101 static inline void outb(__u16 port, __u8 val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
     101static inline void outb(uint16_t port, uint8_t val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
    102102
    103103/** Word to port
    … …  
    108108 * @param val Value to write
    109109 */
    110 static inline void outw(__u16 port, __u16 val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
     110static inline void outw(uint16_t port, uint16_t val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
    111111
    112112/** Double word to port
    … …  
    117117 * @param val Value to write
    118118 */
    119 static inline void outl(__u16 port, __u32 val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
     119static inline void outl(uint16_t port, uint32_t val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
    120120
    121121/** Byte from port
    … …  
    126126 * @return Value read
    127127 */
    128 static inline __u8 inb(__u16 port) { __u8 val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
     128static inline uint8_t inb(uint16_t port) { uint8_t val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
    129129
    130130/** Word from port
    … …  
    135135 * @return Value read
    136136 */
    137 static inline __u16 inw(__u16 port) { __u16 val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
     137static inline uint16_t inw(uint16_t port) { uint16_t val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
    138138
    139139/** Double word from port
    … …  
    144144 * @return Value read
    145145 */
    146 static inline __u32 inl(__u16 port) { __u32 val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
     146static inline uint32_t inl(uint16_t port) { uint32_t val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
    147147
    148148/** Enable interrupts.
    … …  
    220220 * The stack must start on page boundary.
    221221 */
    222 static inline __address get_stack_base(void)
    223 {
    224         __address v;
     222static inline uintptr_t get_stack_base(void)
     223{
     224        uintptr_t v;
    225225       
    226226        __asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
    … …  
    229229}
    230230
    231 static inline __u64 rdtsc(void)
    232 {
    233         __u64 v;
     231static inline uint64_t rdtsc(void)
     232{
     233        uint64_t v;
    234234       
    235235        __asm__ volatile("rdtsc\n" : "=A" (v));
    … …  
    239239
    240240/** Return current IP address */
    241 static inline __address * get_ip()
    242 {
    243         __address *ip;
     241static inline uintptr_t * get_ip()
     242{
     243        uintptr_t *ip;
    244244
    245245        __asm__ volatile (
    … …  
    254254 * @param addr Address on a page whose TLB entry is to be invalidated.
    255255 */
    256 static inline void invlpg(__address addr)
    257 {
    258         __asm__ volatile ("invlpg %0\n" :: "m" (*(__native *)addr));
     256static inline void invlpg(uintptr_t addr)
     257{
     258        __asm__ volatile ("invlpg %0\n" :: "m" (*(unative_t *)addr));
    259259}
    260260
    … …  
    290290 * @param sel Selector specifying descriptor of TSS segment.
    291291 */
    292 static inline void tr_load(__u16 sel)
     292static inline void tr_load(uint16_t sel)
    293293{
    294294        __asm__ volatile ("ltr %0" : : "r" (sel));
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