Changeset 771cd22 in mainline for kernel/arch/sparc64/src/mm/page.c
- Timestamp:
- 2006-12-16T19:07:02Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 7e7c8747
- Parents:
- 1ecdbb0
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/mm/page.c
r1ecdbb0 r771cd22 46 46 /** Entries locked in DTLB of BSP. 47 47 * 48 * Application processors need to have the same locked entries 49 * in their DTLBs asthe bootstrap processor.48 * Application processors need to have the same locked entries in their DTLBs as 49 * the bootstrap processor. 50 50 */ 51 51 static struct { … … 85 85 /** Map memory-mapped device into virtual memory. 86 86 * 87 * So far, only DTLB is used to map devices into memory. 88 * Chances are that there will be only a limited amount of89 * devices that the kernel itself needs tolock in DTLB.87 * So far, only DTLB is used to map devices into memory. Chances are that there 88 * will be only a limited amount of devices that the kernel itself needs to 89 * lock in DTLB. 90 90 * 91 * @param physaddr Physical address of the page where the 92 * device is located. Must be at least 93 * page-aligned. 94 * @param size Size of the device's registers. Must not 95 * exceed 4M and must include extra space 96 * caused by the alignment. 91 * @param physaddr Physical address of the page where the device is located. 92 * Must be at least page-aligned. 93 * @param size Size of the device's registers. Must not exceed 4M and must 94 * include extra space caused by the alignment. 97 95 * 98 * @return Virtual address of the page where the device is 99 * mapped. 96 * @return Virtual address of the page where the device is mapped. 100 97 */ 101 98 uintptr_t hw_map(uintptr_t physaddr, size_t size) … … 115 112 { PAGESIZE_8K, PAGE_SIZE, 4 }, /* 32K */ 116 113 { PAGESIZE_64K, 0, 1}, /* 64K */ 117 { PAGESIZE_64K, 8 *PAGE_SIZE, 2 }, /* 128K */118 { PAGESIZE_64K, 8 *PAGE_SIZE, 4 }, /* 256K */114 { PAGESIZE_64K, 8 * PAGE_SIZE, 2 }, /* 128K */ 115 { PAGESIZE_64K, 8 * PAGE_SIZE, 4 }, /* 256K */ 119 116 { PAGESIZE_512K, 0, 1 }, /* 512K */ 120 { PAGESIZE_512K, 64 *PAGE_SIZE, 2 }, /* 1M */121 { PAGESIZE_512K, 64 *PAGE_SIZE, 4 }, /* 2M */117 { PAGESIZE_512K, 64 * PAGE_SIZE, 2 }, /* 1M */ 118 { PAGESIZE_512K, 64 * PAGE_SIZE, 4 }, /* 2M */ 122 119 { PAGESIZE_4M, 0, 1 }, /* 4M */ 123 { PAGESIZE_4M, 512 *PAGE_SIZE, 2 } /* 8M */120 { PAGESIZE_4M, 512 * PAGE_SIZE, 2 } /* 8M */ 124 121 }; 125 122 126 123 ASSERT(ALIGN_UP(physaddr, PAGE_SIZE) == physaddr); 127 ASSERT(size <= 8 *1024*1024);124 ASSERT(size <= 8 * 1024 * 1024); 128 125 129 126 if (size <= FRAME_SIZE) … … 145 142 * First, insert the mapping into DTLB. 146 143 */ 147 dtlb_insert_mapping(virtaddr + i *sizemap[order].increment,148 physaddr + i*sizemap[order].increment,149 144 dtlb_insert_mapping(virtaddr + i * sizemap[order].increment, 145 physaddr + i * sizemap[order].increment, 146 sizemap[order].pagesize_code, true, false); 150 147 151 148 #ifdef CONFIG_SMP … … 154 151 */ 155 152 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page = 156 virtaddr + i *sizemap[order].increment;153 virtaddr + i * sizemap[order].increment; 157 154 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page = 158 physaddr + i *sizemap[order].increment;155 physaddr + i * sizemap[order].increment; 159 156 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code = 160 157 sizemap[order].pagesize_code;
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