Changeset 75e1db0 in mainline for arch/sparc64/include/register.h


Ignore:
Timestamp:
2005-12-19T22:41:07Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d6e8529
Parents:
031e264
Message:

sparc64 work.
Implement interrupt_disable(), interrupt_enable(), interrupt_restore() and interrupt_read() functions.
Fix context save/restore to save/restore register %i7.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • arch/sparc64/include/register.h

    r031e264 r75e1db0  
    4747typedef union ver_reg ver_reg_t;
    4848
     49/** Processor State Register. */
     50union pstate_reg {
     51        __u64 value;
     52        struct {
     53                __u64 : 52;
     54                unsigned ig : 1;        /**< Interrupt Globals. */
     55                unsigned mg : 1;        /**< MMU Globals. */
     56                unsigned cle : 1;       /**< Current Little Endian. */
     57                unsigned tle : 1;       /**< Trap Little Endian. */
     58                unsigned mm : 2;        /**< Memory Model. */
     59                unsigned red : 1;       /**< RED state. */
     60                unsigned pef : 1;       /**< Enable floating-point. */
     61                unsigned am : 1;        /**< 32-bit Address Mask. */
     62                unsigned priv : 1;      /**< Privileged Mode. */
     63                unsigned ie : 1;        /**< Interrupt Enable. */
     64                unsigned ag : 1;        /**< Alternate Globals*/
     65        } __attribute__ ((packed));
     66};
     67typedef union pstate_reg pstate_reg_t;
     68
    4969#endif
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