Changeset 73a4bab in mainline for arch/mips32

Timestamp:

2005-11-11T14:06:55Z (20 years ago)

Author:

Jakub Vana <jakub.vana@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8a0b3730

Parents:

0172eba

Message:

Atomic inc & dec functions synchronized on all ia32,ia64 and mips platforms. Now there are 3 versions which returns no value, new value and old value och changed variable.

File:

• arch/mips32/include/atomic.h (modified) (3 diffs)

arch/mips32/include/atomic.h

@@ -35 +35 @@
 #define atomic_dec(x)   (a_sub(x,1))
 
+#define atomic_inc_pre(x) (a_add(x,1)-1)
+#define atomic_dec_pre(x) (a_sub(x,1)+1)
+
+#define atomic_inc_post(x) (a_add(x,1))
+#define atomic_dec_post(x) (a_sub(x,1))
+
+
 typedef volatile __u32 atomic_t;
 
@@ -45 +52 @@
  * of the variable to a special register and if another process writes to
  * the same location, the SC (store-conditional) instruction fails.
+ 
+ Returns (*val)+i
+ 
  */
 static inline atomic_t a_add(atomic_t *val, int i)
@@ -73 +83 @@
  *
  * Implemented in the same manner as a_add, except we substract the value.
+
+ Returns (*val)-i
+
  */
 static inline atomic_t a_sub(atomic_t *val, int i)