Changeset 72bf0d2 in mainline for kernel/arch/sparc64/src
- Timestamp:
- 2010-02-22T21:24:19Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 850987d
- Parents:
- 61001a9 (diff), f8f7dba (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- kernel/arch/sparc64/src
- Files:
-
- 4 added
- 3 edited
- 2 moved
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/cpu/sun4v/cpu.c
r61001a9 r72bf0d2 41 41 #include <arch/sun4v/md.h> 42 42 #include <arch/sun4v/hypercall.h> 43 44 //#include <arch/trap/sun4v/interrupt.h> 43 #include <arch/trap/sun4v/interrupt.h> 45 44 46 45 /** Perform sparc64 specific initialization of the processor structure for the … … 74 73 75 74 tick_init(); 76 //MH - uncomment later 77 //sun4v_ipi_init();75 76 sun4v_ipi_init(); 78 77 } 79 78 … … 96 95 { 97 96 printf("cpu%d: Niagara (%d MHz)\n", m->id, 98 97 m->arch.clock_frequency / 1000000); 99 98 } 100 99 -
kernel/arch/sparc64/src/smp/sun4u/ipi.c
r61001a9 r72bf0d2 99 99 status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0); 100 100 if (status & INTR_DISPATCH_STATUS_BUSY) 101 panic("Interrupt Dispatch Status busy bit set .");101 panic("Interrupt Dispatch Status busy bit set\n"); 102 102 103 103 ASSERT(!(pstate_read() & PSTATE_IE_BIT)); … … 152 152 break; 153 153 default: 154 panic("Unknown IPI (%d). ", ipi);154 panic("Unknown IPI (%d).\n", ipi); 155 155 break; 156 156 } -
kernel/arch/sparc64/src/smp/sun4u/smp.c
r61001a9 r72bf0d2 62 62 { 63 63 ofw_tree_node_t *node; 64 size_t cnt = 0;64 unsigned int cnt = 0; 65 65 66 66 if (is_us() || is_us_iii()) { -
kernel/arch/sparc64/src/trap/interrupt.c
r61001a9 r72bf0d2 1 1 /* 2 2 * Copyright (c) 2005 Jakub Jermar 3 * Copyright (c) 2009 Pavel Rimsky 3 4 * All rights reserved. 4 5 * … … 34 35 35 36 #include <arch/interrupt.h> 37 #include <arch/trap/interrupt.h> 36 38 #include <arch/sparc64.h> 37 #include <arch/trap/interrupt.h>38 39 #include <interrupt.h> 39 40 #include <ddi/irq.h> … … 60 61 exc_register(n - 1, name, f); 61 62 } 62 63 /** Process hardware interrupt.64 *65 * @param n Ignored.66 * @param istate Ignored.67 */68 void interrupt(int n, istate_t *istate)69 {70 uint64_t status;71 uint64_t intrcv;72 uint64_t data0;73 status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);74 if (status & (!INTR_DISPATCH_STATUS_BUSY))75 panic("Interrupt Dispatch Status busy bit not set.");76 77 intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);78 #if defined (US)79 data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);80 #elif defined (US3)81 data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);82 #endif83 84 irq_t *irq = irq_dispatch_and_lock(data0);85 if (irq) {86 /*87 * The IRQ handler was found.88 */89 irq->handler(irq);90 /*91 * See if there is a clear-interrupt-routine and call it.92 */93 if (irq->cir) {94 irq->cir(irq->cir_arg, irq->inr);95 }96 spinlock_unlock(&irq->lock);97 } else if (data0 > config.base) {98 /*99 * This is a cross-call.100 * data0 contains address of the kernel function.101 * We call the function only after we verify102 * it is one of the supported ones.103 */104 #ifdef CONFIG_SMP105 if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {106 tlb_shootdown_ipi_recv();107 }108 #endif109 } else {110 /*111 * Spurious interrupt.112 */113 #ifdef CONFIG_DEBUG114 printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64115 ", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);116 #endif117 }118 119 membar();120 asi_u64_write(ASI_INTR_RECEIVE, 0, 0);121 }122 123 63 /** @} 124 64 */ -
kernel/arch/sparc64/src/trap/sun4v/trap_table.S
r61001a9 r72bf0d2 344 344 .global cpu_mondo_handler_tl0 345 345 cpu_mondo_handler_tl0: 346 /* PREEMPTIBLE_HANDLER cpu_mondo */ 346 PREEMPTIBLE_HANDLER cpu_mondo 347 347 348 348 /* TT = 0x80, TL = 0, spill_0_normal handler */ … … 533 533 cpu_mondo_handler_tl1: 534 534 wrpr %g0, %tl 535 /* PREEMPTIBLE_HANDLER cpu_mondo */ 535 PREEMPTIBLE_HANDLER cpu_mondo 536 536 537 537 /* TT = 0x80, TL > 0, spill_0_normal handler */
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