Changeset 72bf0d2 in mainline for kernel/arch/sparc64/include


Ignore:
Timestamp:
2010-02-22T21:24:19Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
850987d
Parents:
61001a9 (diff), f8f7dba (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge from lp:~rimskyp/helenos/sparc.
Fix non-SMP build on sun4v.
Minor cleanup.

Location:
kernel/arch/sparc64/include
Files:
3 added
7 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/include/mm/sun4v/mmu.h

    r61001a9 r72bf0d2  
    2828 */
    2929
    30 /** @addtogroup sparc64mm       
     30/** @addtogroup sparc64mm
    3131 * @{
    3232 */

  • kernel/arch/sparc64/include/mm/sun4v/tlb.h

    r61001a9 r72bf0d2  
    2828 */
    2929
    30 /** @addtogroup sparc64mm       
     30/** @addtogroup sparc64mm
    3131 * @{
    3232 */

  • kernel/arch/sparc64/include/mm/sun4v/tsb.h

    r61001a9 r72bf0d2  
    2828 */
    2929
    30 /** @addtogroup sparc64mm       
     30/** @addtogroup sparc64mm
    3131 * @{
    3232 */

  • kernel/arch/sparc64/include/mm/sun4v/tte.h

    r61001a9 r72bf0d2  
    2727 */
    2828
    29 /** @addtogroup sparc64mm       
     29/** @addtogroup sparc64mm
    3030 * @{
    3131 */

  • kernel/arch/sparc64/include/sun4v/cpu.h

    r61001a9 r72bf0d2  
    4444#ifndef __ASM__
    4545
     46#include <atomic.h>
     47#include <synch/spinlock.h>
     48
    4649struct cpu;
    4750
    48 /*
    4951typedef struct {
    5052        uint64_t exec_unit_id;
    … …  
    5557        SPINLOCK_DECLARE(proposed_nrdy_lock);
    5658} exec_unit_t;
    57 */
    5859
    5960typedef struct cpu_arch {
    … …  
    6364                                             generated when the TICK register
    6465                                             matches this value. */
    65         //exec_unit_t *exec_unit;               /**< Physical core. */
    66         //unsigned long proposed_nrdy;  /**< Proposed No. of ready threads
    67         //                                   so that cores are equally balanced. */
     66        exec_unit_t *exec_unit;         /**< Physical core. */
     67        unsigned long proposed_nrdy;    /**< Proposed No. of ready threads
     68                                             so that cores are equally balanced. */
    6869} cpu_arch_t;
    6970

  • kernel/arch/sparc64/include/sun4v/ipi.h

    r61001a9 r72bf0d2  
    3838#define KERN_sparc64_sun4v_IPI_H_
    3939
    40 uint64_t ipi_brodcast_to(void (*func)(void), uint16_t cpu_list[MAX_NUM_STRANDS],
    41                 uint64_t list_size);
    42 uint64_t ipi_unicast_to(void (*func)(void), uint16_t cpu_id);
     40#include <arch/types.h>
     41
     42extern uint64_t ipi_brodcast_to(void (*)(void), uint16_t cpu_list[], uint64_t);
     43extern uint64_t ipi_unicast_to(void (*)(void), uint16_t);
    4344
    4445#endif

  • kernel/arch/sparc64/include/trap/interrupt.h

    r61001a9 r72bf0d2  
    3232/**
    3333 * @file
    34  * @brief This file contains interrupt vector trap handler.
     34 * @brief This file contains level N interrupt and inter-processor interrupt
     35 * trap handler.
    3536 */
    36 
    37 #ifndef KERN_sparc64_TRAP_INTERRUPT_H_
    38 #define KERN_sparc64_TRAP_INTERRUPT_H_
    39 
    40 #include <arch/trap/trap_table.h>
    41 #include <arch/stack.h>
    42 
    43 /* IMAP register bits */
    44 #define IGN_MASK        0x7c0
    45 #define INO_MASK        0x1f
    46 #define IMAP_V_MASK     (1ULL << 31)
    47 
    48 #define IGN_SHIFT       6
    49 
    50 
    51 /* Interrupt ASI registers. */
    52 #define ASI_INTR_W                      0x77
    53 #define ASI_INTR_DISPATCH_STATUS        0x48
    54 #define ASI_INTR_R                      0x7f
    55 #define ASI_INTR_RECEIVE                0x49
    56 
    57 /* VA's used with ASI_INTR_W register. */
    58 #if defined (US)
    59 #define ASI_UDB_INTR_W_DATA_0   0x40
    60 #define ASI_UDB_INTR_W_DATA_1   0x50
    61 #define ASI_UDB_INTR_W_DATA_2   0x60
    62 #elif defined (US3)
    63 #define VA_INTR_W_DATA_0        0x40
    64 #define VA_INTR_W_DATA_1        0x48
    65 #define VA_INTR_W_DATA_2        0x50
    66 #define VA_INTR_W_DATA_3        0x58
    67 #define VA_INTR_W_DATA_4        0x60
    68 #define VA_INTR_W_DATA_5        0x68
    69 #define VA_INTR_W_DATA_6        0x80
    70 #define VA_INTR_W_DATA_7        0x88
    71 #endif
    72 #define VA_INTR_W_DISPATCH      0x70
    73 
    74 /* VA's used with ASI_INTR_R register. */
    75 #if defined(US)
    76 #define ASI_UDB_INTR_R_DATA_0   0x40
    77 #define ASI_UDB_INTR_R_DATA_1   0x50
    78 #define ASI_UDB_INTR_R_DATA_2   0x60
    79 #elif defined (US3)
    80 #define VA_INTR_R_DATA_0        0x40
    81 #define VA_INTR_R_DATA_1        0x48
    82 #define VA_INTR_R_DATA_2        0x50
    83 #define VA_INTR_R_DATA_3        0x58
    84 #define VA_INTR_R_DATA_4        0x60
    85 #define VA_INTR_R_DATA_5        0x68
    86 #define VA_INTR_R_DATA_6        0x80
    87 #define VA_INTR_R_DATA_7        0x88
    88 #endif
    89 
    90 /* Shifts in the Interrupt Vector Dispatch virtual address. */
    91 #define INTR_VEC_DISPATCH_MID_SHIFT     14
    92 
    93 /* Bits in the Interrupt Dispatch Status register. */
    94 #define INTR_DISPATCH_STATUS_NACK       0x2
    95 #define INTR_DISPATCH_STATUS_BUSY       0x1
     37#ifndef KERN_sparc64_INTERRUPT_TRAP_H_
     38#define KERN_sparc64_INTERRUPT_TRAP_H_
    9639
    9740#define TT_INTERRUPT_LEVEL_1                    0x41
    … …  
    11154#define TT_INTERRUPT_LEVEL_15                   0x4f
    11255
    113 #define TT_INTERRUPT_VECTOR_TRAP                0x60
     56#define INTERRUPT_LEVEL_N_HANDLER_SIZE          TRAP_TABLE_ENTRY_SIZE
    11457
    115 #define INTERRUPT_LEVEL_N_HANDLER_SIZE          TRAP_TABLE_ENTRY_SIZE
    116 #define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE      TRAP_TABLE_ENTRY_SIZE
     58/* IMAP register bits */
     59#define IGN_MASK        0x7c0
     60#define INO_MASK        0x1f
     61#define IMAP_V_MASK     (1ULL << 31)
     62
     63#define IGN_SHIFT       6
     64
    11765
    11866#ifdef __ASM__
    … …  
    12169        PREEMPTIBLE_HANDLER exc_dispatch
    12270.endm
    123 
    124 .macro INTERRUPT_VECTOR_TRAP_HANDLER
    125         PREEMPTIBLE_HANDLER interrupt
    126 .endm
    127 #endif /* __ASM__ */
     71#endif
    12872
    12973#ifndef __ASM__
    … …  
    13478#endif /* !def __ASM__ */
    13579
     80
     81#if defined (SUN4U)
     82#include <arch/trap/sun4u/interrupt.h>
     83#elif defined (SUN4V)
     84#include <arch/trap/sun4v/interrupt.h>
     85#endif
     86
    13687#endif
    13788
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