Changeset 68656282 in mainline for arch/sparc64/include/mm/tlb.h
- Timestamp:
- 2006-02-24T19:59:57Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 578aebf7
- Parents:
- b6fba84
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/sparc64/include/mm/tlb.h
rb6fba84 r68656282 112 112 unsigned asi : 8; /**< ASI. */ 113 113 unsigned tm : 1; /**< TLB miss. */ 114 unsigned : 3;115 unsigned ft : 5; /**< Fault type. */114 unsigned : 1; 115 unsigned ft : 7; /**< Fault type. */ 116 116 unsigned e : 1; /**< Side-effect bit. */ 117 117 unsigned ct : 2; /**< Context Register selection. */ … … 119 119 unsigned w : 1; /**< Write bit. */ 120 120 unsigned ow : 1; /**< Overwrite bit. */ 121 unsigned fv : 1; /**< Fa yult Valid bit. */121 unsigned fv : 1; /**< Fault Valid bit. */ 122 122 } __attribute__ ((packed)); 123 123 }; … … 262 262 } 263 263 264 /** Read IMMU TLB Tag Access Register. 265 * 266 * @return Current value of IMMU TLB Tag Access Register. 267 */ 268 static inline __u64 itlb_tag_access_read(void) 269 { 270 return asi_u64_read(ASI_IMMU, VA_IMMU_TAG_ACCESS); 271 } 272 264 273 /** Write DMMU TLB Tag Access Register. 265 274 * … … 271 280 flush(); 272 281 } 282 283 /** Read DMMU TLB Tag Access Register. 284 * 285 * @return Current value of DMMU TLB Tag Access Register. 286 */ 287 static inline __u64 dtlb_tag_access_read(void) 288 { 289 return asi_u64_read(ASI_DMMU, VA_DMMU_TAG_ACCESS); 290 } 291 273 292 274 293 /** Write IMMU TLB Data in Register.
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