Changeset 4aa2a27 in mainline for kernel


Ignore:
Timestamp:
2014-01-07T11:29:16Z (12 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
4edd71f6
Parents:
fd07e57b (diff), 226f72e (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge from lp:~bengal/helenos/raspberrypi.

Location:
kernel
Files:
7 added
1 deleted
9 edited
1 moved

Legend:

Unmodified
Added
Removed

  • kernel/arch/arm32/Makefile.inc

    rfd07e57b r4aa2a27  
    8989endif
    9090
     91ifeq ($(MACHINE),raspberrypi)
     92        ARCH_SOURCES += arch/$(KARCH)/src/mach/raspberrypi/raspberrypi.c
     93endif
     94
    9195ifeq ($(CONFIG_PL050),y)
    9296        ARCH_SOURCES += genarch/src/drivers/pl050/pl050.c

  • kernel/arch/arm32/_link.ld.in

    rfd07e57b r4aa2a27  
    1313#elif defined MACHINE_beaglebone
    1414#define KERNEL_LOAD_ADDRESS 0x80a00000
     15#elif defined MACHINE_raspberrypi
     16#define KERNEL_LOAD_ADDRESS 0x80a08000
    1517#else
    1618#define KERNEL_LOAD_ADDRESS 0x80a00000

  • kernel/arch/arm32/include/arch/cp15.h

    rfd07e57b r4aa2a27  
    231231        SCTLR_FAST_IRQ_EN_FLAG       = 1 << 21, /* Disable impl. specific feat*/
    232232        SCTLR_UNALIGNED_EN_FLAG      = 1 << 22, /* Must be 1 on armv7 */
     233        SCTLR_EXTENDED_PT_EN_FLAG    = 1 << 23,
    233234        SCTLR_IRQ_VECTORS_EN_FLAG    = 1 << 24,
    234235        SCTLR_BIG_ENDIAN_EXC_FLAG    = 1 << 25,

  • kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h

    rfd07e57b r4aa2a27  
    4646#define ICP_IRQC_MAX_IRQ  8
    4747#define ICP_KBD_IRQ       3
    48 #define ICP_TIMER_IRQ    6
     48#define ICP_TIMER_IRQ     6
     49#define ICP_UART0_IRQ     1
    4950
    5051/** Timer frequency */

  • kernel/arch/arm32/include/arch/mm/frame.h

    rfd07e57b r4aa2a27  
    6363#define BOOT_PAGE_TABLE_ADDRESS  0x80008000
    6464
     65#elif defined MACHINE_raspberrypi
     66
     67#define PHYSMEM_START_ADDR       0x00000000
     68#define BOOT_PAGE_TABLE_ADDRESS  0x00010000
     69
    6570#else
    6671

  • kernel/arch/arm32/include/arch/mm/page_armv6.h

    rfd07e57b r4aa2a27  
    278278        }
    279279       
     280#if defined(PROCESSOR_ARCH_armv6)
     281        /* FIXME: this disables caches */
     282        p->shareable = 1;
     283#else
    280284        /* Shareable is ignored for devices (non-cacheable),
    281285         * turn it off for normal memory. */
    282286        p->shareable = 0;
     287#endif
    283288       
    284289        p->non_global = !(flags & PAGE_GLOBAL);

  • kernel/arch/arm32/src/mach/integratorcp/integratorcp.c

    rfd07e57b r4aa2a27  
    3737#include <ipc/irq.h>
    3838#include <console/chardev.h>
     39#include <genarch/drivers/pl011/pl011.h>
    3940#include <genarch/drivers/pl050/pl050.h>
    40 #include <genarch/drivers/arm926_uart/arm926_uart.h>
    4141#include <genarch/kbrd/kbrd.h>
    4242#include <genarch/srln/srln.h>
    … …  
    6161        icp_hw_map_t hw_map;
    6262        irq_t timer_irq;
    63         arm926_uart_t uart;
     63        pl011_uart_t uart;
    6464} icp;
    6565
    … …  
    315315                stdout_wire(fbdev);
    316316#endif
    317 #ifdef CONFIG_ARM926_UART
    318         if (arm926_uart_init(&icp.uart, ARM926_UART0_IRQ,
    319             ARM926_UART0_BASE_ADDRESS, sizeof(arm926_uart_regs_t)))
     317#ifdef CONFIG_PL011_UART
     318        if (pl011_uart_init(&icp.uart, ICP_UART0_IRQ, ICP_UART))
    320319                stdout_wire(&icp.uart.outdev);
    321320#endif
    … …  
    351350            ICP_KBD);
    352351
    353 #ifdef CONFIG_ARM926_UART
     352#ifdef CONFIG_PL011_UART
    354353        srln_instance_t *srln_instance = srln_init();
    355354        if (srln_instance) {
    356355                indev_t *sink = stdin_wire();
    357356                indev_t *srln = srln_wire(srln_instance, sink);
    358                 arm926_uart_input_wire(&icp.uart, srln);
    359                 icp_irqc_unmask(ARM926_UART0_IRQ);
     357                pl011_uart_input_wire(&icp.uart, srln);
     358                icp_irqc_unmask(ICP_UART0_IRQ);
    360359        }
    361360#endif

  • kernel/arch/arm32/src/machine_func.c

    rfd07e57b r4aa2a27  
    4343#include <arch/mach/beagleboardxm/beagleboardxm.h>
    4444#include <arch/mach/beaglebone/beaglebone.h>
     45#include <arch/mach/raspberrypi/raspberrypi.h>
    4546
    4647/** Pointer to machine_ops structure being used. */
    … …  
    5859#elif defined(MACHINE_beaglebone)
    5960        machine_ops = &bbone_machine_ops;
     61#elif defined(MACHINE_raspberrypi)
     62        machine_ops = &raspberrypi_machine_ops;
    6063#else
    6164#error Machine type not defined.

  • kernel/genarch/Makefile.inc

    rfd07e57b r4aa2a27  
    9090endif
    9191
    92 ifeq ($(CONFIG_ARM926_UART),y)
     92ifeq ($(CONFIG_PL011_UART),y)
    9393        GENARCH_SOURCES += \
    94                 genarch/src/drivers/arm926_uart/arm926_uart.c
     94                genarch/src/drivers/pl011/pl011.c
    9595endif
    9696
    … …  
    123123        GENARCH_SOURCES += \
    124124                genarch/src/drivers/am335x/timer.c
     125endif
     126
     127ifeq ($(CONFIG_BCM2835_MAILBOX),y)
     128        GENARCH_SOURCES += \
     129                genarch/src/drivers/bcm2835/mbox.c
    125130endif
    126131

  • kernel/genarch/src/drivers/pl011/pl011.c

    rfd07e57b r4aa2a27  
    3232/**
    3333 * @file
    34  * @brief ARM926 on-chip UART (PrimeCell UART, PL011) driver.
     34 * @brief ARM PrimeCell PL011 UART driver.
    3535 */
    3636
    37 #include <genarch/drivers/arm926_uart/arm926_uart.h>
     37#include <genarch/drivers/pl011/pl011.h>
    3838#include <console/chardev.h>
    3939#include <console/console.h>
    … …  
    4646#include <str.h>
    4747
    48 static void arm926_uart_sendb(arm926_uart_t *uart, uint8_t byte)
     48static void pl011_uart_sendb(pl011_uart_t *uart, uint8_t byte)
    4949{
    5050        /* Wait for space becoming available in Tx FIFO. */
    5151        // TODO make pio_read accept consts pointers and remove the cast
    52         while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_TXFF_FLAG) != 0)
     52        while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0)
    5353                ;
    5454
    … …  
    5656}
    5757
    58 static void arm926_uart_putchar(outdev_t *dev, wchar_t ch)
     58static void pl011_uart_putchar(outdev_t *dev, wchar_t ch)
    5959{
    60         arm926_uart_t *uart = dev->data;
     60        pl011_uart_t *uart = dev->data;
    6161
    6262        if (!ascii_check(ch)) {
    63                 arm926_uart_sendb(uart, U_SPECIAL);
     63                pl011_uart_sendb(uart, U_SPECIAL);
    6464        } else {
    6565                if (ch == '\n')
    66                         arm926_uart_sendb(uart, (uint8_t) '\r');
    67                 arm926_uart_sendb(uart, (uint8_t) ch);
     66                        pl011_uart_sendb(uart, (uint8_t) '\r');
     67                pl011_uart_sendb(uart, (uint8_t) ch);
    6868        }
    6969}
    7070
    71 static outdev_operations_t arm926_uart_ops = {
    72         .write = arm926_uart_putchar,
     71static outdev_operations_t pl011_uart_ops = {
     72        .write = pl011_uart_putchar,
    7373        .redraw = NULL,
    7474};
    7575
    76 static irq_ownership_t arm926_uart_claim(irq_t *irq)
     76static irq_ownership_t pl011_uart_claim(irq_t *irq)
    7777{
    7878        return IRQ_ACCEPT;
    7979}
    8080
    81 static void arm926_uart_irq_handler(irq_t *irq)
     81static void pl011_uart_irq_handler(irq_t *irq)
    8282{
    83         arm926_uart_t *uart = irq->instance;
     83        pl011_uart_t *uart = irq->instance;
    8484
    8585        // TODO make pio_read accept const pointers and remove the cast
    86         while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_RXFE_FLAG) == 0) {
     86        while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) {
    8787                /* We ignore all error flags here */
    8888                const uint8_t data = pio_read_32(&uart->regs->data);
    … …  
    9191        }
    9292        /* Ack interrupts */
    93         pio_write_32(&uart->regs->interrupt_clear, ARM926_UART_INTERRUPT_ALL);
     93        pio_write_32(&uart->regs->interrupt_clear, PL011_UART_INTERRUPT_ALL);
    9494}
    9595
    96 bool arm926_uart_init(
    97     arm926_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)
     96bool pl011_uart_init(pl011_uart_t *uart, inr_t interrupt, uintptr_t addr)
    9897{
    9998        ASSERT(uart);
    100         uart->regs = (void*)km_map(addr, size, PAGE_NOT_CACHEABLE);
    101 
     99        uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t),
     100                                   PAGE_NOT_CACHEABLE);
    102101        ASSERT(uart->regs);
    103102
     103        /* Disable UART */
     104        uart->regs->control &= ~ PL011_UART_CONTROL_UARTEN_FLAG;
     105
    104106        /* Enable hw flow control */
    105         uart->regs->control = 0 |
    106             ARM926_UART_CONTROL_UARTEN_FLAG |
    107             ARM926_UART_CONTROL_RTSE_FLAG |
    108             ARM926_UART_CONTROL_CTSE_FLAG;
     107        uart->regs->control |=
     108                PL011_UART_CONTROL_RTSE_FLAG |
     109                PL011_UART_CONTROL_CTSE_FLAG;
    109110
    110111        /* Mask all interrupts */
    111112        uart->regs->interrupt_mask = 0;
     113        /* Clear interrupts */
     114        uart->regs->interrupt_clear = PL011_UART_INTERRUPT_ALL;
     115        /* Enable UART, TX and RX */
     116        uart->regs->control |=
     117                PL011_UART_CONTROL_UARTEN_FLAG |
     118                PL011_UART_CONTROL_TXE_FLAG |
     119                PL011_UART_CONTROL_RXE_FLAG;
    112120
    113         outdev_initialize("arm926_uart_dev", &uart->outdev, &arm926_uart_ops);
     121        outdev_initialize("pl011_uart_dev", &uart->outdev, &pl011_uart_ops);
    114122        uart->outdev.data = uart;
    115123
    116124        /* Initialize IRQ */
    117125        irq_initialize(&uart->irq);
    118         uart->irq.devno = device_assign_devno();
    119         uart->irq.inr = interrupt;
    120         uart->irq.claim = arm926_uart_claim;
    121         uart->irq.handler = arm926_uart_irq_handler;
    122         uart->irq.instance = uart;
     126        uart->irq.devno = device_assign_devno();
     127        uart->irq.inr = interrupt;
     128        uart->irq.claim = pl011_uart_claim;
     129        uart->irq.handler = pl011_uart_irq_handler;
     130        uart->irq.instance = uart;
    123131
    124132        return true;
    125133}
    126134
    127 void arm926_uart_input_wire(arm926_uart_t *uart, indev_t *indev)
     135void pl011_uart_input_wire(pl011_uart_t *uart, indev_t *indev)
    128136{
    129137        ASSERT(uart);
    … …  
    132140        uart->indev = indev;
    133141        irq_register(&uart->irq);
    134         /* Enable receive interrupt */
    135         uart->regs->interrupt_mask |= ARM926_UART_INTERRUPT_RX_FLAG;
     142        /* Enable receive interrupts */
     143        uart->regs->interrupt_mask |=
     144                PL011_UART_INTERRUPT_RX_FLAG |
     145                PL011_UART_INTERRUPT_RT_FLAG;
    136146}
    137147
Note: See TracChangeset for help on using the changeset viewer.