Changeset 4aa2a27 in mainline
- Timestamp:
- 2014-01-07T11:29:16Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4edd71f6
- Parents:
- fd07e57b (diff), 226f72e (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Files:
-
- 8 added
- 1 deleted
- 16 edited
- 1 moved
Legend:
- Unmodified
- Added
- Removed
-
HelenOS.config
rfd07e57b r4aa2a27 71 71 @ "beagleboardxm" BeagleBoard-xM 72 72 @ "beaglebone" BeagleBone 73 @ "raspberrypi" Raspberry Pi 73 74 ! [PLATFORM=arm32] MACHINE (choice) 74 75 … … 108 109 ! [PLATFORM=arm32&MACHINE=integratorcp] PROCESSOR (choice) 109 110 111 % CPU type 112 @ "arm1176" ARM1176 113 ! [PLATFORM=arm32&MACHINE=raspberrypi] PROCESSOR (choice) 110 114 111 115 # Add more ARMv4 CPUs … … 118 122 @ "armv5" ARMv5 119 123 ! [PLATFORM=arm32&(PROCESSOR=arm926ej_s)] PROCESSOR_ARCH (choice) 124 125 # Add more ARMv6 CPUs 126 % CPU arch 127 @ "armv6" ARMv6 128 ! [PLATFORM=arm32&(PROCESSOR=arm1176)] PROCESSOR_ARCH (choice) 120 129 121 130 # Add more ARMv7-A CPUs … … 467 476 % Output device class 468 477 @ "generic" Monitor or serial line 469 ! [PLATFORM=arm32&(MACHINE=gta02|MACHINE=integratorcp|MACHINE=beagleboardxm|MACHINE=beaglebone )] CONFIG_HID_OUT (choice)478 ! [PLATFORM=arm32&(MACHINE=gta02|MACHINE=integratorcp|MACHINE=beagleboardxm|MACHINE=beaglebone|MACHINE=raspberrypi)] CONFIG_HID_OUT (choice) 470 479 471 480 % Output device class … … 498 507 ! [(CONFIG_HID_IN=generic|CONFIG_HID_IN=serial)&PLATFORM=ia64&MACHINE=i460GX] CONFIG_NS16550 (y/n) 499 508 500 % Support for ARM926 on-chipUART501 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32& MACHINE=integratorcp] CONFIG_ARM926_UART (y/n)509 % Support for PL011 UART 510 ! [(CONFIG_HID_OUT=generic|CONFIG_HID_OUT=serial)&PLATFORM=arm32&(MACHINE=integratorcp|MACHINE=raspberrypi)] CONFIG_PL011_UART (y/n) 502 511 503 512 % Support for Samsung S3C24XX on-chip UART … … 519 528 ! [PLATFORM=sparc32&MACHINE=leon3] CONFIG_GRLIB_IRQMP (y) 520 529 530 % Support for BCM2835 mailbox 531 ! [PLATFORM=arm32&MACHINE=raspberrypi] CONFIG_BCM2835_MAILBOX (y/n) 532 521 533 % Support for i8042 controller 522 534 ! [CONFIG_PC_KBD=y] CONFIG_I8042 (y) … … 538 550 539 551 % Serial line input module 540 ! [CONFIG_DSRLNIN=y|(PLATFORM=sparc32)|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=arm32&MACHINE=integratorcp&CONFIG_ ARM926_UART=y)|(PLATFORM=arm32&MACHINE=beaglebone&CONFIG_OMAP_UART=y)|(PLATFORM=arm32&MACHINE=beagleboardxm&CONFIG_OMAP_UART=y)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&PROCESSOR=sun4v)] CONFIG_SRLN (y)552 ! [CONFIG_DSRLNIN=y|(PLATFORM=sparc32)|(PLATFORM=arm32&MACHINE=gta02)|(PLATFORM=arm32&MACHINE=integratorcp&CONFIG_PL011_UART=y)|(PLATFORM=arm32&MACHINE=beaglebone&CONFIG_OMAP_UART=y)|(PLATFORM=arm32&MACHINE=beagleboardxm&CONFIG_OMAP_UART=y)|(PLATFORM=ia64&MACHINE=i460GX&CONFIG_NS16550=y)|(PLATFORM=ia64&MACHINE=ski)|(PLATFORM=sparc64&PROCESSOR=sun4v)|(PLATFORM=arm32&MACHINE=raspberrypi&CONFIG_PL011_UART=y)] CONFIG_SRLN (y) 541 553 542 554 % EGA support -
boot/arch/arm32/Makefile.inc
rfd07e57b r4aa2a27 43 43 endif 44 44 45 ifeq ($(MACHINE), raspberrypi) 46 BOOT_OUTPUT = image.boot 47 POST_OUTPUT = $(ROOT_PATH)/uImage.bin 48 LADDR = 0x00008000 49 SADDR = 0x00008000 50 POSTBUILD = Makefile.uboot 51 endif 52 45 53 BFD_NAME = elf32-littlearm 46 54 BFD_OUTPUT = $(BFD_NAME) -
boot/arch/arm32/include/arch.h
rfd07e57b r4aa2a27 46 46 #elif defined MACHINE_beaglebone 47 47 #define BOOT_BASE 0x80000000 48 #elif defined MACHINE_raspberrypi 49 #define BOOT_BASE 0x00008000 48 50 #else 49 51 #define BOOT_BASE 0x00000000 -
boot/arch/arm32/include/main.h
rfd07e57b r4aa2a27 75 75 #define ICP_SCONS_ADDR 0x16000000 76 76 77 /** Raspberry PI serial console registers */ 78 #define BCM2835_UART0_BASE 0x20201000 79 #define BCM2835_UART0_DR (BCM2835_UART0_BASE + 0x00) 80 #define BCM2835_UART0_FR (BCM2835_UART0_BASE + 0x18) 81 #define BCM2835_UART0_ILPR (BCM2835_UART0_BASE + 0x20) 82 #define BCM2835_UART0_IBRD (BCM2835_UART0_BASE + 0x24) 83 #define BCM2835_UART0_FBRD (BCM2835_UART0_BASE + 0x28) 84 #define BCM2835_UART0_LCRH (BCM2835_UART0_BASE + 0x2C) 85 #define BCM2835_UART0_CR (BCM2835_UART0_BASE + 0x30) 86 #define BCM2835_UART0_ICR (BCM2835_UART0_BASE + 0x44) 87 88 #define BCM2835_UART0_FR_TXFF (1 << 5) 89 #define BCM2835_UART0_LCRH_FEN (1 << 4) 90 #define BCM2835_UART0_LCRH_WL8 ((1 << 5) | (1 << 6)) 91 #define BCM2835_UART0_CR_UARTEN (1 << 0) 92 #define BCM2835_UART0_CR_TXE (1 << 8) 93 #define BCM2835_UART0_CR_RXE (1 << 9) 94 95 96 77 97 extern void bootstrap(void); 78 98 -
boot/arch/arm32/include/mm.h
rfd07e57b r4aa2a27 68 68 #define AM335x_RAM_END 0xC0000000 69 69 70 /** Start of ram memory on BCM2835 */ 71 #define BCM2835_RAM_START 0 72 /** End of ram memory on BCM2835 */ 73 #define BCM2835_RAM_END 0x20000000 70 74 71 75 /* Page table level 0 entry - "section" format is used -
boot/arch/arm32/src/mm.c
rfd07e57b r4aa2a27 116 116 if (address >= AM335x_RAM_START && address < AM335x_RAM_END) 117 117 return 1; 118 #elif defined MACHINE_raspberrypi 119 if (address < BCM2835_RAM_END) 120 return 1; 118 121 #endif 119 122 return address * 0; -
boot/arch/arm32/src/putchar.c
rfd07e57b r4aa2a27 122 122 #endif 123 123 124 #ifdef MACHINE_raspberrypi 125 126 static int raspi_init; 127 128 static inline void write32(uint32_t addr, uint32_t data) 129 { 130 *(volatile uint32_t *)(addr) = data; 131 } 132 133 static inline uint32_t read32(uint32_t addr) 134 { 135 return *(volatile uint32_t *)(addr); 136 } 137 138 static void scons_init_raspi(void) 139 { 140 write32(BCM2835_UART0_CR, 0x0); /* Disable UART */ 141 write32(BCM2835_UART0_ICR, 0x7f); /* Clear interrupts */ 142 write32(BCM2835_UART0_IBRD, 1); /* Set integer baud rate */ 143 write32(BCM2835_UART0_FBRD, 40); /* Set fractional baud rate */ 144 write32(BCM2835_UART0_LCRH, 145 BCM2835_UART0_LCRH_FEN | /* Enable FIFOs */ 146 BCM2835_UART0_LCRH_WL8); /* Word length: 8 */ 147 write32(BCM2835_UART0_CR, 148 BCM2835_UART0_CR_UARTEN | /* Enable UART */ 149 BCM2835_UART0_CR_TXE | /* Enable TX */ 150 BCM2835_UART0_CR_RXE); /* Enable RX */ 151 } 152 153 static void scons_sendb_raspi(uint8_t byte) 154 { 155 if (!raspi_init) { 156 scons_init_raspi(); 157 raspi_init = 1; 158 } 159 160 while (read32(BCM2835_UART0_FR) & BCM2835_UART0_FR_TXFF); 161 162 write32(BCM2835_UART0_DR, byte); 163 } 164 #endif 165 124 166 /** Send a byte to the serial console. 125 167 * … … 139 181 #ifdef MACHINE_integratorcp 140 182 scons_sendb_icp(byte); 183 #endif 184 #ifdef MACHINE_raspberrypi 185 scons_sendb_raspi(byte); 141 186 #endif 142 187 } -
kernel/arch/arm32/Makefile.inc
rfd07e57b r4aa2a27 89 89 endif 90 90 91 ifeq ($(MACHINE),raspberrypi) 92 ARCH_SOURCES += arch/$(KARCH)/src/mach/raspberrypi/raspberrypi.c 93 endif 94 91 95 ifeq ($(CONFIG_PL050),y) 92 96 ARCH_SOURCES += genarch/src/drivers/pl050/pl050.c -
kernel/arch/arm32/_link.ld.in
rfd07e57b r4aa2a27 13 13 #elif defined MACHINE_beaglebone 14 14 #define KERNEL_LOAD_ADDRESS 0x80a00000 15 #elif defined MACHINE_raspberrypi 16 #define KERNEL_LOAD_ADDRESS 0x80a08000 15 17 #else 16 18 #define KERNEL_LOAD_ADDRESS 0x80a00000 -
kernel/arch/arm32/include/arch/cp15.h
rfd07e57b r4aa2a27 231 231 SCTLR_FAST_IRQ_EN_FLAG = 1 << 21, /* Disable impl. specific feat*/ 232 232 SCTLR_UNALIGNED_EN_FLAG = 1 << 22, /* Must be 1 on armv7 */ 233 SCTLR_EXTENDED_PT_EN_FLAG = 1 << 23, 233 234 SCTLR_IRQ_VECTORS_EN_FLAG = 1 << 24, 234 235 SCTLR_BIG_ENDIAN_EXC_FLAG = 1 << 25, -
kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h
rfd07e57b r4aa2a27 46 46 #define ICP_IRQC_MAX_IRQ 8 47 47 #define ICP_KBD_IRQ 3 48 #define ICP_TIMER_IRQ 6 48 #define ICP_TIMER_IRQ 6 49 #define ICP_UART0_IRQ 1 49 50 50 51 /** Timer frequency */ -
kernel/arch/arm32/include/arch/mm/frame.h
rfd07e57b r4aa2a27 63 63 #define BOOT_PAGE_TABLE_ADDRESS 0x80008000 64 64 65 #elif defined MACHINE_raspberrypi 66 67 #define PHYSMEM_START_ADDR 0x00000000 68 #define BOOT_PAGE_TABLE_ADDRESS 0x00010000 69 65 70 #else 66 71 -
kernel/arch/arm32/include/arch/mm/page_armv6.h
rfd07e57b r4aa2a27 278 278 } 279 279 280 #if defined(PROCESSOR_ARCH_armv6) 281 /* FIXME: this disables caches */ 282 p->shareable = 1; 283 #else 280 284 /* Shareable is ignored for devices (non-cacheable), 281 285 * turn it off for normal memory. */ 282 286 p->shareable = 0; 287 #endif 283 288 284 289 p->non_global = !(flags & PAGE_GLOBAL); -
kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
rfd07e57b r4aa2a27 37 37 #include <ipc/irq.h> 38 38 #include <console/chardev.h> 39 #include <genarch/drivers/pl011/pl011.h> 39 40 #include <genarch/drivers/pl050/pl050.h> 40 #include <genarch/drivers/arm926_uart/arm926_uart.h>41 41 #include <genarch/kbrd/kbrd.h> 42 42 #include <genarch/srln/srln.h> … … 61 61 icp_hw_map_t hw_map; 62 62 irq_t timer_irq; 63 arm926_uart_t uart;63 pl011_uart_t uart; 64 64 } icp; 65 65 … … 315 315 stdout_wire(fbdev); 316 316 #endif 317 #ifdef CONFIG_ARM926_UART 318 if (arm926_uart_init(&icp.uart, ARM926_UART0_IRQ, 319 ARM926_UART0_BASE_ADDRESS, sizeof(arm926_uart_regs_t))) 317 #ifdef CONFIG_PL011_UART 318 if (pl011_uart_init(&icp.uart, ICP_UART0_IRQ, ICP_UART)) 320 319 stdout_wire(&icp.uart.outdev); 321 320 #endif … … 351 350 ICP_KBD); 352 351 353 #ifdef CONFIG_ ARM926_UART352 #ifdef CONFIG_PL011_UART 354 353 srln_instance_t *srln_instance = srln_init(); 355 354 if (srln_instance) { 356 355 indev_t *sink = stdin_wire(); 357 356 indev_t *srln = srln_wire(srln_instance, sink); 358 arm926_uart_input_wire(&icp.uart, srln);359 icp_irqc_unmask(ARM926_UART0_IRQ);357 pl011_uart_input_wire(&icp.uart, srln); 358 icp_irqc_unmask(ICP_UART0_IRQ); 360 359 } 361 360 #endif -
kernel/arch/arm32/src/machine_func.c
rfd07e57b r4aa2a27 43 43 #include <arch/mach/beagleboardxm/beagleboardxm.h> 44 44 #include <arch/mach/beaglebone/beaglebone.h> 45 #include <arch/mach/raspberrypi/raspberrypi.h> 45 46 46 47 /** Pointer to machine_ops structure being used. */ … … 58 59 #elif defined(MACHINE_beaglebone) 59 60 machine_ops = &bbone_machine_ops; 61 #elif defined(MACHINE_raspberrypi) 62 machine_ops = &raspberrypi_machine_ops; 60 63 #else 61 64 #error Machine type not defined. -
kernel/genarch/Makefile.inc
rfd07e57b r4aa2a27 90 90 endif 91 91 92 ifeq ($(CONFIG_ ARM926_UART),y)92 ifeq ($(CONFIG_PL011_UART),y) 93 93 GENARCH_SOURCES += \ 94 genarch/src/drivers/ arm926_uart/arm926_uart.c94 genarch/src/drivers/pl011/pl011.c 95 95 endif 96 96 … … 123 123 GENARCH_SOURCES += \ 124 124 genarch/src/drivers/am335x/timer.c 125 endif 126 127 ifeq ($(CONFIG_BCM2835_MAILBOX),y) 128 GENARCH_SOURCES += \ 129 genarch/src/drivers/bcm2835/mbox.c 125 130 endif 126 131 -
kernel/genarch/src/drivers/pl011/pl011.c
rfd07e57b r4aa2a27 32 32 /** 33 33 * @file 34 * @brief ARM 926 on-chip UART (PrimeCell UART, PL011)driver.34 * @brief ARM PrimeCell PL011 UART driver. 35 35 */ 36 36 37 #include <genarch/drivers/ arm926_uart/arm926_uart.h>37 #include <genarch/drivers/pl011/pl011.h> 38 38 #include <console/chardev.h> 39 39 #include <console/console.h> … … 46 46 #include <str.h> 47 47 48 static void arm926_uart_sendb(arm926_uart_t *uart, uint8_t byte)48 static void pl011_uart_sendb(pl011_uart_t *uart, uint8_t byte) 49 49 { 50 50 /* Wait for space becoming available in Tx FIFO. */ 51 51 // TODO make pio_read accept consts pointers and remove the cast 52 while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_TXFF_FLAG) != 0)52 while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0) 53 53 ; 54 54 … … 56 56 } 57 57 58 static void arm926_uart_putchar(outdev_t *dev, wchar_t ch)58 static void pl011_uart_putchar(outdev_t *dev, wchar_t ch) 59 59 { 60 arm926_uart_t *uart = dev->data;60 pl011_uart_t *uart = dev->data; 61 61 62 62 if (!ascii_check(ch)) { 63 arm926_uart_sendb(uart, U_SPECIAL);63 pl011_uart_sendb(uart, U_SPECIAL); 64 64 } else { 65 65 if (ch == '\n') 66 arm926_uart_sendb(uart, (uint8_t) '\r');67 arm926_uart_sendb(uart, (uint8_t) ch);66 pl011_uart_sendb(uart, (uint8_t) '\r'); 67 pl011_uart_sendb(uart, (uint8_t) ch); 68 68 } 69 69 } 70 70 71 static outdev_operations_t arm926_uart_ops = {72 .write = arm926_uart_putchar,71 static outdev_operations_t pl011_uart_ops = { 72 .write = pl011_uart_putchar, 73 73 .redraw = NULL, 74 74 }; 75 75 76 static irq_ownership_t arm926_uart_claim(irq_t *irq)76 static irq_ownership_t pl011_uart_claim(irq_t *irq) 77 77 { 78 78 return IRQ_ACCEPT; 79 79 } 80 80 81 static void arm926_uart_irq_handler(irq_t *irq)81 static void pl011_uart_irq_handler(irq_t *irq) 82 82 { 83 arm926_uart_t *uart = irq->instance;83 pl011_uart_t *uart = irq->instance; 84 84 85 85 // TODO make pio_read accept const pointers and remove the cast 86 while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_RXFE_FLAG) == 0) {86 while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) { 87 87 /* We ignore all error flags here */ 88 88 const uint8_t data = pio_read_32(&uart->regs->data); … … 91 91 } 92 92 /* Ack interrupts */ 93 pio_write_32(&uart->regs->interrupt_clear, ARM926_UART_INTERRUPT_ALL);93 pio_write_32(&uart->regs->interrupt_clear, PL011_UART_INTERRUPT_ALL); 94 94 } 95 95 96 bool arm926_uart_init( 97 arm926_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size) 96 bool pl011_uart_init(pl011_uart_t *uart, inr_t interrupt, uintptr_t addr) 98 97 { 99 98 ASSERT(uart); 100 uart->regs = (void*)km_map(addr, size , PAGE_NOT_CACHEABLE);101 99 uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t), 100 PAGE_NOT_CACHEABLE); 102 101 ASSERT(uart->regs); 103 102 103 /* Disable UART */ 104 uart->regs->control &= ~ PL011_UART_CONTROL_UARTEN_FLAG; 105 104 106 /* Enable hw flow control */ 105 uart->regs->control = 0 | 106 ARM926_UART_CONTROL_UARTEN_FLAG | 107 ARM926_UART_CONTROL_RTSE_FLAG | 108 ARM926_UART_CONTROL_CTSE_FLAG; 107 uart->regs->control |= 108 PL011_UART_CONTROL_RTSE_FLAG | 109 PL011_UART_CONTROL_CTSE_FLAG; 109 110 110 111 /* Mask all interrupts */ 111 112 uart->regs->interrupt_mask = 0; 113 /* Clear interrupts */ 114 uart->regs->interrupt_clear = PL011_UART_INTERRUPT_ALL; 115 /* Enable UART, TX and RX */ 116 uart->regs->control |= 117 PL011_UART_CONTROL_UARTEN_FLAG | 118 PL011_UART_CONTROL_TXE_FLAG | 119 PL011_UART_CONTROL_RXE_FLAG; 112 120 113 outdev_initialize(" arm926_uart_dev", &uart->outdev, &arm926_uart_ops);121 outdev_initialize("pl011_uart_dev", &uart->outdev, &pl011_uart_ops); 114 122 uart->outdev.data = uart; 115 123 116 124 /* Initialize IRQ */ 117 125 irq_initialize(&uart->irq); 118 119 120 uart->irq.claim = arm926_uart_claim;121 uart->irq.handler = arm926_uart_irq_handler;122 126 uart->irq.devno = device_assign_devno(); 127 uart->irq.inr = interrupt; 128 uart->irq.claim = pl011_uart_claim; 129 uart->irq.handler = pl011_uart_irq_handler; 130 uart->irq.instance = uart; 123 131 124 132 return true; 125 133 } 126 134 127 void arm926_uart_input_wire(arm926_uart_t *uart, indev_t *indev)135 void pl011_uart_input_wire(pl011_uart_t *uart, indev_t *indev) 128 136 { 129 137 ASSERT(uart); … … 132 140 uart->indev = indev; 133 141 irq_register(&uart->irq); 134 /* Enable receive interrupt */ 135 uart->regs->interrupt_mask |= ARM926_UART_INTERRUPT_RX_FLAG; 142 /* Enable receive interrupts */ 143 uart->regs->interrupt_mask |= 144 PL011_UART_INTERRUPT_RX_FLAG | 145 PL011_UART_INTERRUPT_RT_FLAG; 136 146 } 137 147
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