Changeset 43114c5 in mainline for arch/mips/src/mm/tlb.c

Timestamp:

2005-04-09T18:22:53Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8262010

Parents:

e6ba9a3f

Message:

Introduce macros CPU, THREAD, TASK and use them to replace the→cpu, the→thread, the→task.
Later on, this will make it possible to reference *current* cpu, thread and/or task without the aid from virtual memory.

File:

• arch/mips/src/mm/tlb.c (modified) (1 diff)

arch/mips/src/mm/tlb.c

@@ -47 +47 @@
 void tlb_invalid(void)
 {
-        panic(PANIC "%X: TLB exception at %X", cp0_badvaddr_read(), the->thread ? the->thread->saved_epc : 0);
+        panic(PANIC "%X: TLB exception at %X", cp0_badvaddr_read(), THREAD ? THREAD->saved_epc : 0);
 }