Changeset 43114c5 in mainline for arch/ia32/src/smp
- Timestamp:
- 2005-04-09T18:22:53Z (21 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8262010
- Parents:
- e6ba9a3f
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/src/smp/apic.c
re6ba9a3f r43114c5 115 115 void apic_spurious(__u8 n, __u32 stack[]) 116 116 { 117 printf("cpu%d: APIC spurious interrupt\n", the->cpu->id);117 printf("cpu%d: APIC spurious interrupt\n", CPU->id); 118 118 } 119 119 … … 143 143 144 144 /* 145 * Send all CPUs excluding the->cpuIPI vector.145 * Send all CPUs excluding CPU IPI vector. 146 146 */ 147 147 int l_apic_broadcast_custom_ipi(__u8 vector) … … 233 233 l_apic[TPR] &= TPRClear; 234 234 235 if ( the->cpu->arch.family >= 6)235 if (CPU->arch.family >= 6) 236 236 enable_l_apic_in_msr(); 237 237 … … 271 271 int i, lint; 272 272 273 printf("LVT on cpu%d, LAPIC ID: %d\n", the->cpu->id, (l_apic[L_APIC_ID] >> 24)&0xf);273 printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, (l_apic[L_APIC_ID] >> 24)&0xf); 274 274 275 275 printf("LVT_Tm: "); … … 305 305 * This register is supported only on P6 and higher. 306 306 */ 307 if ( the->cpu->family > 5) {307 if (CPU->family > 5) { 308 308 printf("LVT_PCINT: "); 309 309 if (l_apic[LVT_PCINT] & (1<<16)) printf("masked"); else printf("not masked"); putchar(',');
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