Changeset 3bacee1 in mainline for uspace/drv/bus
- Timestamp:
- 2018-04-12T16:27:17Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- Location:
- uspace/drv/bus
- Files:
-
- 38 edited
-
isa/i8237.c (modified) (3 diffs)
-
usb/ehci/ehci_batch.c (modified) (11 diffs)
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usb/ehci/ehci_rh.c (modified) (13 diffs)
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usb/ehci/hc.c (modified) (11 diffs)
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usb/ehci/hw_struct/transfer_descriptor.c (modified) (2 diffs)
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usb/ehci/res.c (modified) (3 diffs)
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usb/ohci/hc.c (modified) (6 diffs)
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usb/ohci/hw_struct/endpoint_descriptor.c (modified) (1 diff)
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usb/ohci/hw_struct/endpoint_descriptor.h (modified) (2 diffs)
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usb/ohci/hw_struct/transfer_descriptor.c (modified) (1 diff)
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usb/ohci/hw_struct/transfer_descriptor.h (modified) (2 diffs)
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usb/ohci/ohci_batch.c (modified) (8 diffs)
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usb/ohci/ohci_bus.c (modified) (2 diffs)
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usb/ohci/ohci_rh.c (modified) (6 diffs)
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usb/uhci/hc.c (modified) (15 diffs)
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usb/uhci/hw_struct/transfer_descriptor.c (modified) (3 diffs)
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usb/uhci/hw_struct/transfer_descriptor.h (modified) (1 diff)
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usb/uhci/transfer_list.c (modified) (3 diffs)
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usb/uhci/uhci_rh.c (modified) (7 diffs)
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usb/usbdiag/tests.c (modified) (1 diff)
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usb/usbhub/port.c (modified) (6 diffs)
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usb/usbhub/status.h (modified) (1 diff)
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usb/usbhub/usbhub.c (modified) (9 diffs)
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usb/usbmid/explore.c (modified) (2 diffs)
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usb/vhc/hub/virthub.c (modified) (3 diffs)
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usb/vhc/hub/virthubops.c (modified) (3 diffs)
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usb/xhci/commands.c (modified) (1 diff)
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usb/xhci/debug.c (modified) (2 diffs)
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usb/xhci/endpoint.c (modified) (6 diffs)
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usb/xhci/hc.c (modified) (26 diffs)
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usb/xhci/hw_struct/regs.h (modified) (1 diff)
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usb/xhci/hw_struct/trb.h (modified) (1 diff)
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usb/xhci/isoch.c (modified) (25 diffs)
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usb/xhci/rh.c (modified) (8 diffs)
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usb/xhci/streams.c (modified) (15 diffs)
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usb/xhci/test/reg-ops.c (modified) (9 diffs)
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usb/xhci/transfers.c (modified) (16 diffs)
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usb/xhci/trb_ring.c (modified) (6 diffs)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/isa/i8237.c
r76d0981d r3bacee1 293 293 294 294 ret = pio_enable(DMA_CONTROLLER_SECOND_BASE, 295 sizeof(dma_controller_regs_second_t), (void **) &controller->second);295 sizeof(dma_controller_regs_second_t), (void **) &controller->second); 296 296 if (ret != EOK) 297 297 return EIO; … … 484 484 fibril_mutex_unlock(&guard); 485 485 486 uint16_t remain = (value_high << 8 | value_low) ;486 uint16_t remain = (value_high << 8 | value_low); 487 487 /* 16 bit DMA size is in words, 488 488 * the upper bits are bogus for 16bit transfers so we need to get … … 490 490 if (is_dma16(channel)) 491 491 remain <<= 1; 492 *size = is_dma16(channel) ? remain + 2 : remain + 1;492 *size = is_dma16(channel) ? remain + 2 : remain + 1; 493 493 return EOK; 494 494 } -
uspace/drv/bus/usb/ehci/ehci_batch.c
r76d0981d r3bacee1 53 53 #define EHCI_TD_MAX_TRANSFER (16 * 1024) 54 54 55 static void (*const batch_setup[])(ehci_transfer_batch_t *);55 static void (*const batch_setup[])(ehci_transfer_batch_t *); 56 56 57 57 /** Safely destructs ehci_transfer_batch_t structure … … 74 74 * 75 75 */ 76 ehci_transfer_batch_t * ehci_transfer_batch_create(endpoint_t *ep)76 ehci_transfer_batch_t *ehci_transfer_batch_create(endpoint_t *ep) 77 77 { 78 78 assert(ep); … … 99 99 assert(ehci_batch); 100 100 101 const size_t setup_size = (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) 102 ? USB_SETUP_PACKET_SIZE103 :0;101 const size_t setup_size = (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) ? 102 USB_SETUP_PACKET_SIZE : 103 0; 104 104 105 105 const size_t size = ehci_batch->base.size; … … 109 109 110 110 /* Determine number of TDs needed */ 111 ehci_batch->td_count = (size + EHCI_TD_MAX_TRANSFER - 1) 112 /EHCI_TD_MAX_TRANSFER;111 ehci_batch->td_count = (size + EHCI_TD_MAX_TRANSFER - 1) / 112 EHCI_TD_MAX_TRANSFER; 113 113 114 114 /* Control transfer need Setup and Status stage */ … … 173 173 ehci_batch->qh->next, ehci_batch->qh->alternate); 174 174 175 if (!qh_halted(ehci_batch->qh) && (qh_transfer_pending(ehci_batch->qh) 176 ||qh_transfer_active(ehci_batch->qh)))175 if (!qh_halted(ehci_batch->qh) && (qh_transfer_pending(ehci_batch->qh) || 176 qh_transfer_active(ehci_batch->qh))) 177 177 return false; 178 178 … … 204 204 * we leave the very last(unused) TD behind. 205 205 */ 206 ehci_batch->base.transferred_size 207 -=td_remain_size(&ehci_batch->tds[i]);206 ehci_batch->base.transferred_size -= 207 td_remain_size(&ehci_batch->tds[i]); 208 208 } else { 209 209 usb_log_debug("Batch %p found error TD(%zu):%08x: %s.", … … 274 274 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, ehci_batch->setup_buffer), 275 275 USB_DIRECTION_BOTH, USB_SETUP_PACKET_SIZE, toggle, false); 276 usb_log_debug2("Batch %p: Created CONTROL SETUP TD(%" PRIxn"): "276 usb_log_debug2("Batch %p: Created CONTROL SETUP TD(%" PRIxn "): " 277 277 "%08x:%08x:%08x", ehci_batch, 278 278 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[0]), … … 292 292 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current + 1]), 293 293 buffer, data_dir, transfer_size, toggle, false); 294 usb_log_debug2("Batch %p: Created CONTROL DATA TD(%" PRIxn"): "294 usb_log_debug2("Batch %p: Created CONTROL DATA TD(%" PRIxn "): " 295 295 "%08x:%08x:%08x", ehci_batch, 296 296 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current]), … … 308 308 assert(td_current == ehci_batch->td_count - 1); 309 309 td_init(&ehci_batch->tds[td_current], 0, 0, status_dir, 0, 1, true); 310 usb_log_debug2("Batch %p: Created CONTROL STATUS TD %d(%" PRIxn"): "310 usb_log_debug2("Batch %p: Created CONTROL STATUS TD %d(%" PRIxn "): " 311 311 "%08x:%08x:%08x", ehci_batch, td_current, 312 312 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current]), … … 340 340 ehci_batch->data_buffer); 341 341 while (remain_size > 0) { 342 const size_t transfer_size = remain_size > EHCI_TD_MAX_TRANSFER 343 ?EHCI_TD_MAX_TRANSFER : remain_size;342 const size_t transfer_size = remain_size > EHCI_TD_MAX_TRANSFER ? 343 EHCI_TD_MAX_TRANSFER : remain_size; 344 344 345 345 const bool last = (remain_size == transfer_size); 346 346 td_init(&ehci_batch->tds[td_current], 347 347 last ? 0 : dma_buffer_phys(&ehci_batch->ehci_dma_buffer, 348 &ehci_batch->tds[td_current + 1]),348 &ehci_batch->tds[td_current + 1]), 349 349 buffer, ehci_batch->base.dir, transfer_size, -1, last); 350 350 351 usb_log_debug2("Batch %p: DATA TD(%" PRIxn": %08x:%08x:%08x",351 usb_log_debug2("Batch %p: DATA TD(%" PRIxn ": %08x:%08x:%08x", 352 352 ehci_batch, 353 353 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, 354 &ehci_batch->tds[td_current]),354 &ehci_batch->tds[td_current]), 355 355 ehci_batch->tds[td_current].status, 356 356 ehci_batch->tds[td_current].next, … … 365 365 366 366 /** Transfer setup table. */ 367 static void (*const batch_setup[])(ehci_transfer_batch_t *) =368 {367 static void (*const batch_setup[])(ehci_transfer_batch_t *) = 368 { 369 369 [USB_TRANSFER_CONTROL] = batch_control, 370 370 [USB_TRANSFER_BULK] = batch_data, -
uspace/drv/bus/usb/ehci/ehci_rh.c
r76d0981d r3bacee1 119 119 } 120 120 for (unsigned i = 0; i < instance->port_count; ++i) 121 usb_log_debug2("RH(%p-%u): status: %" PRIx32, instance, i,121 usb_log_debug2("RH(%p-%u): status: %" PRIx32, instance, i, 122 122 EHCI_RD(regs->portsc[i])); 123 123 … … 147 147 assert(batch); 148 148 batch->error = virthub_base_request(&instance->base, batch->target, 149 batch->dir, (void *) batch->setup.buffer,149 batch->dir, (void *) batch->setup.buffer, 150 150 batch->dma_buffer.virt, batch->size, 151 151 &batch->transferred_size); … … 195 195 } 196 196 197 usb_transfer_batch_t * const batch = ep->active_batch;197 usb_transfer_batch_t *const batch = ep->active_batch; 198 198 endpoint_deactivate_locked(ep); 199 199 instance->status_change_endpoint = NULL; … … 206 206 instance, batch); 207 207 batch->error = virthub_base_request(&instance->base, batch->target, 208 batch->dir, (void *) batch->setup.buffer,208 batch->dir, (void *) batch->setup.buffer, 209 209 batch->dma_buffer.virt, batch->size, 210 210 &batch->transferred_size); … … 304 304 EHCI2USB(reg, USB_PORTSC_PORT_POWER_FLAG, USB2_HUB_PORT_STATUS_POWER) | 305 305 (((reg & USB_PORTSC_LINE_STATUS_MASK) == USB_PORTSC_LINE_STATUS_K) ? 306 (USB2_HUB_PORT_STATUS_LOW_SPEED) : 0) |306 (USB2_HUB_PORT_STATUS_LOW_SPEED) : 0) | 307 307 ((reg & USB_PORTSC_PORT_OWNER_FLAG) ? 0 : USB2_HUB_PORT_STATUS_HIGH_SPEED) | 308 308 EHCI2USB(reg, USB_PORTSC_PORT_TEST_MASK, USB2_HUB_PORT_STATUS_TEST) | … … 312 312 (hub->resume_flag[port] ? USB2_HUB_PORT_STATUS_C_SUSPEND : 0) | 313 313 EHCI2USB(reg, USB_PORTSC_OC_CHANGE_FLAG, USB_HUB_PORT_STATUS_C_OC) | 314 (hub->reset_flag[port] ? USB_HUB_PORT_STATUS_C_RESET: 0) 315 ); 314 (hub->reset_flag[port] ? USB_HUB_PORT_STATUS_C_RESET : 0)); 316 315 /* Note feature numbers for test and indicator feature do not 317 316 * correspond to the port status bit locations */ 318 usb_log_debug2("RH(%p-%u) port status: %" PRIx32"(%"PRIx32")", hub, port,317 usb_log_debug2("RH(%p-%u) port status: %" PRIx32 "(%" PRIx32 ")", hub, port, 319 318 status, reg); 320 319 memcpy(data, &status, sizeof(status)); … … 345 344 if (!(EHCI_RD(job->hub->registers->portsc[job->port]) & 346 345 USB_PORTSC_ENABLED_FLAG)) { 347 usb_log_info("RH(%p-%u): Port not enabled after reset (%" PRIX32346 usb_log_info("RH(%p-%u): Port not enabled after reset (%" PRIX32 348 347 "), giving up ownership", job->hub, job->port, 349 348 EHCI_RD(job->hub->registers->portsc[job->port])); … … 370 369 } 371 370 372 static errno_t delayed_job(errno_t (*func)(void *), ehci_rh_t *rh, unsigned port)371 static errno_t delayed_job(errno_t (*func)(void *), ehci_rh_t *rh, unsigned port) 373 372 { 374 373 ehci_rh_job_t *job = malloc(sizeof(*job)); … … 405 404 const unsigned feature = uint16_usb2host(setup_packet->value); 406 405 /* Enabled features to clear: see page 269 of USB specs */ 407 switch (feature) 408 { 406 switch (feature) { 409 407 case USB_HUB_FEATURE_PORT_POWER: /*8*/ 410 408 usb_log_debug2("RH(%p-%u): Clear port power.", hub, port); … … 424 422 if ((EHCI_RD(hub->registers->portsc[port]) & 425 423 USB_PORTSC_SUSPEND_FLAG) == 0) 426 return EOK;424 return EOK; 427 425 /* Host driven resume */ 428 426 EHCI_SET(hub->registers->portsc[port], … … 542 540 if ((status & USB_PORTSC_CONNECT_CH_FLAG) && 543 541 (status & USB_PORTSC_LINE_STATUS_MASK) == 544 USB_PORTSC_LINE_STATUS_K)542 USB_PORTSC_LINE_STATUS_K) 545 543 EHCI_SET(hub->registers->portsc[port], 546 544 USB_PORTSC_PORT_OWNER_FLAG); … … 550 548 } 551 549 552 usb_log_debug2("RH(%p): root hub interrupt mask: %" PRIx16, hub, mask);550 usb_log_debug2("RH(%p): root hub interrupt mask: %" PRIx16, hub, mask); 553 551 554 552 if (mask == 0) … … 619 617 /** Virtual EHCI root hub ops */ 620 618 static usbvirt_device_ops_t ops = { 621 .control = control_transfer_handlers,622 .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler,619 .control = control_transfer_handlers, 620 .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler, 623 621 }; -
uspace/drv/bus/usb/ehci/hc.c
r76d0981d r3bacee1 133 133 134 134 ehci_regs_t *registers = 135 (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(instance->caps->caplength));135 (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(instance->caps->caplength)); 136 136 code->cmds[0].addr = (void *) ®isters->usbsts; 137 137 code->cmds[3].addr = (void *) ®isters->usbsts; … … 158 158 if (hw_res->mem_ranges.count != 1 || 159 159 hw_res->mem_ranges.ranges[0].size < 160 (sizeof(ehci_caps_regs_t) + sizeof(ehci_regs_t)))161 return EINVAL;160 (sizeof(ehci_caps_regs_t) + sizeof(ehci_regs_t))) 161 return EINVAL; 162 162 163 163 errno_t ret = pio_enable_range(&hw_res->mem_ranges.ranges[0], … … 169 169 } 170 170 171 usb_log_info("HC(%p): Device registers at %" PRIx64" (%zuB) accessible.",171 usb_log_info("HC(%p): Device registers at %" PRIx64 " (%zuB) accessible.", 172 172 instance, hw_res->mem_ranges.ranges[0].address.absolute, 173 173 hw_res->mem_ranges.ranges[0].size); 174 174 instance->registers = 175 (void *)instance->caps + EHCI_RD8(instance->caps->caplength);175 (void *)instance->caps + EHCI_RD8(instance->caps->caplength); 176 176 usb_log_info("HC(%p): Device control registers at %" PRIx64, instance, 177 hw_res->mem_ranges.ranges[0].address.absolute 178 +EHCI_RD8(instance->caps->caplength));177 hw_res->mem_ranges.ranges[0].address.absolute + 178 EHCI_RD8(instance->caps->caplength)); 179 179 180 180 list_initialize(&instance->pending_endpoints); … … 221 221 usb_str_transfer_type_short(ep->transfer_type), 222 222 usb_str_direction(ep->direction)); 223 switch (ep->transfer_type) 224 { 223 switch (ep->transfer_type) { 225 224 case USB_TRANSFER_CONTROL: 226 225 case USB_TRANSFER_BULK: … … 245 244 usb_str_transfer_type_short(ep->transfer_type), 246 245 usb_str_direction(ep->direction)); 247 switch (ep->transfer_type) 248 { 246 switch (ep->transfer_type) { 249 247 case USB_TRANSFER_INTERRUPT: 250 248 endpoint_list_remove_ep(&instance->int_list, ehci_ep); … … 305 303 } 306 304 307 endpoint_t * const ep = batch->ep;308 ehci_endpoint_t * const ehci_ep = ehci_endpoint_get(ep);305 endpoint_t *const ep = batch->ep; 306 ehci_endpoint_t *const ehci_ep = ehci_endpoint_get(ep); 309 307 ehci_transfer_batch_t *ehci_batch = ehci_transfer_batch_get(batch); 310 308 … … 345 343 assert(hc); 346 344 347 usb_log_debug2("HC(%p): Interrupt: %" PRIx32, hc, status);345 usb_log_debug2("HC(%p): Interrupt: %" PRIx32, hc, status); 348 346 if (status & USB_STS_PORT_CHANGE_FLAG) { 349 347 ehci_rh_interrupt(&hc->rh); … … 361 359 362 360 usb_log_debug2("HC(%p): Scanning %lu pending endpoints", hc, 363 list_count(&hc->pending_endpoints));361 list_count(&hc->pending_endpoints)); 364 362 list_foreach_safe(hc->pending_endpoints, current, next) { 365 ehci_endpoint_t *ep 366 =list_get_instance(current, ehci_endpoint_t, pending_link);367 368 ehci_transfer_batch_t *batch 369 =ehci_transfer_batch_get(ep->base.active_batch);363 ehci_endpoint_t *ep = 364 list_get_instance(current, ehci_endpoint_t, pending_link); 365 366 ehci_transfer_batch_t *batch = 367 ehci_transfer_batch_get(ep->base.active_batch); 370 368 assert(batch); 371 369 … … 429 427 assert(instance->periodic_list); 430 428 uintptr_t phys_base = 431 addr_to_phys((void *)instance->periodic_list);429 addr_to_phys((void *)instance->periodic_list); 432 430 assert((phys_base & USB_PERIODIC_LIST_BASE_MASK) == phys_base); 433 431 EHCI_WR(instance->registers->periodiclistbase, phys_base); … … 437 435 438 436 /* Enable Async schedule */ 439 phys_base = addr_to_phys((void *)instance->async_list.list_head);437 phys_base = addr_to_phys((void *)instance->async_list.list_head); 440 438 assert((phys_base & USB_ASYNCLIST_MASK) == phys_base); 441 439 EHCI_WR(instance->registers->asynclistaddr, phys_base); … … 516 514 517 515 usb_log_debug2("HC(%p): Initializing Periodic list.", instance); 518 for (unsigned i = 0; i < PAGE_SIZE/sizeof(link_pointer_t); ++i) 519 { 516 for (unsigned i = 0; i < PAGE_SIZE / sizeof(link_pointer_t); ++i) { 520 517 /* Disable everything for now */ 521 518 instance->periodic_list[i] = -
uspace/drv/bus/usb/ehci/hw_struct/transfer_descriptor.c
r76d0981d r3bacee1 92 92 ((dir[direction] & TD_STATUS_PID_MASK) << TD_STATUS_PID_SHIFT) | 93 93 ((size & TD_STATUS_TOTAL_MASK) << TD_STATUS_TOTAL_SHIFT) | 94 (ioc ? TD_STATUS_IOC_FLAG : 0) );94 (ioc ? TD_STATUS_IOC_FLAG : 0)); 95 95 96 96 if (toggle == 0 || toggle == 1) { … … 101 101 if (buffer != 0) { 102 102 assert(size != 0); 103 for (unsigned i = 0; (i < ARRAY_SIZE(instance->buffer_pointer)) 104 &&size; ++i) {103 for (unsigned i = 0; (i < ARRAY_SIZE(instance->buffer_pointer)) && 104 size; ++i) { 105 105 const uintptr_t offset = buffer & TD_BUFFER_POINTER_OFFSET_MASK; 106 106 assert(offset == 0 || i == 0); -
uspace/drv/bus/usb/ehci/res.c
r76d0981d r3bacee1 95 95 ret = pci_config_space_read_32( 96 96 parent_sess, eecp + USBLEGSUP_OFFSET, &usblegsup); 97 while ((ret == EOK) && (wait < DEFAULT_WAIT) 98 &&(usblegsup & USBLEGSUP_BIOS_CONTROL)) {97 while ((ret == EOK) && (wait < DEFAULT_WAIT) && 98 (usblegsup & USBLEGSUP_BIOS_CONTROL)) { 99 99 async_usleep(WAIT_STEP); 100 100 ret = pci_config_space_read_32(parent_sess, … … 109 109 110 110 /* BIOS failed to hand over control, this should not happen. */ 111 usb_log_warning( "BIOS failed to release control after "111 usb_log_warning("BIOS failed to release control after " 112 112 "%zu usecs, force it.", wait); 113 113 ret = pci_config_space_write_32(parent_sess, … … 197 197 usb_log_error("Failed to disable extended capabilities: %s.", 198 198 str_error(ret)); 199 goto clean;199 goto clean; 200 200 } 201 201 clean: -
uspace/drv/bus/usb/ohci/hc.c
r76d0981d r3bacee1 158 158 if (hw_res->mem_ranges.count != 1 || 159 159 hw_res->mem_ranges.ranges[0].size < sizeof(ohci_regs_t)) 160 return EINVAL;160 return EINVAL; 161 161 162 162 errno_t ret = pio_enable_range(&hw_res->mem_ranges.ranges[0], … … 273 273 assert(hc); 274 274 275 if (hc->registers) {275 if (hc->registers) { 276 276 *status = OHCI_RD(hc->registers->interrupt_status); 277 277 OHCI_WR(hc->registers->interrupt_status, *status); … … 301 301 302 302 endpoint_t *ep = batch->ep; 303 ohci_endpoint_t * const ohci_ep = ohci_endpoint_get(ep);303 ohci_endpoint_t *const ohci_ep = ohci_endpoint_get(ep); 304 304 ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch); 305 305 int err; … … 319 319 320 320 /* Control and bulk schedules need a kick to start working */ 321 switch (batch->ep->transfer_type) 322 { 321 switch (batch->ep->transfer_type) { 323 322 case USB_TRANSFER_CONTROL: 324 323 OHCI_SET(hc->registers->command_status, CS_CLF); … … 364 363 365 364 list_foreach_safe(hc->pending_endpoints, current, next) { 366 ohci_endpoint_t *ep 367 =list_get_instance(current, ohci_endpoint_t, pending_link);368 369 ohci_transfer_batch_t *batch 370 =ohci_transfer_batch_get(ep->base.active_batch);365 ohci_endpoint_t *ep = 366 list_get_instance(current, ohci_endpoint_t, pending_link); 367 368 ohci_transfer_batch_t *batch = 369 ohci_transfer_batch_get(ep->base.active_batch); 371 370 assert(batch); 372 371 … … 407 406 */ 408 407 volatile uint32_t *ohci_emulation_reg = 409 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);408 (uint32_t *)((char *)instance->registers + LEGACY_REGS_OFFSET); 410 409 usb_log_debug("OHCI legacy register %p: %x.", 411 410 ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg)); -
uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.c
r76d0981d r3bacee1 81 81 /* Status: address, endpoint nr, direction mask and max packet size. */ 82 82 OHCI_MEM32_WR(instance->status, 83 ((ep->device->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT) 84 | ((ep->endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT)85 | ((dir[ep->direction] & ED_STATUS_D_MASK) << ED_STATUS_D_SHIFT)86 |((ep->max_packet_size & ED_STATUS_MPS_MASK) << ED_STATUS_MPS_SHIFT));83 ((ep->device->address & ED_STATUS_FA_MASK) << ED_STATUS_FA_SHIFT) | 84 ((ep->endpoint & ED_STATUS_EN_MASK) << ED_STATUS_EN_SHIFT) | 85 ((dir[ep->direction] & ED_STATUS_D_MASK) << ED_STATUS_D_SHIFT) | 86 ((ep->max_packet_size & ED_STATUS_MPS_MASK) << ED_STATUS_MPS_SHIFT)); 87 87 88 88 /* Low speed flag */ -
uspace/drv/bus/usb/ohci/hw_struct/endpoint_descriptor.h
r76d0981d r3bacee1 119 119 { 120 120 assert(instance); 121 return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_HALTED_FLAG) 122 ||(OHCI_MEM32_RD(instance->status) & ED_STATUS_K_FLAG);121 return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_HALTED_FLAG) || 122 (OHCI_MEM32_RD(instance->status) & ED_STATUS_K_FLAG); 123 123 } 124 124 … … 137 137 { 138 138 assert(instance); 139 return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_PTR_MASK) 140 !=(OHCI_MEM32_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK);139 return (OHCI_MEM32_RD(instance->td_head) & ED_TDHEAD_PTR_MASK) != 140 (OHCI_MEM32_RD(instance->td_tail) & ED_TDTAIL_PTR_MASK); 141 141 } 142 142 -
uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c
r76d0981d r3bacee1 68 68 /* Set PID and Error code */ 69 69 OHCI_MEM32_WR(instance->status, 70 ((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT) 71 |((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT));70 ((dir[direction] & TD_STATUS_DP_MASK) << TD_STATUS_DP_SHIFT) | 71 ((CC_NOACCESS2 & TD_STATUS_CC_MASK) << TD_STATUS_CC_SHIFT)); 72 72 73 73 if (toggle == 0 || toggle == 1) { -
uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.h
r76d0981d r3bacee1 103 103 { 104 104 assert(instance); 105 const int cc = (OHCI_MEM32_RD(instance->status) >> TD_STATUS_CC_SHIFT) 106 &TD_STATUS_CC_MASK;105 const int cc = (OHCI_MEM32_RD(instance->status) >> TD_STATUS_CC_SHIFT) & 106 TD_STATUS_CC_MASK; 107 107 /* This value is changed on transfer completion, 108 108 * either to CC_NOERROR or and error code. … … 122 122 { 123 123 assert(instance); 124 const int cc = (OHCI_MEM32_RD(instance->status) 125 >>TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK;124 const int cc = (OHCI_MEM32_RD(instance->status) >> 125 TD_STATUS_CC_SHIFT) & TD_STATUS_CC_MASK; 126 126 return cc_to_rc(cc); 127 127 } -
uspace/drv/bus/usb/ohci/ohci_batch.c
r76d0981d r3bacee1 48 48 #include "ohci_bus.h" 49 49 50 static void (*const batch_setup[])(ohci_transfer_batch_t *);50 static void (*const batch_setup[])(ohci_transfer_batch_t *); 51 51 52 52 /** Safely destructs ohci_transfer_batch_t structure … … 67 67 * NULL otherwise. 68 68 */ 69 ohci_transfer_batch_t * ohci_transfer_batch_create(endpoint_t *ep)69 ohci_transfer_batch_t *ohci_transfer_batch_create(endpoint_t *ep) 70 70 { 71 71 assert(ep); … … 97 97 return ENOTSUP; 98 98 99 ohci_batch->td_count = (usb_batch->size + OHCI_TD_MAX_TRANSFER - 1) 100 /OHCI_TD_MAX_TRANSFER;99 ohci_batch->td_count = (usb_batch->size + OHCI_TD_MAX_TRANSFER - 1) / 100 OHCI_TD_MAX_TRANSFER; 101 101 /* Control transfer need Setup and Status stage */ 102 102 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) { … … 110 110 111 111 const size_t td_size = ohci_batch->td_count * sizeof(td_t); 112 const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) 113 ? USB_SETUP_PACKET_SIZE114 :0;112 const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) ? 113 USB_SETUP_PACKET_SIZE : 114 0; 115 115 116 116 if (dma_buffer_alloc(&ohci_batch->ohci_dma_buffer, td_size + setup_size)) { … … 190 190 * we leave the very last(unused) TD behind. 191 191 */ 192 usb_batch->transferred_size 193 -=td_remain_size(ohci_batch->tds[i]);192 usb_batch->transferred_size -= 193 td_remain_size(ohci_batch->tds[i]); 194 194 } else { 195 195 usb_log_debug("Batch %p found error TD(%zu):%08x.", … … 289 289 /* Data stage */ 290 290 size_t td_current = 1; 291 const char *buffer = ohci_batch->data_buffer;291 const char *buffer = ohci_batch->data_buffer; 292 292 size_t remain_size = ohci_batch->base.size; 293 293 while (remain_size > 0) { … … 347 347 char *buffer = ohci_batch->data_buffer; 348 348 while (remain_size > 0) { 349 const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER 350 ?OHCI_TD_MAX_TRANSFER : remain_size;349 const size_t transfer_size = remain_size > OHCI_TD_MAX_TRANSFER ? 350 OHCI_TD_MAX_TRANSFER : remain_size; 351 351 352 352 td_init( … … 374 374 375 375 /** Transfer setup table. */ 376 static void (*const batch_setup[])(ohci_transfer_batch_t *) =377 {376 static void (*const batch_setup[])(ohci_transfer_batch_t *) = 377 { 378 378 [USB_TRANSFER_CONTROL] = batch_control, 379 379 [USB_TRANSFER_BULK] = batch_data, -
uspace/drv/bus/usb/ohci/ohci_bus.c
r76d0981d r3bacee1 134 134 static void ohci_unregister_ep(endpoint_t *ep) 135 135 { 136 ohci_bus_t * const bus = (ohci_bus_t *) endpoint_get_bus(ep);137 hc_t * const hc = bus->hc;136 ohci_bus_t *const bus = (ohci_bus_t *) endpoint_get_bus(ep); 137 hc_t *const hc = bus->hc; 138 138 assert(ep); 139 139 … … 151 151 endpoint_set_offline_locked(ep); 152 152 list_remove(&ohci_ep->pending_link); 153 usb_transfer_batch_t * const batch = ep->active_batch;153 usb_transfer_batch_t *const batch = ep->active_batch; 154 154 endpoint_deactivate_locked(ep); 155 155 fibril_mutex_unlock(&hc->guard); -
uspace/drv/bus/usb/ohci/ohci_rh.c
r76d0981d r3bacee1 94 94 } else { 95 95 instance->hub_descriptor.rempow[1] = 96 ((port_desc >> RHDB_DR_SHIFT) >> 8) & 0xff;96 ((port_desc >> RHDB_DR_SHIFT) >> 8) & 0xff; 97 97 } 98 98 … … 224 224 } 225 225 226 usb_transfer_batch_t * const batch = ep->active_batch;226 usb_transfer_batch_t *const batch = ep->active_batch; 227 227 endpoint_deactivate_locked(ep); 228 228 instance->status_change_endpoint = NULL; … … 347 347 const unsigned feature = uint16_usb2host(setup_packet->value); 348 348 /* Enabled features to clear: see page 269 of USB specs */ 349 switch (feature) 350 { 349 switch (feature) { 351 350 case USB_HUB_FEATURE_PORT_POWER: /*8*/ 352 351 rhda = OHCI_RD(hub->registers->rh_desc_a); … … 418 417 /* Ganged power switching, one port powers all */ 419 418 if (!(rhda & RHDA_PSM_FLAG)) { 420 OHCI_WR(hub->registers->rh_status, RHS_SET_GLOBAL_POWER);419 OHCI_WR(hub->registers->rh_status, RHS_SET_GLOBAL_POWER); 421 420 return EOK; 422 421 } … … 467 466 for (unsigned port = 1; port <= hub->port_count; ++port) { 468 467 /* Write-clean bits are those that indicate change */ 469 if (OHCI_RD(hub->registers->rh_port_status[port - 1]) 470 &RHPS_CHANGE_WC_MASK) {468 if (OHCI_RD(hub->registers->rh_port_status[port - 1]) & 469 RHPS_CHANGE_WC_MASK) { 471 470 mask |= (1 << port); 472 471 } … … 542 541 /** Virtual OHCI root hub ops */ 543 542 static usbvirt_device_ops_t ops = { 544 .control = control_transfer_handlers,545 .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler,543 .control = control_transfer_handlers, 544 .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler, 546 545 }; -
uspace/drv/bus/usb/uhci/hc.c
r76d0981d r3bacee1 142 142 memcpy(code->cmds, uhci_irq_commands, sizeof(uhci_irq_commands)); 143 143 uhci_regs_t *registers = (uhci_regs_t *) RNGABSPTR(regs); 144 code->cmds[0].addr = (void *)®isters->usbsts;145 code->cmds[3].addr = (void *)®isters->usbsts;144 code->cmds[0].addr = (void *)®isters->usbsts; 145 code->cmds[3].addr = (void *)®isters->usbsts; 146 146 147 147 usb_log_debug("I/O regs at %p (size %zu), IRQ %d.", … … 215 215 if (hw_res->io_ranges.count != 1 || 216 216 hw_res->io_ranges.ranges[0].size < sizeof(uhci_regs_t)) 217 return EINVAL;217 return EINVAL; 218 218 219 219 instance->hw_failures = 0; … … 224 224 if (ret != EOK) { 225 225 usb_log_error("Failed to gain access to registers: %s.", 226 str_error(ret));226 str_error(ret)); 227 227 return ret; 228 228 } … … 285 285 /* Reset hc, all states and counters. Hope that hw is not broken */ 286 286 pio_write_16(®isters->usbcmd, UHCI_CMD_HCRESET); 287 do { async_usleep(10); } 288 while ((pio_read_16(®isters->usbcmd) & UHCI_CMD_HCRESET) != 0); 287 do { 288 async_usleep(10); 289 } while ((pio_read_16(®isters->usbcmd) & UHCI_CMD_HCRESET) != 0); 289 290 290 291 /* Set frame to exactly 1ms */ … … 331 332 static errno_t endpoint_register(endpoint_t *ep) 332 333 { 333 hc_t * const hc = bus_to_hc(endpoint_get_bus(ep));334 hc_t *const hc = bus_to_hc(endpoint_get_bus(ep)); 334 335 335 336 const errno_t err = usb2_bus_endpoint_register(&hc->bus_helper, ep); … … 353 354 static void endpoint_unregister(endpoint_t *ep) 354 355 { 355 hc_t * const hc = bus_to_hc(endpoint_get_bus(ep));356 hc_t *const hc = bus_to_hc(endpoint_get_bus(ep)); 356 357 usb2_bus_endpoint_unregister(&hc->bus_helper, ep); 357 358 … … 390 391 } 391 392 392 uhci_transfer_batch_t * const batch =393 uhci_transfer_batch_get(ep->active_batch);393 uhci_transfer_batch_t *const batch = 394 uhci_transfer_batch_get(ep->active_batch); 394 395 395 396 /* Remove the batch from the schedule to stop it from being finished. */ … … 412 413 static int device_enumerate(device_t *dev) 413 414 { 414 hc_t * const hc = bus_to_hc(dev->bus);415 hc_t *const hc = bus_to_hc(dev->bus); 415 416 return usb2_bus_device_enumerate(&hc->bus_helper, dev); 416 417 } … … 418 419 static void device_gone(device_t *dev) 419 420 { 420 hc_t * const hc = bus_to_hc(dev->bus);421 hc_t *const hc = bus_to_hc(dev->bus); 421 422 usb2_bus_device_gone(&hc->bus_helper, dev); 422 423 } … … 482 483 /* Set all frames to point to the first queue head */ 483 484 const uint32_t queue = LINK_POINTER_QH( 484 addr_to_phys(instance->transfers_interrupt.queue_head));485 addr_to_phys(instance->transfers_interrupt.queue_head)); 485 486 486 487 for (unsigned i = 0; i < UHCI_FRAME_LIST_COUNT; ++i) { … … 524 525 /* Connect lists into one schedule */ 525 526 transfer_list_set_next(&instance->transfers_control_full, 526 &instance->transfers_bulk_full);527 &instance->transfers_bulk_full); 527 528 transfer_list_set_next(&instance->transfers_control_slow, 528 &instance->transfers_control_full);529 &instance->transfers_control_full); 529 530 transfer_list_set_next(&instance->transfers_interrupt, 530 &instance->transfers_control_slow);531 &instance->transfers_control_slow); 531 532 532 533 /*FSBR, This feature is not needed (adds no benefit) and is supposedly … … 539 540 /* Assign pointers to be used during scheduling */ 540 541 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_INTERRUPT] = 541 &instance->transfers_interrupt;542 &instance->transfers_interrupt; 542 543 instance->transfers[USB_SPEED_LOW][USB_TRANSFER_INTERRUPT] = 543 &instance->transfers_interrupt;544 &instance->transfers_interrupt; 544 545 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_CONTROL] = 545 &instance->transfers_control_full;546 &instance->transfers_control_full; 546 547 instance->transfers[USB_SPEED_LOW][USB_TRANSFER_CONTROL] = 547 &instance->transfers_control_slow;548 &instance->transfers_control_slow; 548 549 instance->transfers[USB_SPEED_FULL][USB_TRANSFER_BULK] = 549 &instance->transfers_bulk_full;550 &instance->transfers_bulk_full; 550 551 551 552 return EOK; … … 582 583 return uhci_rh_schedule(&hc->rh, batch); 583 584 584 transfer_list_t * const list =585 transfer_list_t *const list = 585 586 hc->transfers[ep->device->speed][ep->transfer_type]; 586 587 … … 629 630 int frnum = pio_read_16(&instance->registers->frnum) & 0x3ff; 630 631 631 uintptr_t expected_pa = instance->frame_list[frnum] 632 &LINK_POINTER_ADDRESS_MASK;632 uintptr_t expected_pa = instance->frame_list[frnum] & 633 LINK_POINTER_ADDRESS_MASK; 633 634 uintptr_t real_pa = addr_to_phys(QH(interrupt)); 634 635 if (expected_pa != real_pa) { … … 653 654 expected_pa = QH(control_full)->next & LINK_POINTER_ADDRESS_MASK; 654 655 real_pa = addr_to_phys(QH(bulk_full)); 655 if (expected_pa != real_pa ) {656 if (expected_pa != real_pa) { 656 657 usb_log_debug("Bulk QH: %p vs. %p.", 657 658 (void *) expected_pa, (void *) real_pa); -
uspace/drv/bus/usb/uhci/hw_struct/transfer_descriptor.c
r76d0981d r3bacee1 72 72 assert(instance); 73 73 assert(size < 1024); 74 assert((pid == USB_PID_SETUP) || (pid == USB_PID_IN) 75 ||(pid == USB_PID_OUT));74 assert((pid == USB_PID_SETUP) || (pid == USB_PID_IN) || 75 (pid == USB_PID_OUT)); 76 76 77 77 const uint32_t next_pa = addr_to_phys(next); 78 78 assert((next_pa & LINK_POINTER_ADDRESS_MASK) == next_pa); 79 79 80 instance->next = 0 81 | LINK_POINTER_VERTICAL_FLAG82 |(next_pa ? next_pa : LINK_POINTER_TERMINATE_FLAG);80 instance->next = 0 | 81 LINK_POINTER_VERTICAL_FLAG | 82 (next_pa ? next_pa : LINK_POINTER_TERMINATE_FLAG); 83 83 84 instance->status = 0 85 | ((err_count & TD_STATUS_ERROR_COUNT_MASK)86 << TD_STATUS_ERROR_COUNT_POS)87 | (low_speed ? TD_STATUS_LOW_SPEED_FLAG : 0)88 | (iso ? TD_STATUS_ISOCHRONOUS_FLAG : 0)89 |TD_STATUS_ERROR_ACTIVE;84 instance->status = 0 | 85 ((err_count & TD_STATUS_ERROR_COUNT_MASK) << 86 TD_STATUS_ERROR_COUNT_POS) | 87 (low_speed ? TD_STATUS_LOW_SPEED_FLAG : 0) | 88 (iso ? TD_STATUS_ISOCHRONOUS_FLAG : 0) | 89 TD_STATUS_ERROR_ACTIVE; 90 90 91 91 if (pid == USB_PID_IN && !iso) { … … 93 93 } 94 94 95 instance->device = 0 96 | (((size - 1) & TD_DEVICE_MAXLEN_MASK) << TD_DEVICE_MAXLEN_POS)97 | (toggle ? TD_DEVICE_DATA_TOGGLE_ONE_FLAG : 0)98 | ((target.address & TD_DEVICE_ADDRESS_MASK)99 << TD_DEVICE_ADDRESS_POS)100 | ((target.endpoint & TD_DEVICE_ENDPOINT_MASK)101 << TD_DEVICE_ENDPOINT_POS)102 |((pid & TD_DEVICE_PID_MASK) << TD_DEVICE_PID_POS);95 instance->device = 0 | 96 (((size - 1) & TD_DEVICE_MAXLEN_MASK) << TD_DEVICE_MAXLEN_POS) | 97 (toggle ? TD_DEVICE_DATA_TOGGLE_ONE_FLAG : 0) | 98 ((target.address & TD_DEVICE_ADDRESS_MASK) << 99 TD_DEVICE_ADDRESS_POS) | 100 ((target.endpoint & TD_DEVICE_ENDPOINT_MASK) << 101 TD_DEVICE_ENDPOINT_POS) | 102 ((pid & TD_DEVICE_PID_MASK) << TD_DEVICE_PID_POS); 103 103 104 104 instance->buffer_ptr = addr_to_phys(buffer); … … 175 175 (s & TD_STATUS_ERROR_BIT_STUFF) ? " BIT_STUFF," : "", 176 176 (s & TD_STATUS_ERROR_RESERVED) ? " RESERVED," : "", 177 td_act_size(instance) 178 ); 177 td_act_size(instance)); 179 178 } 180 179 /** -
uspace/drv/bus/usb/uhci/hw_struct/transfer_descriptor.h
r76d0981d r3bacee1 129 129 const size_t act_size = td_act_size(instance); 130 130 const size_t max_size = 131 ((instance->device >> TD_DEVICE_MAXLEN_POS) + 1) 132 &TD_DEVICE_MAXLEN_MASK;131 ((instance->device >> TD_DEVICE_MAXLEN_POS) + 1) & 132 TD_DEVICE_MAXLEN_MASK; 133 133 return 134 134 (instance->status | TD_STATUS_SPD_FLAG) && act_size < max_size; -
uspace/drv/bus/usb/uhci/transfer_list.c
r76d0981d r3bacee1 66 66 } 67 67 const uint32_t queue_head_pa = addr_to_phys(instance->queue_head); 68 usb_log_debug2("Transfer list %s setup with QH: %p (%#" PRIx32 " ).",68 usb_log_debug2("Transfer list %s setup with QH: %p (%#" PRIx32 " ).", 69 69 name, instance->queue_head, queue_head_pa); 70 70 … … 203 203 fibril_mutex_lock(&instance->guard); 204 204 while (!list_empty(&instance->batch_list)) { 205 link_t * const current = list_first(&instance->batch_list);205 link_t *const current = list_first(&instance->batch_list); 206 206 uhci_transfer_batch_t *batch = uhci_transfer_batch_from_link(current); 207 207 transfer_list_remove_batch(instance, batch); … … 240 240 qpos = "NOT FIRST"; 241 241 } 242 assert((prev_qh->next & LINK_POINTER_ADDRESS_MASK) 243 ==addr_to_phys(uhci_batch->qh));242 assert((prev_qh->next & LINK_POINTER_ADDRESS_MASK) == 243 addr_to_phys(uhci_batch->qh)); 244 244 prev_qh->next = uhci_batch->qh->next; 245 245 -
uspace/drv/bus/usb/uhci/uhci_rh.c
r76d0981d r3bacee1 107 107 do { 108 108 batch->error = virthub_base_request(&instance->base, batch->target, 109 batch->dir, (void *) batch->setup.buffer,109 batch->dir, (void *) batch->setup.buffer, 110 110 batch->dma_buffer.virt, batch->size, &batch->transferred_size); 111 111 if (batch->error == ENAK) … … 151 151 port_status &= ~STATUS_IN_RESET; 152 152 pio_write_16(port, port_status); 153 while ((port_status = pio_read_16(port)) & STATUS_IN_RESET); 153 while ((port_status = pio_read_16(port)) & STATUS_IN_RESET) 154 ; 154 155 /* PIO delay, should not be longer than 3ms as the device might 155 156 * enter suspend state. */ … … 201 202 202 203 const uint16_t value = pio_read_16(hub->ports[port]); 203 data[0] = ((value & STATUS_LINE_D_MINUS) ? 1 : 0) 204 |((value & STATUS_LINE_D_PLUS) ? 2 : 0);205 RH_DEBUG(hub, port, "Bus state %" PRIx8 "(source %" PRIx16 ")",204 data[0] = ((value & STATUS_LINE_D_MINUS) ? 1 : 0) | 205 ((value & STATUS_LINE_D_PLUS) ? 2 : 0); 206 RH_DEBUG(hub, port, "Bus state %" PRIx8 "(source %" PRIx16 ")", 206 207 data[0], value); 207 208 *act_size = 1; … … 246 247 UHCI2USB(val, STATUS_ENABLED_CHANGED, USB2_HUB_PORT_STATUS_C_ENABLE) | 247 248 // UHCI2USB(val, STATUS_SUSPEND, USB2_HUB_PORT_STATUS_C_SUSPEND) | 248 (hub->reset_changed[port] ? USB_HUB_PORT_STATUS_C_RESET : 0) 249 ); 249 (hub->reset_changed[port] ? USB_HUB_PORT_STATUS_C_RESET : 0)); 250 250 RH_DEBUG(hub, port, "Port status %" PRIx32 " (source %" PRIx16 251 251 "%s)", uint32_usb2host(status), val, … … 413 413 const uint8_t status = 414 414 ((((status_a & STATUS_CHANGE_BITS) != 0) || hub->reset_changed[0]) ? 415 0x2 : 0) |415 0x2 : 0) | 416 416 ((((status_b & STATUS_CHANGE_BITS) != 0) || hub->reset_changed[1]) ? 417 0x4 : 0);417 0x4 : 0); 418 418 if (status) 419 419 RH_DEBUG(hub, -1, "Event mask %" PRIx8 … … 421 421 " (status_b %" PRIx16 "%s)", status, 422 422 status_a, hub->reset_changed[0] ? "-reset" : "", 423 status_b, hub->reset_changed[1] ? "-reset" : "" );423 status_b, hub->reset_changed[1] ? "-reset" : ""); 424 424 ((uint8_t *)buffer)[0] = status; 425 425 *actual_size = 1; … … 496 496 497 497 static usbvirt_device_ops_t ops = { 498 .control = control_transfer_handlers,499 .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler,498 .control = control_transfer_handlers, 499 .data_in[HUB_STATUS_CHANGE_PIPE] = req_status_change_handler, 500 500 }; -
uspace/drv/bus/usb/usbdiag/tests.c
r76d0981d r3bacee1 111 111 if (beef_buffer[i] != test_data) { 112 112 usb_log_error("Read of %s IN endpoint returned " 113 "invalid data at address %zu. [ 0x%X != 0x%X ]",114 usb_str_transfer_type(pipe->desc.transfer_type), i * sizeof(test_data), beef_buffer[i], test_data);113 "invalid data at address %zu. [ 0x%X != 0x%X ]", 114 usb_str_transfer_type(pipe->desc.transfer_type), i * sizeof(test_data), beef_buffer[i], test_data); 115 115 rc = EINVAL; 116 116 } -
uspace/drv/bus/usb/usbhub/port.c
r76d0981d r3bacee1 126 126 port_log(debug, port, "Resetting port."); 127 127 if ((err = usb_hub_set_port_feature(port->hub, port->port_number, 128 USB_HUB_FEATURE_PORT_RESET))) {128 USB_HUB_FEATURE_PORT_RESET))) { 129 129 port_log(warning, port, "Port reset request failed: %s", 130 130 str_error(err)); … … 140 140 port_log(debug, port, "Enumerating device."); 141 141 if ((err = usbhc_device_enumerate(exch, port->port_number, 142 port->speed))) {142 port->speed))) { 143 143 port_log(error, port, "Failed to enumerate device: %s", 144 144 str_error(err)); … … 165 165 port_log(debug, port, "Issuing a warm reset."); 166 166 if ((err = usb_hub_set_port_feature(port->hub, port->port_number, 167 USB3_HUB_FEATURE_BH_PORT_RESET))) {167 USB3_HUB_FEATURE_BH_PORT_RESET))) { 168 168 port_log(warning, port, "Port reset request failed: %s", 169 169 str_error(err)); … … 179 179 port_log(debug, port, "Enumerating device."); 180 180 if ((err = usbhc_device_enumerate(exch, port->port_number, 181 port->speed))) {181 port->speed))) { 182 182 port_log(error, port, "Failed to enumerate device: %s", 183 183 str_error(err)); … … 200 200 } 201 201 202 const errno_t err = port->hub->speed == USB_SPEED_SUPER 203 ? enumerate_device_usb3(port, exch)204 :enumerate_device_usb2(port, exch);202 const errno_t err = port->hub->speed == USB_SPEED_SUPER ? 203 enumerate_device_usb3(port, exch) : 204 enumerate_device_usb2(port, exch); 205 205 206 206 usb_device_bus_exchange_end(exch); … … 211 211 { 212 212 const bool connected = !!(status & USB_HUB_PORT_STATUS_CONNECTION); 213 port_log(debug, port, "Connection change: device %s.", connected 214 ?"attached" : "removed");213 port_log(debug, port, "Connection change: device %s.", connected ? 214 "attached" : "removed"); 215 215 216 216 if (connected) { -
uspace/drv/bus/usb/usbhub/status.h
r76d0981d r3bacee1 59 59 if (hub_speed == USB_SPEED_SUPER) 60 60 return USB_SPEED_SUPER; 61 if (hub_speed == USB_SPEED_HIGH 62 &&(status & USB2_HUB_PORT_STATUS_HIGH_SPEED))61 if (hub_speed == USB_SPEED_HIGH && 62 (status & USB2_HUB_PORT_STATUS_HIGH_SPEED)) 63 63 return USB_SPEED_HIGH; 64 64 if ((status & USB2_HUB_PORT_STATUS_LOW_SPEED) != 0) -
uspace/drv/bus/usb/usbhub/usbhub.c
r76d0981d r3bacee1 83 83 */ 84 84 static const usb_endpoint_description_t 85 status_change_single_tt_only = HUB_STATUS_CHANGE_EP(0),86 status_change_mtt_available = HUB_STATUS_CHANGE_EP(1);85 status_change_single_tt_only = HUB_STATUS_CHANGE_EP(0), 86 status_change_mtt_available = HUB_STATUS_CHANGE_EP(1); 87 87 88 88 const usb_endpoint_description_t *usb_hub_endpoints [] = { … … 107 107 108 108 static bool usb_hub_polling_error_callback(usb_device_t *dev, 109 errno_t err_code, void *arg)109 errno_t err_code, void *arg) 110 110 { 111 111 assert(dev); … … 113 113 114 114 usb_log_error("Device %s polling error: %s", 115 usb_device_get_name(dev), str_error(err_code));115 usb_device_get_name(dev), str_error(err_code)); 116 116 117 117 return true; … … 153 153 } 154 154 155 const usb_endpoint_description_t *status_change = hub_dev->mtt_available 156 ? &status_change_mtt_available157 :&status_change_single_tt_only;158 159 usb_endpoint_mapping_t *status_change_mapping 160 =usb_device_get_mapped_ep_desc(hub_dev->usb_device, status_change);155 const usb_endpoint_description_t *status_change = hub_dev->mtt_available ? 156 &status_change_mtt_available : 157 &status_change_single_tt_only; 158 159 usb_endpoint_mapping_t *status_change_mapping = 160 usb_device_get_mapped_ep_desc(hub_dev->usb_device, status_change); 161 161 if (!status_change_mapping) { 162 162 usb_log_error("Failed to map the Status Change Endpoint of a hub."); … … 212 212 if (ret != EOK) { 213 213 usb_log_error("(%p) Failed to unbind '%s' function: %s.", 214 hub, HUB_FNC_NAME, str_error(ret));214 hub, HUB_FNC_NAME, str_error(ret)); 215 215 return ret; 216 216 } … … 272 272 */ 273 273 static errno_t usb_hub_polling_init(usb_hub_dev_t *hub_dev, 274 usb_endpoint_mapping_t *mapping)274 usb_endpoint_mapping_t *mapping) 275 275 { 276 276 errno_t err; … … 377 377 usb_pipe_t *control_pipe = usb_device_get_default_pipe(hub_dev->usb_device); 378 378 379 usb_descriptor_type_t desc_type = hub_dev->speed >= USB_SPEED_SUPER 380 ?USB_DESCTYPE_SSPEED_HUB : USB_DESCTYPE_HUB;379 usb_descriptor_type_t desc_type = hub_dev->speed >= USB_SPEED_SUPER ? 380 USB_DESCTYPE_SSPEED_HUB : USB_DESCTYPE_HUB; 381 381 382 382 /* Get hub descriptor. */ … … 420 420 descriptor.characteristics & HUB_CHAR_POWER_PER_PORT_FLAG; 421 421 422 const uint8_t protocol = usb_device_descriptors(hub_dev->usb_device) 423 ->device.device_protocol; 422 const uint8_t protocol = usb_device_descriptors(hub_dev->usb_device)->device.device_protocol; 424 423 hub_dev->mtt_available = (protocol == 2); 425 424 … … 456 455 457 456 if (config_size < sizeof(usb_standard_configuration_descriptor_t)) { 458 usb_log_error("Configuration descriptor is not big enough"459 " to fit standard configuration descriptor.\n");460 return EOVERFLOW;457 usb_log_error("Configuration descriptor is not big enough" 458 " to fit standard configuration descriptor.\n"); 459 return EOVERFLOW; 461 460 } 462 461 -
uspace/drv/bus/usb/usbmid/explore.c
r76d0981d r3bacee1 89 89 for (; interface_ptr != NULL; 90 90 interface_ptr = usb_dp_get_sibling_descriptor( 91 &parser, &data, config_descriptor, interface_ptr)) 92 { 91 &parser, &data, config_descriptor, interface_ptr)) { 93 92 /* The second byte is DESCTYPE byte in all desriptors. */ 94 93 if (interface_ptr[1] != USB_DESCTYPE_INTERFACE) 95 94 continue; 96 95 97 const usb_standard_interface_descriptor_t *interface 98 =(usb_standard_interface_descriptor_t *) interface_ptr;96 const usb_standard_interface_descriptor_t *interface = 97 (usb_standard_interface_descriptor_t *) interface_ptr; 99 98 100 99 /* Skip alternate interfaces. */ … … 112 111 usbmid_interface_t *iface = NULL; 113 112 const errno_t rc = usbmid_spawn_interface_child(usb_dev, &iface, 114 &usb_device_descriptors(usb_dev)->device, interface);113 &usb_device_descriptors(usb_dev)->device, interface); 115 114 if (rc != EOK) { 116 115 //TODO: Do something about that failure. -
uspace/drv/bus/usb/vhc/hub/virthub.c
r76d0981d r3bacee1 101 101 .descriptor_type = USB_DESCTYPE_CONFIGURATION, 102 102 .total_length = 103 sizeof(usb_standard_configuration_descriptor_t) 104 + sizeof(std_interface_descriptor) 105 + sizeof(hub_descriptor) 106 + sizeof(endpoint_descriptor) 107 , 103 sizeof(usb_standard_configuration_descriptor_t) + 104 sizeof(std_interface_descriptor) + 105 sizeof(hub_descriptor) + 106 sizeof(endpoint_descriptor), 108 107 .interface_count = 1, 109 108 .configuration_number = HUB_CONFIGURATION_ID, … … 133 132 .descriptor = &std_configuration_descriptor, 134 133 .extra = extra_descriptors, 135 .extra_count = sizeof(extra_descriptors) /sizeof(extra_descriptors[0])134 .extra_count = sizeof(extra_descriptors) / sizeof(extra_descriptors[0]) 136 135 }; 137 136 … … 148 147 * @return Error code. 149 148 */ 150 errno_t virthub_init(usbvirt_device_t *dev, const char *name)149 errno_t virthub_init(usbvirt_device_t *dev, const char *name) 151 150 { 152 151 if (dev == NULL) { -
uspace/drv/bus/usb/vhc/hub/virthubops.c
r76d0981d r3bacee1 49 49 50 50 switch (new_state) { 51 case USBVIRT_STATE_CONFIGURED:52 hub_set_port_state_all(hub, HUB_PORT_STATE_POWERED_OFF);53 break;54 case USBVIRT_STATE_ADDRESS:55 hub_set_port_state_all(hub, HUB_PORT_STATE_NOT_CONFIGURED);56 break;57 default:58 break;51 case USBVIRT_STATE_CONFIGURED: 52 hub_set_port_state_all(hub, HUB_PORT_STATE_POWERED_OFF); 53 break; 54 case USBVIRT_STATE_ADDRESS: 55 hub_set_port_state_all(hub, HUB_PORT_STATE_NOT_CONFIGURED); 56 break; 57 default: 58 break; 59 59 } 60 60 … … 137 137 138 138 switch (feature) { 139 case USB2_HUB_FEATURE_PORT_ENABLE: 140 if ((port_state != HUB_PORT_STATE_NOT_CONFIGURED) 141 && (port_state != HUB_PORT_STATE_POWERED_OFF)) { 142 hub_set_port_state(hub, port, HUB_PORT_STATE_DISABLED); 143 } 139 case USB2_HUB_FEATURE_PORT_ENABLE: 140 if ((port_state != HUB_PORT_STATE_NOT_CONFIGURED) && 141 (port_state != HUB_PORT_STATE_POWERED_OFF)) { 142 hub_set_port_state(hub, port, HUB_PORT_STATE_DISABLED); 143 } 144 rc = EOK; 145 break; 146 147 case USB2_HUB_FEATURE_PORT_SUSPEND: 148 if (port_state != HUB_PORT_STATE_SUSPENDED) { 144 149 rc = EOK; 145 150 break; 146 147 case USB2_HUB_FEATURE_PORT_SUSPEND: 148 if (port_state != HUB_PORT_STATE_SUSPENDED) { 149 rc = EOK; 150 break; 151 } 152 hub_set_port_state(hub, port, HUB_PORT_STATE_RESUMING); 153 rc = EOK; 154 break; 155 156 case USB_HUB_FEATURE_PORT_POWER: 157 if (port_state != HUB_PORT_STATE_NOT_CONFIGURED) { 158 hub_set_port_state(hub, port, HUB_PORT_STATE_POWERED_OFF); 159 } 160 rc = EOK; 161 break; 162 163 case USB_HUB_FEATURE_C_PORT_CONNECTION: 164 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_CONNECTION); 165 rc = EOK; 166 break; 167 168 case USB2_HUB_FEATURE_C_PORT_ENABLE: 169 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_ENABLE); 170 rc = EOK; 171 break; 172 173 case USB2_HUB_FEATURE_C_PORT_SUSPEND: 174 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_SUSPEND); 175 rc = EOK; 176 break; 177 178 case USB_HUB_FEATURE_C_PORT_OVER_CURRENT: 179 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_OVER_CURRENT); 180 rc = EOK; 181 break; 182 183 case USB_HUB_FEATURE_C_PORT_RESET: 184 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_RESET); 185 rc = EOK; 186 break; 187 188 default: 189 rc = ENOTSUP; 190 break; 151 } 152 hub_set_port_state(hub, port, HUB_PORT_STATE_RESUMING); 153 rc = EOK; 154 break; 155 156 case USB_HUB_FEATURE_PORT_POWER: 157 if (port_state != HUB_PORT_STATE_NOT_CONFIGURED) { 158 hub_set_port_state(hub, port, HUB_PORT_STATE_POWERED_OFF); 159 } 160 rc = EOK; 161 break; 162 163 case USB_HUB_FEATURE_C_PORT_CONNECTION: 164 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_CONNECTION); 165 rc = EOK; 166 break; 167 168 case USB2_HUB_FEATURE_C_PORT_ENABLE: 169 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_ENABLE); 170 rc = EOK; 171 break; 172 173 case USB2_HUB_FEATURE_C_PORT_SUSPEND: 174 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_SUSPEND); 175 rc = EOK; 176 break; 177 178 case USB_HUB_FEATURE_C_PORT_OVER_CURRENT: 179 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_OVER_CURRENT); 180 rc = EOK; 181 break; 182 183 case USB_HUB_FEATURE_C_PORT_RESET: 184 hub_clear_port_status_change(hub, port, HUB_STATUS_C_PORT_RESET); 185 rc = EOK; 186 break; 187 188 default: 189 rc = ENOTSUP; 190 break; 191 191 } 192 192 … … 310 310 311 311 switch (feature) { 312 case USB_HUB_FEATURE_PORT_RESET:313 if (port_state != HUB_PORT_STATE_POWERED_OFF) {314 hub_set_port_state(hub, port, HUB_PORT_STATE_RESETTING);315 }316 rc = EOK;317 break;318 319 case USB2_HUB_FEATURE_PORT_SUSPEND:320 if (port_state == HUB_PORT_STATE_ENABLED) {321 hub_set_port_state(hub, port, HUB_PORT_STATE_SUSPENDED);322 }323 rc = EOK;324 break;325 326 case USB_HUB_FEATURE_PORT_POWER:327 if (port_state == HUB_PORT_STATE_POWERED_OFF) {328 hub_set_port_state(hub, port, HUB_PORT_STATE_DISCONNECTED);329 }330 rc = EOK;331 break;332 333 default:334 break;312 case USB_HUB_FEATURE_PORT_RESET: 313 if (port_state != HUB_PORT_STATE_POWERED_OFF) { 314 hub_set_port_state(hub, port, HUB_PORT_STATE_RESETTING); 315 } 316 rc = EOK; 317 break; 318 319 case USB2_HUB_FEATURE_PORT_SUSPEND: 320 if (port_state == HUB_PORT_STATE_ENABLED) { 321 hub_set_port_state(hub, port, HUB_PORT_STATE_SUSPENDED); 322 } 323 rc = EOK; 324 break; 325 326 case USB_HUB_FEATURE_PORT_POWER: 327 if (port_state == HUB_PORT_STATE_POWERED_OFF) { 328 hub_set_port_state(hub, port, HUB_PORT_STATE_DISCONNECTED); 329 } 330 rc = EOK; 331 break; 332 333 default: 334 break; 335 335 } 336 336 -
uspace/drv/bus/usb/xhci/commands.c
r76d0981d r3bacee1 159 159 } 160 160 161 return cmd_link 162 ? list_get_instance(cmd_link, xhci_cmd_t, _header.link)163 :NULL;161 return cmd_link ? 162 list_get_instance(cmd_link, xhci_cmd_t, _header.link) : 163 NULL; 164 164 } 165 165 -
uspace/drv/bus/usb/xhci/debug.c
r76d0981d r3bacee1 382 382 } 383 383 384 void xhci_dump_input_ctx(const xhci_hc_t * hc, const struct xhci_input_ctx *ictx)384 void xhci_dump_input_ctx(const xhci_hc_t *hc, const struct xhci_input_ctx *ictx) 385 385 { 386 386 xhci_device_ctx_t *device_ctx = XHCI_GET_DEVICE_CTX(ictx, hc); … … 400 400 401 401 for (uint8_t dci = 1; dci <= XHCI_EP_COUNT; dci++) 402 if (XHCI_INPUT_CTRL_CTX_DROP(*ctrl_ctx, dci) 403 ||XHCI_INPUT_CTRL_CTX_ADD(*ctrl_ctx, dci)) {402 if (XHCI_INPUT_CTRL_CTX_DROP(*ctrl_ctx, dci) || 403 XHCI_INPUT_CTRL_CTX_ADD(*ctrl_ctx, dci)) { 404 404 usb_log_debug("Endpoint context DCI %u:", dci); 405 405 xhci_ep_ctx_t *ep_ctx = XHCI_GET_EP_CTX(device_ctx, hc, dci); -
uspace/drv/bus/usb/xhci/endpoint.c
r76d0981d r3bacee1 59 59 */ 60 60 static errno_t xhci_endpoint_init(xhci_endpoint_t *xhci_ep, device_t *dev, 61 const usb_endpoint_descriptors_t *desc)61 const usb_endpoint_descriptors_t *desc) 62 62 { 63 63 errno_t rc; … … 88 88 if (dev->speed >= USB_SPEED_SUPER) { 89 89 ep->packets_per_uframe = xhci_ep->max_burst * xhci_ep->mult; 90 if (ep->transfer_type == USB_TRANSFER_ISOCHRONOUS 91 ||ep->transfer_type == USB_TRANSFER_INTERRUPT) {90 if (ep->transfer_type == USB_TRANSFER_ISOCHRONOUS || 91 ep->transfer_type == USB_TRANSFER_INTERRUPT) { 92 92 ep->max_transfer_size = ep->max_packet_size * ep->packets_per_uframe; 93 93 } … … 100 100 * others have 2-based log of it. 101 101 */ 102 if (dev->speed >= USB_SPEED_HIGH 103 ||ep->transfer_type != USB_TRANSFER_INTERRUPT) {102 if (dev->speed >= USB_SPEED_HIGH || 103 ep->transfer_type != USB_TRANSFER_INTERRUPT) { 104 104 xhci_ep->interval = 1 << (xhci_ep->interval - 1); 105 105 } … … 141 141 */ 142 142 endpoint_t *xhci_endpoint_create(device_t *dev, 143 const usb_endpoint_descriptors_t *desc)143 const usb_endpoint_descriptors_t *desc) 144 144 { 145 145 const usb_transfer_type_t type = USB_ED_GET_TRANSFER_TYPE(desc->endpoint); 146 146 147 xhci_endpoint_t *ep = calloc(1, sizeof(xhci_endpoint_t) 148 +(type == USB_TRANSFER_ISOCHRONOUS) * sizeof(*ep->isoch));147 xhci_endpoint_t *ep = calloc(1, sizeof(xhci_endpoint_t) + 148 (type == USB_TRANSFER_ISOCHRONOUS) * sizeof(*ep->isoch)); 149 149 if (!ep) 150 150 return NULL; … … 230 230 } 231 231 232 usb_transfer_batch_t * const batch = ep->active_batch;232 usb_transfer_batch_t *const batch = ep->active_batch; 233 233 234 234 const errno_t err = hc_stop_endpoint(xhci_ep); … … 289 289 290 290 case USB_TRANSFER_ISOCHRONOUS: 291 return in ? EP_TYPE_ISOCH_IN 292 :EP_TYPE_ISOCH_OUT;291 return in ? EP_TYPE_ISOCH_IN : 292 EP_TYPE_ISOCH_OUT; 293 293 294 294 case USB_TRANSFER_BULK: 295 return in ? EP_TYPE_BULK_IN 296 :EP_TYPE_BULK_OUT;295 return in ? EP_TYPE_BULK_IN : 296 EP_TYPE_BULK_OUT; 297 297 298 298 case USB_TRANSFER_INTERRUPT: 299 return in ? EP_TYPE_INTERRUPT_IN 300 :EP_TYPE_INTERRUPT_OUT;299 return in ? EP_TYPE_INTERRUPT_IN : 300 EP_TYPE_INTERRUPT_OUT; 301 301 } 302 302 -
uspace/drv/bus/usb/xhci/hc.c
r76d0981d r3bacee1 87 87 xhci_port_speed_t *speeds = hc->speeds; 88 88 89 for (xhci_extcap_t * ec = hc->xecp; ec; ec = xhci_extcap_next(ec)) {89 for (xhci_extcap_t * ec = hc->xecp; ec; ec = xhci_extcap_next(ec)) { 90 90 xhci_dump_extcap(ec); 91 91 switch (XHCI_REG_RD(ec, XHCI_EC_CAP_ID)) { … … 151 151 * mapping also for devices connected to hubs. 152 152 */ 153 if (psiv < ARRAY_SIZE(default_psiv_to_port_speed) 154 && default_psiv_to_port_speed[psiv].major == major155 && default_psiv_to_port_speed[psiv].minor == minor156 && default_psiv_to_port_speed[psiv].rx_bps == bps157 &&default_psiv_to_port_speed[psiv].tx_bps == bps) {153 if (psiv < ARRAY_SIZE(default_psiv_to_port_speed) && 154 default_psiv_to_port_speed[psiv].major == major && 155 default_psiv_to_port_speed[psiv].minor == minor && 156 default_psiv_to_port_speed[psiv].rx_bps == bps && 157 default_psiv_to_port_speed[psiv].tx_bps == bps) { 158 158 speeds[psiv] = default_psiv_to_port_speed[psiv]; 159 159 usb_log_debug("Assumed default %s speed of USB %u.", 160 usb_str_speed(speeds[psiv].usb_speed), major);160 usb_str_speed(speeds[psiv].usb_speed), major); 161 161 continue; 162 162 } … … 173 173 speeds[psiv].tx_bps = bps; 174 174 usb_log_debug("Speed %u set up for bps %" PRIu64 175 " / %" PRIu64 ".", psiv, speeds[psiv].rx_bps,176 speeds[psiv].tx_bps);175 " / %" PRIu64 ".", psiv, speeds[psiv].rx_bps, 176 speeds[psiv].tx_bps); 177 177 } 178 178 } … … 384 384 code->rangecount = 1; 385 385 code->ranges[0] = (irq_pio_range_t) { 386 .base = RNGABS(hc->mmio_range),387 .size = RNGSZ(hc->mmio_range),386 .base = RNGABS(hc->mmio_range), 387 .size = RNGSZ(hc->mmio_range), 388 388 }; 389 389 … … 391 391 memcpy(code->cmds, irq_commands, sizeof(irq_commands)); 392 392 393 void *intr0_iman = RNGABSPTR(hc->mmio_range) 394 + XHCI_REG_RD(hc->cap_regs, XHCI_CAP_RTSOFF)395 +offsetof(xhci_rt_regs_t, ir[0]);396 void *usbsts = RNGABSPTR(hc->mmio_range) 397 + XHCI_REG_RD(hc->cap_regs, XHCI_CAP_LENGTH)398 +offsetof(xhci_op_regs_t, usbsts);393 void *intr0_iman = RNGABSPTR(hc->mmio_range) + 394 XHCI_REG_RD(hc->cap_regs, XHCI_CAP_RTSOFF) + 395 offsetof(xhci_rt_regs_t, ir[0]); 396 void *usbsts = RNGABSPTR(hc->mmio_range) + 397 XHCI_REG_RD(hc->cap_regs, XHCI_CAP_LENGTH) + 398 offsetof(xhci_op_regs_t, usbsts); 399 399 400 400 code->cmds[0].addr = intr0_iman; … … 425 425 for (int i = 0; i <= (XHCI_LEGSUP_BIOS_TIMEOUT_US / XHCI_LEGSUP_POLLING_DELAY_1MS); i++) { 426 426 usb_log_debug("LEGSUP: elapsed: %i ms, bios: %x, os: %x", i, 427 XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_BIOS),428 XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_OS));427 XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_BIOS), 428 XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_OS)); 429 429 if (XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_BIOS) == 0) { 430 430 return XHCI_REG_RD(hc->legsup, XHCI_LEGSUP_SEM_OS) == 1 ? EOK : EIO; … … 559 559 const uint32_t usbsts = XHCI_REG_RD_FIELD(&hc->op_regs->usbsts, 32); 560 560 561 return !(usbcmd & XHCI_REG_MASK(XHCI_OP_RS)) 562 || (usbsts & XHCI_REG_MASK(XHCI_OP_HCE))563 ||(usbsts & XHCI_REG_MASK(XHCI_OP_HSE));561 return !(usbcmd & XHCI_REG_MASK(XHCI_OP_RS)) || 562 (usbsts & XHCI_REG_MASK(XHCI_OP_HCE)) || 563 (usbsts & XHCI_REG_MASK(XHCI_OP_HSE)); 564 564 } 565 565 … … 589 589 struct timeval tv; 590 590 getuptime(&tv); 591 usb_log_debug("Microframe index wrapped (@%lu.%li, %" PRIu64" total).",591 usb_log_debug("Microframe index wrapped (@%lu.%li, %" PRIu64 " total).", 592 592 tv.tv_sec, tv.tv_usec, hc->wrap_count); 593 593 hc->wrap_time = ((uint64_t) tv.tv_sec) * 1000000 + ((uint64_t) tv.tv_usec); … … 634 634 errno_t err; 635 635 xhci_trb_t trb; 636 xhci_hc_t * const hc = arg;636 xhci_hc_t *const hc = arg; 637 637 assert(hc); 638 638 … … 654 654 */ 655 655 static void hc_run_event_ring(xhci_hc_t *hc, xhci_event_ring_t *event_ring, 656 xhci_interrupter_regs_t *intr)656 xhci_interrupter_regs_t *intr) 657 657 { 658 658 errno_t err; … … 720 720 if (status) { 721 721 usb_log_error("Non-zero status after interrupt handling (%08x) " 722 " - missing something?", status);722 " - missing something?", status); 723 723 } 724 724 } … … 766 766 { 767 767 return (2 * ep->base.endpoint) + 768 (ep->base.transfer_type == USB_TRANSFER_CONTROL769 ||ep->base.direction == USB_DIRECTION_IN);768 (ep->base.transfer_type == USB_TRANSFER_CONTROL || 769 ep->base.direction == USB_DIRECTION_IN); 770 770 } 771 771 772 772 void hc_ring_ep_doorbell(xhci_endpoint_t *ep, uint32_t stream_id) 773 773 { 774 xhci_device_t * const dev = xhci_ep_to_dev(ep);775 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);774 xhci_device_t *const dev = xhci_ep_to_dev(ep); 775 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 776 776 const uint8_t dci = endpoint_dci(ep); 777 777 const uint32_t target = (stream_id << 16) | (dci & 0x1ff); … … 786 786 { 787 787 errno_t err; 788 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);788 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 789 789 790 790 /* Prepare memory for the context */ … … 821 821 { 822 822 errno_t err; 823 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);823 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 824 824 xhci_cmd_t cmd; 825 825 … … 846 846 static errno_t create_configure_ep_input_ctx(xhci_device_t *dev, dma_buffer_t *dma_buf) 847 847 { 848 const xhci_hc_t * hc = bus_to_hc(dev->base.bus);848 const xhci_hc_t *hc = bus_to_hc(dev->base.bus); 849 849 const errno_t err = dma_buffer_alloc(dma_buf, XHCI_INPUT_CTX_SIZE(hc)); 850 850 if (err) … … 870 870 { 871 871 errno_t err = ENOMEM; 872 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);872 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 873 873 xhci_endpoint_t *ep0 = xhci_endpoint_get(dev->base.endpoints[0]); 874 874 … … 920 920 errno_t hc_configure_device(xhci_device_t *dev) 921 921 { 922 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);922 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 923 923 xhci_cmd_t cmd; 924 924 … … 945 945 errno_t hc_deconfigure_device(xhci_device_t *dev) 946 946 { 947 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);947 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 948 948 xhci_cmd_t cmd; 949 949 errno_t err; … … 972 972 errno_t hc_add_endpoint(xhci_endpoint_t *ep) 973 973 { 974 xhci_device_t * const dev = xhci_ep_to_dev(ep);974 xhci_device_t *const dev = xhci_ep_to_dev(ep); 975 975 const unsigned dci = endpoint_dci(ep); 976 976 xhci_cmd_t cmd; … … 984 984 xhci_input_ctx_t *ictx = ictx_dma_buf.virt; 985 985 986 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);986 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 987 987 XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), dci); 988 988 … … 1007 1007 errno_t hc_drop_endpoint(xhci_endpoint_t *ep) 1008 1008 { 1009 xhci_device_t * const dev = xhci_ep_to_dev(ep);1010 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);1009 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1010 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 1011 1011 const unsigned dci = endpoint_dci(ep); 1012 1012 xhci_cmd_t cmd; … … 1043 1043 errno_t hc_update_endpoint(xhci_endpoint_t *ep) 1044 1044 { 1045 xhci_device_t * const dev = xhci_ep_to_dev(ep);1045 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1046 1046 const unsigned dci = endpoint_dci(ep); 1047 1047 xhci_cmd_t cmd; 1048 1048 1049 1049 dma_buffer_t ictx_dma_buf; 1050 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);1050 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 1051 1051 1052 1052 errno_t err = dma_buffer_alloc(&ictx_dma_buf, XHCI_INPUT_CTX_SIZE(hc)); … … 1078 1078 errno_t hc_stop_endpoint(xhci_endpoint_t *ep) 1079 1079 { 1080 xhci_device_t * const dev = xhci_ep_to_dev(ep);1080 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1081 1081 const unsigned dci = endpoint_dci(ep); 1082 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);1082 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 1083 1083 xhci_cmd_t cmd; 1084 1084 errno_t err; … … 1104 1104 errno_t hc_reset_endpoint(xhci_endpoint_t *ep) 1105 1105 { 1106 xhci_device_t * const dev = xhci_ep_to_dev(ep);1106 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1107 1107 const unsigned dci = endpoint_dci(ep); 1108 xhci_hc_t * const hc = bus_to_hc(dev->base.bus);1108 xhci_hc_t *const hc = bus_to_hc(dev->base.bus); 1109 1109 xhci_cmd_t cmd; 1110 1110 errno_t err; … … 1126 1126 errno_t hc_reset_ring(xhci_endpoint_t *ep, uint32_t stream_id) 1127 1127 { 1128 xhci_device_t * const dev = xhci_ep_to_dev(ep);1128 xhci_device_t *const dev = xhci_ep_to_dev(ep); 1129 1129 const unsigned dci = endpoint_dci(ep); 1130 1130 uintptr_t addr; … … 1135 1135 xhci_trb_ring_reset_dequeue_state(ring, &addr); 1136 1136 1137 xhci_hc_t * const hc = bus_to_hc(endpoint_get_bus(&ep->base));1137 xhci_hc_t *const hc = bus_to_hc(endpoint_get_bus(&ep->base)); 1138 1138 1139 1139 xhci_cmd_init(&cmd, XHCI_CMD_SET_TR_DEQUEUE_POINTER); -
uspace/drv/bus/usb/xhci/hw_struct/regs.h
r76d0981d r3bacee1 235 235 #define XHCI_CAP_CIC hccparams2, 32, FLAG, 5 236 236 237 static inline unsigned xhci_get_max_spbuf(xhci_cap_regs_t *cap_regs) { 238 return XHCI_REG_RD(cap_regs, XHCI_CAP_MAX_SPBUF_HI) << 5 239 | XHCI_REG_RD(cap_regs, XHCI_CAP_MAX_SPBUF_LO); 237 static inline unsigned xhci_get_max_spbuf(xhci_cap_regs_t *cap_regs) 238 { 239 return XHCI_REG_RD(cap_regs, XHCI_CAP_MAX_SPBUF_HI) << 5 | 240 XHCI_REG_RD(cap_regs, XHCI_CAP_MAX_SPBUF_LO); 240 241 } 241 242 -
uspace/drv/bus/usb/xhci/hw_struct/trb.h
r76d0981d r3bacee1 166 166 167 167 return chain_bit && 168 (type == XHCI_TRB_TYPE_NORMAL 169 || type == XHCI_TRB_TYPE_DATA_STAGE170 || type == XHCI_TRB_TYPE_STATUS_STAGE171 ||type == XHCI_TRB_TYPE_ISOCH);168 (type == XHCI_TRB_TYPE_NORMAL || 169 type == XHCI_TRB_TYPE_DATA_STAGE || 170 type == XHCI_TRB_TYPE_STATUS_STAGE || 171 type == XHCI_TRB_TYPE_ISOCH); 172 172 } 173 173 -
uspace/drv/bus/usb/xhci/isoch.c
r76d0981d r3bacee1 49 49 { 50 50 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 51 xhci_isoch_t * const isoch = ep->isoch;51 xhci_isoch_t *const isoch = ep->isoch; 52 52 53 53 fibril_mutex_initialize(&isoch->guard); … … 70 70 static void isoch_reset(xhci_endpoint_t *ep) 71 71 { 72 xhci_isoch_t * const isoch = ep->isoch;72 xhci_isoch_t *const isoch = ep->isoch; 73 73 assert(fibril_mutex_is_locked(&isoch->guard)); 74 74 … … 87 87 static void isoch_reset_no_timer(xhci_endpoint_t *ep) 88 88 { 89 xhci_isoch_t * const isoch = ep->isoch;89 xhci_isoch_t *const isoch = ep->isoch; 90 90 assert(fibril_mutex_is_locked(&isoch->guard)); 91 91 /* … … 97 97 } 98 98 99 static void isoch_reset_timer(void *ep) { 100 xhci_isoch_t * const isoch = xhci_endpoint_get(ep)->isoch; 99 static void isoch_reset_timer(void *ep) 100 { 101 xhci_isoch_t *const isoch = xhci_endpoint_get(ep)->isoch; 101 102 fibril_mutex_lock(&isoch->guard); 102 103 isoch_reset(ep); … … 109 110 */ 110 111 #define RESET_TIMER_DELAY 100000 111 static void timer_schedule_reset(xhci_endpoint_t *ep) { 112 xhci_isoch_t * const isoch = ep->isoch; 113 const suseconds_t delay = isoch->buffer_count * ep->interval * 125 114 + RESET_TIMER_DELAY; 112 static void timer_schedule_reset(xhci_endpoint_t *ep) 113 { 114 xhci_isoch_t *const isoch = ep->isoch; 115 const suseconds_t delay = isoch->buffer_count * ep->interval * 125 + 116 RESET_TIMER_DELAY; 115 117 116 118 fibril_timer_clear_locked(isoch->reset_timer); 117 119 fibril_timer_set_locked(isoch->reset_timer, delay, 118 isoch_reset_timer, ep);120 isoch_reset_timer, ep); 119 121 } 120 122 … … 122 124 { 123 125 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 124 xhci_isoch_t * const isoch = ep->isoch;126 xhci_isoch_t *const isoch = ep->isoch; 125 127 126 128 if (isoch->feeding_timer) { … … 141 143 * Allocate isochronous buffers. Create the feeding timer. 142 144 */ 143 errno_t isoch_alloc_transfers(xhci_endpoint_t *ep) { 144 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 145 xhci_isoch_t * const isoch = ep->isoch; 145 errno_t isoch_alloc_transfers(xhci_endpoint_t *ep) 146 { 147 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 148 xhci_isoch_t *const isoch = ep->isoch; 146 149 147 150 isoch->feeding_timer = fibril_timer_create(&isoch->guard); … … 151 154 152 155 isoch->transfers = calloc(isoch->buffer_count, sizeof(xhci_isoch_transfer_t)); 153 if (!isoch->transfers)156 if (!isoch->transfers) 154 157 goto err; 155 158 … … 185 188 size_t tdpc = it->size / 1024 + ((it->size % 1024) ? 1 : 0); 186 189 size_t tbc = tdpc / ep->max_burst; 187 if (!tdpc % ep->max_burst) --tbc; 190 if (!tdpc % ep->max_burst) 191 --tbc; 188 192 size_t bsp = tdpc % ep->max_burst; 189 193 size_t tlbpc = (bsp ? bsp : ep->max_burst) - 1; … … 220 224 */ 221 225 uint64_t epoch = hc->wrap_count; 222 if (reg_mfindex < EPOCH_LOW_MFINDEX 223 &&get_system_time() - hc->wrap_time > EPOCH_DELAY) {226 if (reg_mfindex < EPOCH_LOW_MFINDEX && 227 get_system_time() - hc->wrap_time > EPOCH_DELAY) { 224 228 ++epoch; 225 229 } … … 229 233 static inline void calc_next_mfindex(xhci_endpoint_t *ep, xhci_isoch_transfer_t *it) 230 234 { 231 xhci_isoch_t * const isoch = ep->isoch;235 xhci_isoch_t *const isoch = ep->isoch; 232 236 if (isoch->last_mf == -1U) { 233 237 const xhci_bus_t *bus = bus_to_xhci_bus(ep->base.device->bus); … … 270 274 */ 271 275 static inline void window_decide(window_decision_t *res, xhci_hc_t *hc, 272 uint64_t mfindex)276 uint64_t mfindex) 273 277 { 274 278 const uint64_t current_mf = get_current_microframe(hc); … … 300 304 { 301 305 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 302 xhci_isoch_t * const isoch = ep->isoch;306 xhci_isoch_t *const isoch = ep->isoch; 303 307 assert(fibril_mutex_is_locked(&isoch->guard)); 304 308 … … 309 313 310 314 while (isoch->transfers[isoch->hw_enqueue].state == ISOCH_FILLED) { 311 xhci_isoch_transfer_t * const it = &isoch->transfers[isoch->hw_enqueue];315 xhci_isoch_transfer_t *const it = &isoch->transfers[isoch->hw_enqueue]; 312 316 suseconds_t delay; 313 317 … … 321 325 delay = wd.offset * 125; 322 326 usb_log_debug("[isoch] delaying feeding buffer %zu for %ldus", 323 it - isoch->transfers, delay);327 it - isoch->transfers, delay); 324 328 fibril_timer_set_locked(isoch->feeding_timer, delay, 325 329 isoch_feed_out_timer, ep); … … 346 350 */ 347 351 usb_log_debug("[isoch] missed feeding buffer %zu at 0x%llx by " 348 "%llu uframes", it - isoch->transfers, it->mfindex, wd.offset);352 "%llu uframes", it - isoch->transfers, it->mfindex, wd.offset); 349 353 it->state = ISOCH_COMPLETE; 350 354 it->error = EOK; … … 370 374 static void isoch_feed_out_timer(void *ep) 371 375 { 372 xhci_isoch_t * const isoch = xhci_endpoint_get(ep)->isoch;376 xhci_isoch_t *const isoch = xhci_endpoint_get(ep)->isoch; 373 377 fibril_mutex_lock(&isoch->guard); 374 378 isoch_feed_out(ep); … … 386 390 { 387 391 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 388 xhci_isoch_t * const isoch = ep->isoch;392 xhci_isoch_t *const isoch = ep->isoch; 389 393 assert(fibril_mutex_is_locked(&isoch->guard)); 390 394 … … 395 399 396 400 while (isoch->transfers[isoch->enqueue].state <= ISOCH_FILLED) { 397 xhci_isoch_transfer_t * const it = &isoch->transfers[isoch->enqueue];401 xhci_isoch_transfer_t *const it = &isoch->transfers[isoch->enqueue]; 398 402 suseconds_t delay; 399 403 … … 419 423 case WINDOW_TOO_LATE: 420 424 usb_log_debug("[isoch] missed feeding buffer %zu at 0x%llx by" 421 "%llu uframes", it - isoch->transfers, it->mfindex, wd.offset);425 "%llu uframes", it - isoch->transfers, it->mfindex, wd.offset); 422 426 /* Missed the opportunity to schedule. Schedule ASAP. */ 423 427 it->mfindex += wd.offset; … … 458 462 static void isoch_feed_in_timer(void *ep) 459 463 { 460 xhci_isoch_t * const isoch = xhci_endpoint_get(ep)->isoch;464 xhci_isoch_t *const isoch = xhci_endpoint_get(ep)->isoch; 461 465 fibril_mutex_lock(&isoch->guard); 462 466 isoch_feed_in(ep); … … 477 481 xhci_endpoint_t *ep = xhci_endpoint_get(transfer->batch.ep); 478 482 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 479 xhci_isoch_t * const isoch = ep->isoch;483 xhci_isoch_t *const isoch = ep->isoch; 480 484 481 485 /* This shall be already checked by endpoint */ … … 541 545 xhci_endpoint_t *ep = xhci_endpoint_get(transfer->batch.ep); 542 546 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 543 xhci_isoch_t * const isoch = ep->isoch;547 xhci_isoch_t *const isoch = ep->isoch; 544 548 545 549 if (transfer->batch.size < ep->base.max_transfer_size) { … … 585 589 586 590 void isoch_handle_transfer_event(xhci_hc_t *hc, xhci_endpoint_t *ep, 587 xhci_trb_t *trb)588 { 589 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 590 xhci_isoch_t * const isoch = ep->isoch;591 xhci_trb_t *trb) 592 { 593 assert(ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS); 594 xhci_isoch_t *const isoch = ep->isoch; 591 595 592 596 fibril_mutex_lock(&ep->isoch->guard); … … 632 636 } 633 637 634 xhci_isoch_transfer_t * const it = &isoch->transfers[di];638 xhci_isoch_transfer_t *const it = &isoch->transfers[di]; 635 639 636 640 if (it->state == ISOCH_FED && it->interrupt_trb_phys == trb->parameter) { -
uspace/drv/bus/usb/xhci/rh.c
r76d0981d r3bacee1 54 54 /* This mask only lists registers, which imply port change. */ 55 55 static const uint32_t port_events_mask = 56 XHCI_REG_MASK(XHCI_PORT_CSC) |57 XHCI_REG_MASK(XHCI_PORT_PEC) |58 XHCI_REG_MASK(XHCI_PORT_WRC) |59 XHCI_REG_MASK(XHCI_PORT_OCC) |60 XHCI_REG_MASK(XHCI_PORT_PRC) |61 XHCI_REG_MASK(XHCI_PORT_PLC) |62 XHCI_REG_MASK(XHCI_PORT_CEC);56 XHCI_REG_MASK(XHCI_PORT_CSC) | 57 XHCI_REG_MASK(XHCI_PORT_PEC) | 58 XHCI_REG_MASK(XHCI_PORT_WRC) | 59 XHCI_REG_MASK(XHCI_PORT_OCC) | 60 XHCI_REG_MASK(XHCI_PORT_PRC) | 61 XHCI_REG_MASK(XHCI_PORT_PLC) | 62 XHCI_REG_MASK(XHCI_PORT_CEC); 63 63 64 64 static const uint32_t port_reset_mask = 65 XHCI_REG_MASK(XHCI_PORT_WRC) |66 XHCI_REG_MASK(XHCI_PORT_PRC);65 XHCI_REG_MASK(XHCI_PORT_WRC) | 66 XHCI_REG_MASK(XHCI_PORT_PRC); 67 67 68 68 typedef struct rh_port { … … 167 167 return ENOENT; 168 168 169 unsigned psiv = (status & XHCI_REG_MASK(XHCI_PORT_PS)) 170 >>XHCI_REG_SHIFT(XHCI_PORT_PS);169 unsigned psiv = (status & XHCI_REG_MASK(XHCI_PORT_PS)) >> 170 XHCI_REG_SHIFT(XHCI_PORT_PS); 171 171 const usb_speed_t speed = port->rh->hc->speeds[psiv].usb_speed; 172 172 … … 233 233 static void handle_port_change(xhci_rh_t *rh, uint8_t port_id) 234 234 { 235 rh_port_t * const port = &rh->ports[port_id - 1];235 rh_port_t *const port = &rh->ports[port_id - 1]; 236 236 237 237 uint32_t status = XHCI_REG_RD_FIELD(&port->regs->portsc, 32); … … 280 280 281 281 void xhci_rh_set_ports_protocol(xhci_rh_t *rh, 282 unsigned offset, unsigned count, unsigned major)282 unsigned offset, unsigned count, unsigned major) 283 283 { 284 284 for (unsigned i = offset; i < offset + count; i++) … … 297 297 handle_port_change(rh, i + 1); 298 298 299 rh_port_t * const port = &rh->ports[i];299 rh_port_t *const port = &rh->ports[i]; 300 300 301 301 /* … … 304 304 * such ports. 305 305 */ 306 if (XHCI_REG_RD(port->regs, XHCI_PORT_CCS) 307 &&port->base.state == PORT_DISABLED)306 if (XHCI_REG_RD(port->regs, XHCI_PORT_CCS) && 307 port->base.state == PORT_DISABLED) 308 308 usb_port_connected(&port->base, &rh_enumerate_device); 309 309 } … … 320 320 321 321 for (uint8_t i = 0; i < rh->max_ports; ++i) { 322 rh_port_t * const port = &rh->ports[i];322 rh_port_t *const port = &rh->ports[i]; 323 323 usb_port_disabled(&port->base, &rh_remove_device); 324 324 usb_port_fini(&port->base); … … 328 328 static int rh_worker(void *arg) 329 329 { 330 xhci_rh_t * const rh = arg;330 xhci_rh_t *const rh = arg; 331 331 332 332 xhci_trb_t trb; -
uspace/drv/bus/usb/xhci/streams.c
r76d0981d r3bacee1 88 88 { 89 89 usb_log_debug("Allocating primary stream context array of size %u " 90 "for endpoint " XHCI_EP_FMT, count, XHCI_EP_ARGS(*xhci_ep));90 "for endpoint " XHCI_EP_FMT, count, XHCI_EP_ARGS(*xhci_ep)); 91 91 92 92 if ((dma_buffer_alloc(&xhci_ep->primary_stream_ctx_dma, 93 count * sizeof(xhci_stream_ctx_t)))) {93 count * sizeof(xhci_stream_ctx_t)))) { 94 94 return ENOMEM; 95 95 } … … 110 110 { 111 111 usb_log_debug("Deallocating primary stream structures for " 112 "endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));112 "endpoint " XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep)); 113 113 114 114 dma_buffer_free(&xhci_ep->primary_stream_ctx_dma); … … 138 138 { 139 139 usb_log_debug("Freeing stream rings and context arrays of endpoint " 140 XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep));140 XHCI_EP_FMT, XHCI_EP_ARGS(*xhci_ep)); 141 141 142 142 for (size_t index = 0; index < xhci_ep->primary_stream_data_size; ++index) { … … 153 153 */ 154 154 static errno_t initialize_primary_stream(xhci_hc_t *hc, xhci_endpoint_t *xhci_ep, 155 unsigned index)155 unsigned index) 156 156 { 157 157 xhci_stream_ctx_t *ctx = &xhci_ep->primary_stream_ctx_array[index]; … … 206 206 */ 207 207 static errno_t initialize_secondary_streams(xhci_hc_t *hc, xhci_endpoint_t *xhci_ep, 208 unsigned idx, unsigned count)208 unsigned idx, unsigned count) 209 209 { 210 210 if (count == 0) { … … 218 218 if ((count & (count - 1)) != 0 || count < 8 || count > 256) { 219 219 usb_log_error("The secondary stream array size must be a power of 2 " 220 "between 8 and 256.");220 "between 8 and 256."); 221 221 return EINVAL; 222 222 } … … 233 233 234 234 if ((dma_buffer_alloc(&data->secondary_stream_ctx_dma, 235 count * sizeof(xhci_stream_ctx_t)))) {235 count * sizeof(xhci_stream_ctx_t)))) { 236 236 free(data->secondary_data); 237 237 return ENOMEM; … … 275 275 */ 276 276 static void setup_stream_context(xhci_endpoint_t *xhci_ep, xhci_ep_ctx_t *ctx, 277 unsigned pstreams, unsigned lsa)277 unsigned pstreams, unsigned lsa) 278 278 { 279 279 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(xhci_ep)); … … 295 295 */ 296 296 static errno_t verify_stream_conditions(xhci_hc_t *hc, xhci_device_t *dev, 297 xhci_endpoint_t *xhci_ep, unsigned count)298 { 299 if (xhci_ep->base.transfer_type != USB_TRANSFER_BULK 300 ||dev->base.speed != USB_SPEED_SUPER) {297 xhci_endpoint_t *xhci_ep, unsigned count) 298 { 299 if (xhci_ep->base.transfer_type != USB_TRANSFER_BULK || 300 dev->base.speed != USB_SPEED_SUPER) { 301 301 usb_log_error("Streams are only supported by superspeed bulk endpoints."); 302 302 return EINVAL; … … 321 321 if (count > max_psa_size) { 322 322 usb_log_error("Host controller only supports " 323 "%u primary streams.", max_psa_size);323 "%u primary streams.", max_psa_size); 324 324 return EINVAL; 325 325 } … … 327 327 if (count > xhci_ep->max_streams) { 328 328 usb_log_error("Endpoint " XHCI_EP_FMT " supports only %" PRIu32 " streams.", 329 XHCI_EP_ARGS(*xhci_ep), xhci_ep->max_streams);329 XHCI_EP_ARGS(*xhci_ep), xhci_ep->max_streams); 330 330 return EINVAL; 331 331 } … … 346 346 */ 347 347 errno_t xhci_endpoint_remove_streams(xhci_hc_t *hc, xhci_device_t *dev, 348 xhci_endpoint_t *xhci_ep)348 xhci_endpoint_t *xhci_ep) 349 349 { 350 350 if (!xhci_ep->primary_stream_data_size) { … … 374 374 */ 375 375 errno_t xhci_endpoint_request_primary_streams(xhci_hc_t *hc, xhci_device_t *dev, 376 xhci_endpoint_t *xhci_ep, unsigned count)376 xhci_endpoint_t *xhci_ep, unsigned count) 377 377 { 378 378 errno_t err = verify_stream_conditions(hc, dev, xhci_ep, count); … … 422 422 */ 423 423 errno_t xhci_endpoint_request_secondary_streams(xhci_hc_t *hc, xhci_device_t *dev, 424 xhci_endpoint_t *xhci_ep, unsigned *sizes, unsigned count)424 xhci_endpoint_t *xhci_ep, unsigned *sizes, unsigned count) 425 425 { 426 426 /* Check if HC supports secondary indexing */ … … 454 454 if (max * count > xhci_ep->max_streams) { 455 455 usb_log_error("Endpoint " XHCI_EP_FMT " supports only %" PRIu32 " streams.", 456 XHCI_EP_ARGS(*xhci_ep), xhci_ep->max_streams);456 XHCI_EP_ARGS(*xhci_ep), xhci_ep->max_streams); 457 457 return EINVAL; 458 458 } -
uspace/drv/bus/usb/xhci/test/reg-ops.c
r76d0981d r3bacee1 23 23 #define EQ(exp, act) PCUT_ASSERT_INT_EQUALS((exp), (act)) 24 24 25 PCUT_TEST(ops_8_field) { 25 PCUT_TEST(ops_8_field) 26 { 26 27 RESET; 27 28 EQ(0, XHCI_REG_RD(regs, REG_8_FIELD)); … … 41 42 } 42 43 43 PCUT_TEST(ops_8_range) { 44 PCUT_TEST(ops_8_range) 45 { 44 46 RESET; 45 47 EQ(0, XHCI_REG_RD(regs, REG_8_RANGE)); … … 58 60 } 59 61 60 PCUT_TEST(ops_8_flag) { 62 PCUT_TEST(ops_8_flag) 63 { 61 64 RESET; 62 65 EQ(0, XHCI_REG_RD(regs, REG_8_FLAG)); … … 76 79 } 77 80 78 PCUT_TEST(ops_16_field) { 81 PCUT_TEST(ops_16_field) 82 { 79 83 RESET; 80 84 EQ(0, XHCI_REG_RD(regs, REG_16_FIELD)); … … 93 97 } 94 98 95 PCUT_TEST(ops_16_range) { 99 PCUT_TEST(ops_16_range) 100 { 96 101 RESET; 97 102 EQ(0, XHCI_REG_RD(regs, REG_16_RANGE)); … … 110 115 } 111 116 112 PCUT_TEST(ops_16_flag) { 117 PCUT_TEST(ops_16_flag) 118 { 113 119 RESET; 114 120 EQ(0, XHCI_REG_RD(regs, REG_16_FLAG)); … … 128 134 } 129 135 130 PCUT_TEST(ops_32_field) { 136 PCUT_TEST(ops_32_field) 137 { 131 138 RESET; 132 139 EQ(0, XHCI_REG_RD(regs, REG_32_FIELD)); … … 145 152 } 146 153 147 PCUT_TEST(ops_32_range) { 154 PCUT_TEST(ops_32_range) 155 { 148 156 RESET; 149 157 EQ(0, XHCI_REG_RD(regs, REG_32_RANGE)); … … 162 170 } 163 171 164 PCUT_TEST(ops_32_flag) { 172 PCUT_TEST(ops_32_flag) 173 { 165 174 RESET; 166 175 EQ(0, XHCI_REG_RD(regs, REG_32_FLAG)); -
uspace/drv/bus/usb/xhci/transfers.c
r76d0981d r3bacee1 51 51 * See Table 7 of xHCI specification. 52 52 */ 53 static inline stage_dir_flag_t get_status_direction_flag(xhci_trb_t *trb,54 uint8_t bmRequestType, uint16_t wLength)53 static inline stage_dir_flag_t get_status_direction_flag(xhci_trb_t *trb, 54 uint8_t bmRequestType, uint16_t wLength) 55 55 { 56 56 /* See Table 7 of xHCI specification */ 57 return SETUP_REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType) && (wLength > 0) 58 ? STAGE_OUT59 :STAGE_IN;57 return SETUP_REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType) && (wLength > 0) ? 58 STAGE_OUT : 59 STAGE_IN; 60 60 } 61 61 … … 69 69 * See Table 8 of xHCI specification. 70 70 */ 71 static inline data_stage_type_t get_transfer_type(xhci_trb_t *trb, uint8_t72 bmRequestType, uint16_t wLength)71 static inline data_stage_type_t get_transfer_type(xhci_trb_t *trb, uint8_t 72 bmRequestType, uint16_t wLength) 73 73 { 74 74 if (wLength == 0) … … 76 76 77 77 /* See Table 7 of xHCI specification */ 78 return SETUP_REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType) 79 ? DATA_STAGE_IN80 :DATA_STAGE_NO;78 return SETUP_REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType) ? 79 DATA_STAGE_IN : 80 DATA_STAGE_NO; 81 81 } 82 82 … … 86 86 87 87 return request_type == USB_REQUEST_TYPE_STANDARD && 88 (setup->request == USB_DEVREQ_SET_CONFIGURATION89 ||setup->request == USB_DEVREQ_SET_INTERFACE);88 (setup->request == USB_DEVREQ_SET_CONFIGURATION || 89 setup->request == USB_DEVREQ_SET_INTERFACE); 90 90 } 91 91 … … 95 95 * Bus callback. 96 96 */ 97 usb_transfer_batch_t * xhci_transfer_create(endpoint_t*ep)97 usb_transfer_batch_t *xhci_transfer_create(endpoint_t *ep) 98 98 { 99 99 xhci_transfer_t *transfer = calloc(1, sizeof(xhci_transfer_t)); … … 108 108 * Destroy a xHCI transfer. 109 109 */ 110 void xhci_transfer_destroy(usb_transfer_batch_t *batch)110 void xhci_transfer_destroy(usb_transfer_batch_t *batch) 111 111 { 112 112 xhci_transfer_t *transfer = xhci_transfer_from_batch(batch); … … 137 137 138 138 const size_t chunk_mask = dma_policy_chunk_mask(ts->buf.policy); 139 ts->chunk_size = (chunk_mask > MAX_CHUNK_SIZE + 1) 140 ?MAX_CHUNK_SIZE : (chunk_mask + 1);139 ts->chunk_size = (chunk_mask > MAX_CHUNK_SIZE + 1) ? 140 MAX_CHUNK_SIZE : (chunk_mask + 1); 141 141 142 142 ts->remaining = transfer->batch.size; … … 183 183 } 184 184 185 static errno_t schedule_control(xhci_hc_t * hc, xhci_transfer_t*transfer)185 static errno_t schedule_control(xhci_hc_t *hc, xhci_transfer_t *transfer) 186 186 { 187 187 usb_transfer_batch_t *batch = &transfer->batch; 188 188 xhci_endpoint_t *xhci_ep = xhci_endpoint_get(transfer->batch.ep); 189 189 190 usb_device_request_setup_packet_t *setup = &batch->setup.packet;190 usb_device_request_setup_packet_t *setup = &batch->setup.packet; 191 191 192 192 trb_splitter_t splitter; … … 210 210 get_transfer_type(trb_setup, setup->request_type, setup->length)); 211 211 212 stage_dir_flag_t stage_dir = (transfer->batch.dir == USB_DIRECTION_IN) 213 ?STAGE_IN : STAGE_OUT;212 stage_dir_flag_t stage_dir = (transfer->batch.dir == USB_DIRECTION_IN) ? 213 STAGE_IN : STAGE_OUT; 214 214 215 215 /* Data stage - first TRB is special */ … … 243 243 } 244 244 245 static errno_t schedule_bulk_intr(xhci_hc_t *hc, xhci_transfer_t *transfer)246 { 247 xhci_trb_ring_t * const ring = get_ring(transfer);245 static errno_t schedule_bulk_intr(xhci_hc_t *hc, xhci_transfer_t *transfer) 246 { 247 xhci_trb_ring_t *const ring = get_ring(transfer); 248 248 if (!ring) 249 249 return EINVAL; … … 266 266 /* Set the interrupt bit for last TRB */ 267 267 TRB_CTRL_SET_IOC(trbs[trbs_used - 1], 1); 268 } 269 else { 268 } else { 270 269 /* Clear the chain bit on the last TRB */ 271 270 TRB_CTRL_SET_CHAIN(trbs[trbs_used - 1], 1); … … 280 279 281 280 return xhci_trb_ring_enqueue_multiple(ring, trbs, trbs_used, 282 &transfer->interrupt_trb_phys);283 } 284 285 static int schedule_isochronous(xhci_transfer_t *transfer)281 &transfer->interrupt_trb_phys); 282 } 283 284 static int schedule_isochronous(xhci_transfer_t *transfer) 286 285 { 287 286 endpoint_t *ep = transfer->batch.ep; 288 287 289 return ep->direction == USB_DIRECTION_OUT 290 ? isoch_schedule_out(transfer)291 :isoch_schedule_in(transfer);292 } 293 294 errno_t xhci_handle_transfer_event(xhci_hc_t * hc, xhci_trb_t*trb)288 return ep->direction == USB_DIRECTION_OUT ? 289 isoch_schedule_out(transfer) : 290 isoch_schedule_in(transfer); 291 } 292 293 errno_t xhci_handle_transfer_event(xhci_hc_t *hc, xhci_trb_t *trb) 295 294 { 296 295 uintptr_t addr = trb->parameter; … … 327 326 transfer->interrupt_trb_phys); 328 327 batch = &transfer->batch; 329 } 330 else { 328 } else { 331 329 xhci_trb_ring_update_dequeue(&ep->ring, addr); 332 330 … … 354 352 const xhci_trb_completion_code_t completion_code = TRB_COMPLETION_CODE(*trb); 355 353 switch (completion_code) { 356 case XHCI_TRBC_SHORT_PACKET:357 case XHCI_TRBC_SUCCESS:358 batch->error = EOK;359 batch->transferred_size = batch->size - TRB_TRANSFER_LENGTH(*trb);360 break;361 362 case XHCI_TRBC_DATA_BUFFER_ERROR:363 usb_log_warning("Transfer ended with data buffer error.");364 batch->error = EAGAIN;365 batch->transferred_size = 0;366 break;367 368 case XHCI_TRBC_BABBLE_DETECTED_ERROR:369 usb_log_warning("Babble detected during the transfer.");370 batch->error = EAGAIN;371 batch->transferred_size = 0;372 break;373 374 case XHCI_TRBC_USB_TRANSACTION_ERROR:375 usb_log_warning("USB Transaction error.");376 batch->error = EAGAIN;377 batch->transferred_size = 0;378 break;379 380 case XHCI_TRBC_TRB_ERROR:381 usb_log_error("Invalid transfer parameters.");382 batch->error = EINVAL;383 batch->transferred_size = 0;384 break;385 386 case XHCI_TRBC_STALL_ERROR:387 usb_log_warning("Stall condition detected.");388 batch->error = ESTALL;389 batch->transferred_size = 0;390 break;391 392 case XHCI_TRBC_SPLIT_TRANSACTION_ERROR:393 usb_log_error("Split transcation error detected.");394 batch->error = EAGAIN;395 batch->transferred_size = 0;396 break;397 398 default:399 usb_log_warning("Transfer not successfull: %u", completion_code);400 batch->error = EIO;354 case XHCI_TRBC_SHORT_PACKET: 355 case XHCI_TRBC_SUCCESS: 356 batch->error = EOK; 357 batch->transferred_size = batch->size - TRB_TRANSFER_LENGTH(*trb); 358 break; 359 360 case XHCI_TRBC_DATA_BUFFER_ERROR: 361 usb_log_warning("Transfer ended with data buffer error."); 362 batch->error = EAGAIN; 363 batch->transferred_size = 0; 364 break; 365 366 case XHCI_TRBC_BABBLE_DETECTED_ERROR: 367 usb_log_warning("Babble detected during the transfer."); 368 batch->error = EAGAIN; 369 batch->transferred_size = 0; 370 break; 371 372 case XHCI_TRBC_USB_TRANSACTION_ERROR: 373 usb_log_warning("USB Transaction error."); 374 batch->error = EAGAIN; 375 batch->transferred_size = 0; 376 break; 377 378 case XHCI_TRBC_TRB_ERROR: 379 usb_log_error("Invalid transfer parameters."); 380 batch->error = EINVAL; 381 batch->transferred_size = 0; 382 break; 383 384 case XHCI_TRBC_STALL_ERROR: 385 usb_log_warning("Stall condition detected."); 386 batch->error = ESTALL; 387 batch->transferred_size = 0; 388 break; 389 390 case XHCI_TRBC_SPLIT_TRANSACTION_ERROR: 391 usb_log_error("Split transcation error detected."); 392 batch->error = EAGAIN; 393 batch->transferred_size = 0; 394 break; 395 396 default: 397 usb_log_warning("Transfer not successfull: %u", completion_code); 398 batch->error = EIO; 401 399 } 402 400 … … 456 454 * the Reset Endpoint command. 457 455 */ 458 if (batch->ep->transfer_type == USB_TRANSFER_CONTROL 459 &&batch->dir == USB_DIRECTION_OUT) {456 if (batch->ep->transfer_type == USB_TRANSFER_CONTROL && 457 batch->dir == USB_DIRECTION_OUT) { 460 458 const usb_device_request_setup_packet_t *request = &batch->setup.packet; 461 if (request->request == USB_DEVREQ_CLEAR_FEATURE 462 && request->request_type == USB_REQUEST_RECIPIENT_ENDPOINT463 &&request->value == USB_FEATURE_ENDPOINT_HALT) {459 if (request->request == USB_DEVREQ_CLEAR_FEATURE && 460 request->request_type == USB_REQUEST_RECIPIENT_ENDPOINT && 461 request->value == USB_FEATURE_ENDPOINT_HALT) { 464 462 const uint16_t index = uint16_usb2host(request->index); 465 463 const usb_endpoint_t ep_num = index & 0xf; 466 const usb_direction_t dir = (index >> 7) 467 ? USB_DIRECTION_IN468 :USB_DIRECTION_OUT;464 const usb_direction_t dir = (index >> 7) ? 465 USB_DIRECTION_IN : 466 USB_DIRECTION_OUT; 469 467 endpoint_t *halted_ep = bus_find_endpoint(&xhci_dev->base, ep_num, dir); 470 468 if (halted_ep) { … … 488 486 } else { 489 487 usb_log_warning("Device(%u): Resetting unregistered endpoint" 490 " %u %s.", xhci_dev->base.address, ep_num,491 usb_str_direction(dir));488 " %u %s.", xhci_dev->base.address, ep_num, 489 usb_str_direction(dir)); 492 490 } 493 491 } -
uspace/drv/bus/usb/xhci/trb_ring.c
r76d0981d r3bacee1 122 122 123 123 list_initialize(&ring->segments); 124 size_t segment_count = (initial_size + SEGMENT_TRB_USEFUL_COUNT - 1) 125 /SEGMENT_TRB_USEFUL_COUNT;124 size_t segment_count = (initial_size + SEGMENT_TRB_USEFUL_COUNT - 1) / 125 SEGMENT_TRB_USEFUL_COUNT; 126 126 127 127 for (size_t i = 0; i < segment_count; ++i) { … … 134 134 } 135 135 136 trb_segment_t * const segment = get_first_segment(&ring->segments);136 trb_segment_t *const segment = get_first_segment(&ring->segments); 137 137 xhci_trb_t *last = segment_end(segment) - 1; 138 138 xhci_trb_link_fill(last, segment->phys); … … 198 198 static bool trb_generates_interrupt(xhci_trb_t *trb) 199 199 { 200 return TRB_TYPE(*trb) >= XHCI_TRB_TYPE_ENABLE_SLOT_CMD 201 ||TRB_IOC(*trb);200 return TRB_TYPE(*trb) >= XHCI_TRB_TYPE_ENABLE_SLOT_CMD || 201 TRB_IOC(*trb); 202 202 } 203 203 … … 220 220 */ 221 221 errno_t xhci_trb_ring_enqueue_multiple(xhci_trb_ring_t *ring, xhci_trb_t *first_trb, 222 size_t trbs, uintptr_t *phys)222 size_t trbs, uintptr_t *phys) 223 223 { 224 224 errno_t err; … … 230 230 fibril_mutex_lock(&ring->guard); 231 231 232 xhci_trb_t * const saved_enqueue_trb = ring->enqueue_trb;233 trb_segment_t * const saved_enqueue_segment = ring->enqueue_segment;232 xhci_trb_t *const saved_enqueue_trb = ring->enqueue_trb; 233 trb_segment_t *const saved_enqueue_segment = ring->enqueue_segment; 234 234 if (phys) 235 235 *phys = (uintptr_t)NULL; … … 365 365 { 366 366 list_foreach(ring->segments, segments_link, trb_segment_t, segment) 367 memset(segment->trb_storage, 0, sizeof(segment->trb_storage));368 369 trb_segment_t * const segment = get_first_segment(&ring->segments);367 memset(segment->trb_storage, 0, sizeof(segment->trb_storage)); 368 369 trb_segment_t *const segment = get_first_segment(&ring->segments); 370 370 ring->dequeue_segment = segment; 371 371 ring->dequeue_trb = segment_begin(segment);
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