Changeset 3bacee1 in mainline for kernel/arch/ia64/src/interrupt.c
- Timestamp:
- 2018-04-12T16:27:17Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 3cf22f9
- Parents:
- 76d0981d
- git-author:
- Jiri Svoboda <jiri@…> (2018-04-11 19:25:33)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-04-12 16:27:17)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/src/interrupt.c
r76d0981d r3bacee1 229 229 { 230 230 asm volatile ( 231 231 "mov cr.eoi = r0 ;;" 232 232 ); 233 233 } … … 245 245 case INTERRUPT_SPURIOUS: 246 246 #ifdef CONFIG_DEBUG 247 247 printf("cpu%d: spurious interrupt\n", CPU->id); 248 248 #endif 249 249 break;
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