Changeset 39cea6a in mainline for arch/amd64/src/proc/scheduler.c

Timestamp:

2006-04-13T17:38:03Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

e185136

Parents:

897ad60

Message:

Cleanup pm.c and pm.h code on ia32 and amd64.
Add before_task_runs() and before_task_runs_arch() for each architecture.
Add ia32 and amd64 code to ensure I/O Permission Bitmap update.

File:

• arch/amd64/src/proc/scheduler.c (modified) (3 diffs)

arch/amd64/src/proc/scheduler.c

@@ -29 +29 @@
 #include <proc/scheduler.h>
 #include <cpu.h>
+#include <proc/task.h>
 #include <proc/thread.h>
 #include <arch.h>
@@ -35 +36 @@
 #include <arch/debugger.h>
 #include <print.h>
+#include <arch/pm.h>
 
+/** Perform amd64 specific tasks needed before the new task is run. */
+void before_task_runs_arch(void)
+{
+}
+
+/** Perform amd64 specific tasks needed before the new thread is scheduled. */
 void before_thread_runs_arch(void)
 {
+        size_t iomap_size;
+        ptr_16_64_t cpugdtr;
+        descriptor_t *gdt_p;
+
         CPU->arch.tss->rsp0 = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
 
@@ -43 +55 @@
          * hidden part of gs */
         swapgs();
-        write_msr(AMD_MSR_GS,
-                  (__u64)&THREAD->kstack);
+        write_msr(AMD_MSR_GS, (__u64)&THREAD->kstack);
         swapgs();
 
         /* TLS support - set FS to thread local storage */
         write_msr(AMD_MSR_FS, THREAD->arch.tls);
+
+        /*
+         * Switch the I/O Permission Bitmap, if necessary.
+         *
+         * First, copy the I/O Permission Bitmap.
+         * This needs to be changed so that the
+         * copying is avoided if the same task
+         * was already running and the iomap did
+         * not change.
+         */
+        spinlock_lock(&TASK->lock);
+        iomap_size = TASK->arch.iomap_size;
+        if (iomap_size) {
+                ASSERT(TASK->arch.iomap);
+                memcpy(CPU->arch.tss->iomap, TASK->arch.iomap, iomap_size);
+                CPU->arch.tss->iomap[iomap_size] = 0xff;        /* terminating byte */
+        }
+        spinlock_unlock(&TASK->lock);
+
+        /* Second, adjust TSS segment limit. */
+        gdtr_store(&cpugdtr);
+        gdt_p = (descriptor_t *) cpugdtr.base;
+        gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + iomap_size - 1);
+        gdtr_load(&cpugdtr);
 
 #ifdef CONFIG_DEBUG_AS_WATCHPOINT