Changeset 296a80e in mainline for boot/arch/arm32/src/asm.S

Timestamp:

2013-08-03T22:16:12Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

67d02bb

Parents:

9120b69

Message:

arm32: Fix pt mapping, and enable caches in early boot.

File:

• boot/arch/arm32/src/asm.S (modified) (3 diffs)

boot/arch/arm32/src/asm.S

@@ -56 +56 @@
 jump_to_kernel:
         #
-        # TODO
         # Make sure that the I-cache, D-cache and memory are mutually coherent
         # before passing control to the copied code.
@@ -68 +67 @@
 #define CP15_C1_BP              11
 #define CP15_C1_DC              2
-        # Disable I-cache and D-cache before the kernel is started.
+
+
+#ifndef PROCESSOR_ARCH_armv7_a
         mrc     p15, 0, r4, c1, c0, 0
+        
+        # D-cache before the kernel is started.
         bic     r4, r4, #(1 << CP15_C1_DC)
-#ifndef PROCESSOR_ARCH_armv7_a
+
+        #Disable I-cache and Branche predicotrs on non-armv7
         bic     r4, r4, #(1 << CP15_C1_IC)
         bic     r4, r4, #(1 << CP15_C1_BP)
+        
+        mcr     p15, 0, r4, c1, c0, 0
 #endif
-        mcr     p15, 0, r4, c1, c0, 0
+
 
         
@@ -82 +88 @@
         dsb
 #else
+        andi r4, 0
         #cp15 dsb, r4 is ignored (should be zero)
         mcr p15, 0, r4, c7, c10, 4