Changeset 25d7709 in mainline for arch/mips32/src/interrupt.c
- Timestamp:
- 2006-03-13T20:08:16Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 631ca4d
- Parents:
- 45d6add
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips32/src/interrupt.c
r45d6add r25d7709 75 75 } 76 76 77 static void timer_exception(int n, void *stack)77 static void timer_exception(int n, istate_t *istate) 78 78 { 79 79 cp0_compare_write(cp0_count_read() + cp0_compare_value); … … 81 81 } 82 82 83 static void swint0(int n, void *stack)83 static void swint0(int n, istate_t *istate) 84 84 { 85 85 cp0_cause_write(cp0_cause_read() & ~(1 << 8)); /* clear SW0 interrupt */ 86 86 } 87 87 88 static void swint1(int n, void *stack)88 static void swint1(int n, istate_t *istate) 89 89 { 90 90 cp0_cause_write(cp0_cause_read() & ~(1 << 9)); /* clear SW1 interrupt */
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