Changeset 24241cf in mainline for test/fpu/mips1/test.c
- Timestamp:
- 2005-09-10T17:30:56Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a1493d9
- Parents:
- 9060bd1
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
test/fpu/mips1/test.c
r9060bd1 r24241cf 87 87 for (i = 0; i<ATTEMPTS; i++) { 88 88 __asm__ volatile ( 89 " ctc1 %0,$1"89 "mtc1 %0,$1" 90 90 :"=r"(arg) 91 91 ); … … 93 93 scheduler(); 94 94 __asm__ volatile ( 95 " cfc1 %0,$1"95 "mfc1 %0,$1" 96 96 :"=r"(after_arg) 97 97 ); 98 98 99 99 if(arg != after_arg) 100 panic(" Control reg tid%d: arg(%d) != %d\n",100 panic("General reg tid%d: arg(%d) != %d\n", 101 101 THREAD->tid, arg, after_arg); 102 102 }
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