Changeset 24241cf in mainline for arch/mips/src/mips.c


Ignore:
Timestamp:
2005-09-10T17:30:56Z (20 years ago)
Author:
Ondrej Palkovsky <ondrap@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
a1493d9
Parents:
9060bd1
Message:

Basic changes to boot it on SGI Indy.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • arch/mips/src/mips.c

    r9060bd1 r24241cf  
    3636#include <arch/console.h>
    3737#include <memstr.h>
     38#include <arch/interrupt.h>
    3839
    3940/* Size of the code jumping to the exception handler code
     
    4849#include <arch/debug.h>
    4950
     51#include <print.h>
    5052void arch_pre_mm_init(void)
    5153{
     54        /* It is not assumed by default */
     55        cpu_priority_high();
     56
    5257        /* Copy the exception vectors to the right places */
    5358        memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    5459        memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
    5560        memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
    56 
    5761
    5862        /*
     
    6266        cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
    6367
     68        /*
     69         * Mask all interrupts
     70         */
     71        cp0_mask_all_int();
    6472        /*
    6573         * Unmask hardware clock interrupt.
    6674         */
    67         cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
     75        cp0_unmask_int(TIMER_INTERRUPT);
    6876
    6977        /*
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