Changeset 24241cf in mainline for arch/mips/src/mips.c
- Timestamp:
- 2005-09-10T17:30:56Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a1493d9
- Parents:
- 9060bd1
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/mips/src/mips.c
r9060bd1 r24241cf 36 36 #include <arch/console.h> 37 37 #include <memstr.h> 38 #include <arch/interrupt.h> 38 39 39 40 /* Size of the code jumping to the exception handler code … … 48 49 #include <arch/debug.h> 49 50 51 #include <print.h> 50 52 void arch_pre_mm_init(void) 51 53 { 54 /* It is not assumed by default */ 55 cpu_priority_high(); 56 52 57 /* Copy the exception vectors to the right places */ 53 58 memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE); 54 59 memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE); 55 60 memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE); 56 57 61 58 62 /* … … 62 66 cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); 63 67 68 /* 69 * Mask all interrupts 70 */ 71 cp0_mask_all_int(); 64 72 /* 65 73 * Unmask hardware clock interrupt. 66 74 */ 67 cp0_ status_write(cp0_status_read() | (1<<cp0_status_im7_shift));75 cp0_unmask_int(TIMER_INTERRUPT); 68 76 69 77 /*
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