Changeset 22f0561 in mainline for kernel/arch/ia64/src


Ignore:
Timestamp:
2011-12-31T00:12:58Z (14 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
2107e79, c520034
Parents:
efb48eb
Message:

Get rid of kernel static non-identity mappings on ia64.

  • IO_OFFSET is replaced by legacyio_virt_base and LEGACYIO_USER_BASE.
  • VIO_OFFSET and FW_OFFSET are removed entirely.
  • Legacy I/O and IO SAPIC are mapped via hw_map().
  • Remove corresponding locked translation records.
  • Cleanup ia64 kernel pio_read/write_8|16|32().
Location:
kernel/arch/ia64/src
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia64/src/ia64.c

    refb48eb r22f0561  
    4545#include <arch/drivers/it.h>
    4646#include <arch/drivers/kbd.h>
     47#include <arch/legacyio.h>
    4748#include <genarch/drivers/ega/ega.h>
    4849#include <genarch/drivers/i8042/i8042.h>
     
    5152#include <genarch/kbrd/kbrd.h>
    5253#include <genarch/srln/srln.h>
     54#include <mm/page.h>
     55
     56#ifdef MACHINE_ski
     57#include <arch/drivers/ski.h>
     58#endif
    5359
    5460/* NS16550 as a COM 1 */
     
    5864
    5965static uint64_t iosapic_base = 0xfec00000;
     66uintptr_t legacyio_virt_base = 0;
    6067
    6168/** Performs ia64-specific initialization before main_bsp() is called. */
     
    8087static void iosapic_init(void)
    8188{
    82         uint64_t IOSAPIC = PA2KA((sysarg_t)(iosapic_base)) | FW_OFFSET;
     89        uintptr_t IOSAPIC = hw_map(iosapic_base, PAGE_SIZE);
    8390        int i;
    8491       
     
    107114{
    108115        if (config.cpu_active == 1) {
     116                /* Map the page with legacy I/O. */
     117                legacyio_virt_base = hw_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE);
     118
    109119                iosapic_init();
    110120                irq_init(INR_COUNT, INR_COUNT);
     
    113123}
    114124
    115 void arch_post_cpu_init(void)
    116 {
     125void arch_post_cpu_init(void){
    117126}
    118127
     
    202211        sysinfo_set_item_val("ia64_iospace", NULL, true);
    203212        sysinfo_set_item_val("ia64_iospace.address", NULL, true);
    204         sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
     213        sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, LEGACYIO_USER_BASE);
    205214}
    206215
  • kernel/arch/ia64/src/mm/tlb.c

    refb48eb r22f0561  
    5252#include <arch.h>
    5353#include <interrupt.h>
    54 
    55 #define IO_FRAME_BASE 0xFFFFC000000
     54#include <arch/legacyio.h>
    5655
    5756/** Invalidate all TLB entries. */
     
    530529static int try_memmap_io_insertion(uintptr_t va, istate_t *istate)
    531530{
    532         if ((va >= IO_OFFSET ) && (va < IO_OFFSET + (1 << IO_PAGE_WIDTH))) {
     531        if ((va >= LEGACYIO_USER_BASE) && (va < LEGACYIO_USER_BASE + (1 << LEGACYIO_PAGE_WIDTH))) {
    533532                if (TASK) {
    534                         uint64_t io_page = (va & ((1 << IO_PAGE_WIDTH) - 1)) >>
    535                             USPACE_IO_PAGE_WIDTH;
     533                        uint64_t io_page = (va & ((1 << LEGACYIO_PAGE_WIDTH) - 1)) >>
     534                            LEGACYIO_SINGLE_PAGE_WIDTH;
    536535                       
    537536                        if (is_io_page_accessible(io_page)) {
    538537                                uint64_t page, frame;
    539538                               
    540                                 page = IO_OFFSET +
    541                                     (1 << USPACE_IO_PAGE_WIDTH) * io_page;
    542                                 frame = IO_FRAME_BASE +
    543                                     (1 << USPACE_IO_PAGE_WIDTH) * io_page;
     539                                page = LEGACYIO_USER_BASE +
     540                                    (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page;
     541                                frame = LEGACYIO_PHYS_BASE +
     542                                    (1 << LEGACYIO_SINGLE_PAGE_WIDTH) * io_page;
    544543                               
    545544                                tlb_entry_t entry;
     
    555554                                entry.ar = AR_READ | AR_WRITE;
    556555                                entry.ppn = frame >> PPN_SHIFT;
    557                                 entry.ps = USPACE_IO_PAGE_WIDTH;
     556                                entry.ps = LEGACYIO_SINGLE_PAGE_WIDTH;
    558557                               
    559558                                dtc_mapping_insert(page, TASK->as->asid, entry);
  • kernel/arch/ia64/src/start.S

    refb48eb r22f0561  
    3838#define KERNEL_TRANSLATION_I    0x0010000000000661
    3939#define KERNEL_TRANSLATION_D    0x0010000000000661
    40 #define KERNEL_TRANSLATION_VIO  0x0010000000000671      // FIXME: [non-ident]
    41 #define KERNEL_TRANSLATION_IO   0x00100FFFFC000671      // FIXME: [non-ident]
    42 #define KERNEL_TRANSLATION_FW   0x00100000F0000671      // FIXME: [non-ident]
    4340
    4441.section K_TEXT_START, "ax"
     
    8885        itr.d dtr[r0] = r10
    8986       
    90         movl r7 = 1
    91         movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET
    92         mov cr.ifa = r8
    93         movl r10 = (KERNEL_TRANSLATION_VIO)
    94         itr.d dtr[r7] = r10
    95        
    96         mov r11 = cr.itir
    97         movl r10 = ~0xfc
    98         and r10 = r10, r11
    99         movl r11 = (IO_PAGE_WIDTH << PS_SHIFT)
    100         or r10 = r10, r11
    101         mov cr.itir = r10
    102        
    103         movl r7 = 2
    104         movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET
    105         mov cr.ifa = r8
    106         movl r10 = (KERNEL_TRANSLATION_IO)
    107         itr.d dtr[r7] = r10
    108        
    109         # Setup mapping for firmware area (also SAPIC)
    110        
    111         mov r11 = cr.itir
    112         movl r10 = ~0xfc
    113         and r10 = r10, r11
    114         movl r11 = (FW_PAGE_WIDTH << PS_SHIFT)
    115         or r10 = r10, r11
    116         mov cr.itir = r10
    117        
    118         movl r7 = 3
    119         movl r8 = (VRN_KERNEL << VRN_SHIFT) | FW_OFFSET
    120         mov cr.ifa = r8
    121         movl r10 = (KERNEL_TRANSLATION_FW)
    122         itr.d dtr[r7] = r10
    123        
    124         # Initialize DSR
     87        # Initialize DCR
    12588       
    12689        movl r10 = (DCR_DP_MASK | DCR_DK_MASK | DCR_DX_MASK | DCR_DR_MASK | DCR_DA_MASK | DCR_DD_MASK | DCR_LC_MASK)
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