Changeset 1433ecda in mainline for kernel/arch/ia64/src/mm/tlb.c

Timestamp:

2018-04-04T15:42:37Z (7 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

2c4e1cc

Parents:

47b2d7e3

Message:

Fix cstyle: make ccheck-fix and commit only files where all the changes are good.

File:

• kernel/arch/ia64/src/mm/tlb.c (modified) (5 diffs)

kernel/arch/ia64/src/mm/tlb.c

@@ -75 +75 @@
                 for (j = 0; j < count2; j++) {
                         asm volatile (
-                                "ptc.e %[adr] ;;"
-                                :: [adr] "r" (adr)
+                            "ptc.e %[adr] ;;"
+                            :: [adr] "r" (adr)
                         );
                         adr += stride2;
@@ -175 +175 @@
         for (; va < (page + cnt * PAGE_SIZE); va += (1UL << ps))
                 asm volatile (
-                        "ptc.l %[va], %[ps] ;;"
-                        :: [va]"r" (va),
-                           [ps] "r" (ps << 2)
+                    "ptc.l %[va], %[ps] ;;"
+                    :: [va] "r" (va),
+                      [ps] "r" (ps << 2)
                 );
 
@@ -246 +246 @@
 
         asm volatile (
-                "mov r8 = psr ;;\n"
-                "rsm %[mask] ;;\n"                 /* PSR_IC_MASK */
-                "srlz.d ;;\n"
-                "srlz.i ;;\n"
-                "mov cr.ifa = %[va]\n"             /* va */
-                "mov cr.itir = %[word1] ;;\n"      /* entry.word[1] */
-                "cmp.eq p6, p7 = %[dtc], r0 ;;\n"  /* decide between itc and dtc */
-                "(p6) itc.i %[word0] ;;\n"
-                "(p7) itc.d %[word0] ;;\n"
-                "mov psr.l = r8 ;;\n"
-                "srlz.d ;;\n"
-                :: [mask] "i" (PSR_IC_MASK),
-                   [va] "r" (va),
-                   [word0] "r" (entry.word[0]),
-                   [word1] "r" (entry.word[1]),
-                   [dtc] "r" (dtc)
-                : "p6", "p7", "r8"
+            "mov r8 = psr ;;\n"
+            "rsm %[mask] ;;\n"                 /* PSR_IC_MASK */
+            "srlz.d ;;\n"
+            "srlz.i ;;\n"
+            "mov cr.ifa = %[va]\n"             /* va */
+            "mov cr.itir = %[word1] ;;\n"      /* entry.word[1] */
+            "cmp.eq p6, p7 = %[dtc], r0 ;;\n"  /* decide between itc and dtc */
+            "(p6) itc.i %[word0] ;;\n"
+            "(p7) itc.d %[word0] ;;\n"
+            "mov psr.l = r8 ;;\n"
+            "srlz.d ;;\n"
+            :: [mask] "i" (PSR_IC_MASK),
+              [va] "r" (va),
+              [word0] "r" (entry.word[0]),
+              [word1] "r" (entry.word[1]),
+              [dtc] "r" (dtc)
+            : "p6", "p7", "r8"
         );
 
@@ -333 +333 @@
 
         asm volatile (
-                "mov r8 = psr ;;\n"
-                "rsm %[mask] ;;\n"                       /* PSR_IC_MASK */
-                "srlz.d ;;\n"
-                "srlz.i ;;\n"
-                "mov cr.ifa = %[va]\n"                   /* va */
-                "mov cr.itir = %[word1] ;;\n"            /* entry.word[1] */
-                "cmp.eq p6, p7 = %[dtr], r0 ;;\n"        /* decide between itr and dtr */
-                "(p6) itr.i itr[%[tr]] = %[word0] ;;\n"
-                "(p7) itr.d dtr[%[tr]] = %[word0] ;;\n"
-                "mov psr.l = r8 ;;\n"
-                "srlz.d ;;\n"
-                :: [mask] "i" (PSR_IC_MASK),
-                   [va] "r" (va),
-                   [word1] "r" (entry.word[1]),
-                   [word0] "r" (entry.word[0]),
-                   [tr] "r" (tr),
-                   [dtr] "r" (dtr)
-                : "p6", "p7", "r8"
+            "mov r8 = psr ;;\n"
+            "rsm %[mask] ;;\n"                       /* PSR_IC_MASK */
+            "srlz.d ;;\n"
+            "srlz.i ;;\n"
+            "mov cr.ifa = %[va]\n"                   /* va */
+            "mov cr.itir = %[word1] ;;\n"            /* entry.word[1] */
+            "cmp.eq p6, p7 = %[dtr], r0 ;;\n"        /* decide between itr and dtr */
+            "(p6) itr.i itr[%[tr]] = %[word0] ;;\n"
+            "(p7) itr.d dtr[%[tr]] = %[word0] ;;\n"
+            "mov psr.l = r8 ;;\n"
+            "srlz.d ;;\n"
+            :: [mask] "i" (PSR_IC_MASK),
+              [va] "r" (va),
+              [word1] "r" (entry.word[1]),
+              [word0] "r" (entry.word[0]),
+              [tr] "r" (tr),
+              [dtr] "r" (dtr)
+            : "p6", "p7", "r8"
         );
 
@@ -403 +403 @@
 {
         asm volatile (
-                "ptr.d %[page], %[width]\n"
-                :: [page] "r" (page),
-                   [width] "r" (width << 2)
+            "ptr.d %[page], %[width]\n"
+            :: [page] "r" (page),
+              [width] "r" (width << 2)
         );
 }