Changeset 1084a784 in mainline for arch/mips32/include/cp0.h

Timestamp:

2005-10-04T22:09:41Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

342de62

Parents:

8e3f47b3

Message:

mips32 memory management work.
TLB Refill Exception implemented (passed basic testing).
Remove bit g from struct entry_hi.
Add generic find_mapping().
Add asid to vm_t type, define asid_t to hide architecture specific differences.
Implement ASID allocation for mips32, dummy for other architectures.
Add THE→vm (a.k.a. VM).
Add vm_install_arch().
Move pte_t definition to arch/types.h on each architecture.
Fix PTL manipulating functions on mips32 to shift pfn by 12 instead of by 14.
Fix tlb_init_arch() to initialize all entries.

Other.
Remove unnecessary header files from arch.h
Add missing headers here and there.
Remove two unnecessary ld flags from mips32 makefile.

File:

• arch/mips32/include/cp0.h (modified) (1 diff)

arch/mips32/include/cp0.h

@@ -31 +31 @@
 
 #include <arch/types.h>
+#include <arch/mm/tlb.h>
 
 #define cp0_status_ie_enabled_bit       (1<<0)