Changeset 0fa6044 in mainline for kernel/arch/sparc64/include/trap/trap_table.h

Timestamp:

2006-08-29T15:35:44Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

e11ae91

Parents:

32fffef0

Message:

sparc64 work.

Fix bug introduced in revision 1852. When fixing CWP,
the input registers of the current window (i.e. output
registers of the window belonging to the interrupted
context) must be preserved. Preserve those registers
in memory. Sure there exist more efficient ways how to
copy the inputs.

Simplify before_thread_runs_arch(), resp. after_thread_ran_arch(),
and make them install, resp. uninstall, DTLB locked mapping for
eventual userspace window buffer.

File:

• kernel/arch/sparc64/include/trap/trap_table.h (modified) (1 diff)

kernel/arch/sparc64/include/trap/trap_table.h

@@ -82 +82 @@
  * definition of the istate structure.
  */
-#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE    (STACK_WINDOW_SAVE_AREA_SIZE+(4*8))
+#define PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE    (STACK_WINDOW_SAVE_AREA_SIZE+(12*8))
 #define SAVED_TSTATE    -(1*8)
 #define SAVED_TPC       -(2*8)
-#define SAVED_TNPC      -(3*8)
+#define SAVED_TNPC      -(3*8)          /* <-- istate_t begins here */
+/* alignment gap */
+#define SAVED_I0        -(5*8)
+#define SAVED_I1        -(6*8)
+#define SAVED_I2        -(7*8)
+#define SAVED_I3        -(8*8)
+#define SAVED_I4        -(9*8)
+#define SAVED_I5        -(10*8)
+#define SAVED_I6        -(11*8)
+#define SAVED_I7        -(12*8)
 
 .macro PREEMPTIBLE_HANDLER f