Changeset 09ab0a9a in mainline for kernel/arch/riscv64
- Timestamp:
- 2018-09-13T12:05:53Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- cc74cb5
- Parents:
- b2aaaa0
- git-author:
- Jiri Svoboda <jiri@…> (2018-09-13 07:09:46)
- git-committer:
- Jiri Svoboda <jiri@…> (2018-09-13 12:05:53)
- Location:
- kernel/arch/riscv64
- Files:
-
- 4 edited
-
include/arch/context_struct.h (modified) (1 diff)
-
include/arch/istate_struct.h (modified) (1 diff)
-
src/cpu/cpu.c (modified) (1 diff)
-
src/smc.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/riscv64/include/arch/context_struct.h
rb2aaaa0 r09ab0a9a 75 75 #endif 76 76 #endif 77 -
kernel/arch/riscv64/include/arch/istate_struct.h
rb2aaaa0 r09ab0a9a 113 113 #endif 114 114 #endif 115 -
kernel/arch/riscv64/src/cpu/cpu.c
rb2aaaa0 r09ab0a9a 39 39 #include <fpu_context.h> 40 40 41 42 41 void fpu_disable(void) 43 42 { -
kernel/arch/riscv64/src/smc.c
rb2aaaa0 r09ab0a9a 34 34 compiler_barrier(); 35 35 } 36
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