Changeset 096d11e5 in mainline for arch/sparc64/include/asm.h

Timestamp:

2005-12-22T11:09:02Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

2cf5634

Parents:

d53aba3f

Message:

sparc64 work.
Add functions to read and write TICK and TICK_compare registers.
Add types describing TICK and TICK_compare registers.

File:

• arch/sparc64/include/asm.h (modified) (2 diffs)

arch/sparc64/include/asm.h

@@ -57 +57 @@
 }
 
+/** Read TICK_compare Register.
+ *
+ * @return Value of TICK_comapre register.
+ */
+static inline __u64 tick_compare_read(void)
+{
+        __u64 v;
+        
+        __asm__ volatile ("rd %%tick_cmpr, %0\n" : "=r" (v));
+        
+        return v;
+}
+
+/** Write TICK_compare Register.
+ *
+ * @param New value of TICK_comapre register.
+ */
+static inline void tick_compare_write(__u64 v)
+{
+        __asm__ volatile ("wr %0, %1, %%tick_cmpr\n" : : "r" (v), "i" (0));
+}
+
+/** Read TICK Register.
+ *
+ * @return Value of TICK register.
+ */
+static inline __u64 tick_read(void)
+{
+        __u64 v;
+        
+        __asm__ volatile ("rdpr %%tick, %0\n" : "=r" (v));
+        
+        return v;
+}
+
+/** Write TICK Register.
+ *
+ * @param New value of TICK register.
+ */
+static inline void tick_write(__u64 v)
+{
+        __asm__ volatile ("wrpr %0, %1, %%tick\n" : : "r" (v), "i" (0));
+}
+
 
 /** Enable interrupts.
@@ -197 +241 @@
 }
 
+
+
 void cpu_halt(void);
 void cpu_sleep(void);