Changeset 06f10ac in mainline for kernel/arch/arm64/include

Timestamp:

2021-08-22T19:08:44Z (4 years ago)

Author:

Martin Decky <martin@…>

Branches:

master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

c21cc26

Parents:

95b7d4df

Message:

Implement support for HiKey 960

Initial support for the 96Boards HiKey 960 board.

• The kernel identity mapping has been extended to 4 GiB. The initial bootstrap mapping maps 3 GiB as nornal memory and the next 1 GiB as device memory to support early UART debugging output.

• The istate_t has been padded in order to preserve the stack pointer alignment invariant.

The current implementation is limited to UP and UART input/output.

Location:

kernel/arch/arm64/include/arch

Files:

• barrier.h (modified) (1 diff)
• istate_struct.h (modified) (2 diffs)
• mach/hikey960/hikey960.h (moved) (moved from kernel/arch/arm64/src/smc.c ) (2 diffs)
• mach/virt/virt.h (modified) (1 diff)
• mm/km.h (modified) (2 diffs)
• mm/page.h (modified) (1 diff)

kernel/arch/arm64/include/arch/barrier.h

@@ -37 +37 @@
 #define KERN_arm64_BARRIER_H_
 
-#include <stddef.h>
-
-#define COHERENCE_INVAL_MIN  4
-
-/** Ensure visibility of instruction updates for a multiprocessor.
- *
- * @param addr Address of the first instruction.
- * @param size Size of the instruction block (in bytes).
- */
-static inline void ensure_visibility(void *addr, size_t len)
-{
-        size_t i;
-
-        /*
-         * Clean to Point of Unification to make the new instructions visible to
-         * the instruction cache.
-         */
-        for (i = 0; i < len; i += COHERENCE_INVAL_MIN)
-                asm volatile (
-                    "dc cvau, %[addr]\n"
-                    : : [addr] "r" ((char *) addr + i)
-                );
-
-        /* Ensure completion on all PEs. */
-        asm volatile ("dsb ish" ::: "memory");
-
-        /* Ensure instruction cache/branch predictor discards stale data. */
-        for (i = 0; i < len; i += COHERENCE_INVAL_MIN)
-                asm volatile (
-                    "ic ivau, %[addr]\n"
-                    : : [addr] "r" ((char *) addr + i)
-                );
-
-        /* Ensure completion on all PEs. */
-        asm volatile ("dsb ish" ::: "memory");
-
-        /* Synchronize context on this PE. */
-        asm volatile ("isb");
-}
-
 #endif
 

kernel/arch/arm64/include/arch/istate_struct.h

@@ -65 +65 @@
 #define ISTATE_OFFSET_X29    0x108
 #define ISTATE_OFFSET_X30    0x110
-#define ISTATE_SIZE          0x118
+#define ISTATE_OFFSET_PAD0   0x118
+#define ISTATE_SIZE          0x120
 
 #ifndef __ASSEMBLER__
@@ -109 +110 @@
         /* Link Register. */
         uint64_t x30;
+
+        /*
+         * ARM64 mandates that the stack pointer is always aligned to
+         * a 16-byte boundary. To satisfy this condition, the size of
+         * this data structure needs to be also a multiple of 16 bytes.
+         * This is the reason for this padding.
+         */
+        uint64_t pad0;
 } istate_t;
 
 #endif
+
 #endif

kernel/arch/arm64/include/arch/mach/hikey960/hikey960.h

@@ -1 +1 @@
 /*
- * Copyright (c) 2019 Petr Pavlu
+ * Copyright (c) 2021 Martin Decky
  * All rights reserved.
  *
@@ -27 +27 @@
  */
 
-#include <arch/barrier.h>
-#include <barrier.h>
+/** @addtogroup kernel_arm64_hikey960
+ * @brief HiKey 960 platform.
+ * @ingroup kernel_arm64
+ * @{
+ */
+/** @file
+ * @brief HiKey 960 platform driver.
+ */
 
-void smc_coherence(void *a, size_t l)
-{
-        ensure_visibility(a, l);
-}
+#ifndef KERN_arm64_mach_hikey960_H_
+#define KERN_arm64_mach_hikey960_H_
+
+#include <arch/machine_func.h>
+
+extern struct arm_machine_ops hikey960_machine_ops;
+
+#endif
+
+/** @}
+ */

kernel/arch/arm64/include/arch/mach/virt/virt.h

@@ -36 +36 @@
  */
 
-#ifndef KERN_arm64_virt_H_
-#define KERN_arm64_virt_H_
+#ifndef KERN_arm64_mach_virt_H_
+#define KERN_arm64_mach_virt_H_
 
 #include <arch/machine_func.h>

kernel/arch/arm64/include/arch/mm/km.h

@@ -41 +41 @@
 #include <typedefs.h>
 
-#define KM_ARM64_IDENTITY_START  UINT64_C(0xffffffff80000000)
-#define KM_ARM64_IDENTITY_SIZE   UINT64_C(0x0000000080000000)
+#define KM_ARM64_IDENTITY_START  UINT64_C(0xffffffff00000000)
+#define KM_ARM64_IDENTITY_SIZE   UINT64_C(0x0000000100000000)
 
 #define KM_ARM64_NON_IDENTITY_START  UINT64_C(0xffff000000000000)
-#define KM_ARM64_NON_IDENTITY_SIZE   UINT64_C(0x0000ffff80000000)
+#define KM_ARM64_NON_IDENTITY_SIZE   UINT64_C(0x0000ffff00000000)
 
 extern void km_identity_arch_init(void);
@@ -53 +53 @@
 #else /* __ASSEMBLER__ */
 
-#define KM_ARM64_IDENTITY_START  0xffffffff80000000
-#define KM_ARM64_IDENTITY_SIZE   0x0000000080000000
+#define KM_ARM64_IDENTITY_START  0xffffffff00000000
+#define KM_ARM64_IDENTITY_SIZE   0x0000000100000000
 
 #define KM_ARM64_NON_IDENTITY_START  0xffff000000000000
-#define KM_ARM64_NON_IDENTITY_SIZE   0x0000ffff80000000
+#define KM_ARM64_NON_IDENTITY_SIZE   0x0000ffff00000000
 
 #endif /* __ASSEMBLER__ */

kernel/arch/arm64/include/arch/mm/page.h

@@ -53 +53 @@
 
 #define KA2PA(x) \
-        (((uintptr_t) (x)) - UINT64_C(0xffffffff80000000) + physmem_base)
+        (((uintptr_t) (x)) - UINT64_C(0xffffffff00000000) + physmem_base)
 #define PA2KA(x) \
-        (((uintptr_t) (x)) + UINT64_C(0xffffffff80000000) - physmem_base)
+        (((uintptr_t) (x)) + UINT64_C(0xffffffff00000000) - physmem_base)
 
 #endif /* __ASSEMBLER__ */