source: mainline/uspace/lib/libc/arch/ia64/include/atomic.h@ e15e0e8

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e15e0e8 was e15e0e8, checked in by Jakub Jermar <jakub@…>, 16 years ago

Make provisions for different implementations of atomic_t.
This breaks arm32.

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup libcia64
30 * @{
31 */
32/** @file
33 */
34
35#ifndef LIBC_ia64_ATOMIC_H_
36#define LIBC_ia64_ATOMIC_H_
37
38#define LIBC_ARCH_ATOMIC_H_
39
40#include <atomicdflt.h>
41
42static inline void atomic_inc(atomic_t *val)
43{
44 long v;
45
46 asm volatile (
47 "fetchadd8.rel %[v] = %[count], 1\n"
48 : [v] "=r" (v),
49 [count] "+m" (val->count)
50 );
51}
52
53static inline void atomic_dec(atomic_t *val)
54{
55 long v;
56
57 asm volatile (
58 "fetchadd8.rel %[v] = %[count], -1\n"
59 : [v] "=r" (v),
60 [count] "+m" (val->count)
61 );
62}
63
64static inline long atomic_preinc(atomic_t *val)
65{
66 long v;
67
68 asm volatile (
69 "fetchadd8.rel %[v] = %[count], 1\n"
70 : [v] "=r" (v),
71 [count] "+m" (val->count)
72 );
73
74 return (v + 1);
75}
76
77static inline long atomic_predec(atomic_t *val)
78{
79 long v;
80
81 asm volatile (
82 "fetchadd8.rel %[v] = %[count], -1\n"
83 : [v] "=r" (v),
84 [count] "+m" (val->count)
85 );
86
87 return (v - 1);
88}
89
90static inline long atomic_postinc(atomic_t *val)
91{
92 long v;
93
94 asm volatile (
95 "fetchadd8.rel %[v] = %[count], 1\n"
96 : [v] "=r" (v),
97 [count] "+m" (val->count)
98 );
99
100 return v;
101}
102
103static inline long atomic_postdec(atomic_t *val)
104{
105 long v;
106
107 asm volatile (
108 "fetchadd8.rel %[v] = %[count], -1\n"
109 : [v] "=r" (v),
110 [count] "+m" (val->count)
111 );
112
113 return v;
114}
115
116#endif
117
118/** @}
119 */
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