1 | /*
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2 | * Copyright (c) 2010 Lenka Trochtova
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup libc
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30 | * @{
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31 | */
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32 | /** @file
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33 | */
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34 |
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35 | #include <device/hw_res.h>
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36 | #include <errno.h>
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37 | #include <async.h>
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38 | #include <malloc.h>
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39 |
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40 | int hw_res_get_resource_list(async_sess_t *sess,
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41 | hw_resource_list_t *hw_resources)
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42 | {
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43 | sysarg_t count = 0;
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44 |
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45 | async_exch_t *exch = async_exchange_begin(sess);
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46 |
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47 | int rc = async_req_1_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
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48 | HW_RES_GET_RESOURCE_LIST, &count);
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49 |
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50 | if (rc != EOK) {
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51 | async_exchange_end(exch);
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52 | return rc;
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53 | }
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54 |
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55 | size_t size = count * sizeof(hw_resource_t);
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56 | hw_resource_t *resources = (hw_resource_t *) malloc(size);
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57 | if (resources == NULL) {
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58 | // FIXME: This is protocol violation
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59 | async_exchange_end(exch);
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60 | return ENOMEM;
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61 | }
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62 |
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63 | rc = async_data_read_start(exch, resources, size);
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64 | async_exchange_end(exch);
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65 |
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66 | if (rc != EOK) {
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67 | free(resources);
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68 | return rc;
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69 | }
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70 |
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71 | hw_resources->resources = resources;
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72 | hw_resources->count = count;
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73 |
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74 | return EOK;
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75 | }
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76 |
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77 | int hw_res_enable_interrupt(async_sess_t *sess, int irq)
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78 | {
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79 | async_exch_t *exch = async_exchange_begin(sess);
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80 |
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81 | int rc = async_req_2_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
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82 | HW_RES_ENABLE_INTERRUPT, irq);
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83 | async_exchange_end(exch);
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84 |
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85 | return rc;
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86 | }
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87 |
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88 | /** Setup DMA channel to specified place and mode.
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89 | *
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90 | * @param channel DMA channel.
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91 | * @param pa Physical address of the buffer.
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92 | * @param size DMA buffer size.
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93 | * @param mode Mode of the DMA channel:
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94 | * - Read or Write
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95 | * - Allow automatic reset
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96 | * - Use address decrement instead of increment
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97 | * - Use SINGLE/BLOCK/ON DEMAND transfer mode
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98 | *
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99 | * @return Error code.
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100 | *
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101 | */
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102 | int hw_res_dma_channel_setup(async_sess_t *sess,
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103 | unsigned channel, uint32_t pa, uint32_t size, uint8_t mode)
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104 | {
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105 | async_exch_t *exch = async_exchange_begin(sess);
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106 |
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107 | const uint32_t packed = (channel & 0xffff) | (mode << 16);
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108 | const int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
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109 | HW_RES_DMA_CHANNEL_SETUP, packed, pa, size);
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110 |
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111 | async_exchange_end(exch);
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112 |
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113 | return ret;
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114 | }
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115 |
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116 | /** Query remaining bytes in the buffer.
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117 | *
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118 | * @param channel DMA channel.
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119 | *
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120 | * @return Number of bytes remaining in the buffer if positive.
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121 | * @return Error code if negative.
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122 | *
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123 | */
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124 | int hw_res_dma_channel_remain(async_sess_t *sess, unsigned channel)
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125 | {
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126 | async_exch_t *exch = async_exchange_begin(sess);
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127 |
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128 | sysarg_t remain;
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129 | const int ret = async_req_2_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
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130 | HW_RES_DMA_CHANNEL_REMAIN, channel, &remain);
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131 |
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132 | async_exchange_end(exch);
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133 |
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134 | if (ret == EOK)
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135 | return remain;
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136 |
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137 | return ret;
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138 | }
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139 |
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140 | /** @}
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141 | */
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