[5cd136ab] | 1 | /*
|
---|
| 2 | * Copyright (c) 2010 Lenka Trochtova
|
---|
| 3 | * All rights reserved.
|
---|
| 4 | *
|
---|
| 5 | * Redistribution and use in source and binary forms, with or without
|
---|
| 6 | * modification, are permitted provided that the following conditions
|
---|
| 7 | * are met:
|
---|
| 8 | *
|
---|
| 9 | * - Redistributions of source code must retain the above copyright
|
---|
| 10 | * notice, this list of conditions and the following disclaimer.
|
---|
| 11 | * - Redistributions in binary form must reproduce the above copyright
|
---|
| 12 | * notice, this list of conditions and the following disclaimer in the
|
---|
| 13 | * documentation and/or other materials provided with the distribution.
|
---|
| 14 | * - The name of the author may not be used to endorse or promote products
|
---|
| 15 | * derived from this software without specific prior written permission.
|
---|
| 16 | *
|
---|
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
---|
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
---|
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
---|
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
---|
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
---|
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
---|
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
---|
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
---|
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
---|
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
| 27 | */
|
---|
[0adddea] | 28 |
|
---|
[5cd136ab] | 29 | /** @addtogroup libc
|
---|
| 30 | * @{
|
---|
| 31 | */
|
---|
| 32 | /** @file
|
---|
| 33 | */
|
---|
[0adddea] | 34 |
|
---|
[5cd136ab] | 35 | #include <device/hw_res.h>
|
---|
| 36 | #include <errno.h>
|
---|
| 37 | #include <async.h>
|
---|
| 38 | #include <malloc.h>
|
---|
| 39 |
|
---|
[79ae36dd] | 40 | int hw_res_get_resource_list(async_sess_t *sess,
|
---|
| 41 | hw_resource_list_t *hw_resources)
|
---|
[5cd136ab] | 42 | {
|
---|
[96b02eb9] | 43 | sysarg_t count = 0;
|
---|
[cf02eaf] | 44 |
|
---|
[79ae36dd] | 45 | async_exch_t *exch = async_exchange_begin(sess);
|
---|
[a0d1d9d] | 46 | if (exch == NULL)
|
---|
| 47 | return ENOMEM;
|
---|
[79ae36dd] | 48 | int rc = async_req_1_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
|
---|
[f724e82] | 49 | HW_RES_GET_RESOURCE_LIST, &count);
|
---|
[cf02eaf] | 50 |
|
---|
[79ae36dd] | 51 | if (rc != EOK) {
|
---|
| 52 | async_exchange_end(exch);
|
---|
[be942bc] | 53 | return rc;
|
---|
[79ae36dd] | 54 | }
|
---|
[cf02eaf] | 55 |
|
---|
[5cd136ab] | 56 | size_t size = count * sizeof(hw_resource_t);
|
---|
[79ae36dd] | 57 | hw_resource_t *resources = (hw_resource_t *) malloc(size);
|
---|
| 58 | if (resources == NULL) {
|
---|
| 59 | // FIXME: This is protocol violation
|
---|
| 60 | async_exchange_end(exch);
|
---|
[be942bc] | 61 | return ENOMEM;
|
---|
[79ae36dd] | 62 | }
|
---|
[cf02eaf] | 63 |
|
---|
[79ae36dd] | 64 | rc = async_data_read_start(exch, resources, size);
|
---|
| 65 | async_exchange_end(exch);
|
---|
[cf02eaf] | 66 |
|
---|
[be942bc] | 67 | if (rc != EOK) {
|
---|
[79ae36dd] | 68 | free(resources);
|
---|
[be942bc] | 69 | return rc;
|
---|
[5cd136ab] | 70 | }
|
---|
[cf02eaf] | 71 |
|
---|
[79ae36dd] | 72 | hw_resources->resources = resources;
|
---|
| 73 | hw_resources->count = count;
|
---|
[cf02eaf] | 74 |
|
---|
[be942bc] | 75 | return EOK;
|
---|
[5cd136ab] | 76 | }
|
---|
| 77 |
|
---|
[79ae36dd] | 78 | bool hw_res_enable_interrupt(async_sess_t *sess)
|
---|
[5cd136ab] | 79 | {
|
---|
[79ae36dd] | 80 | async_exch_t *exch = async_exchange_begin(sess);
|
---|
[a0d1d9d] | 81 | if (exch == NULL)
|
---|
| 82 | return false;
|
---|
[79ae36dd] | 83 | int rc = async_req_1_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
|
---|
[f724e82] | 84 | HW_RES_ENABLE_INTERRUPT);
|
---|
[79ae36dd] | 85 | async_exchange_end(exch);
|
---|
[cf02eaf] | 86 |
|
---|
[79ae36dd] | 87 | return (rc == EOK);
|
---|
[5cd136ab] | 88 | }
|
---|
[0adddea] | 89 |
|
---|
[a0d1d9d] | 90 | /**
|
---|
| 91 | * Setup DMA channel to specified place and mode.
|
---|
| 92 | * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.
|
---|
| 93 | * @param pa Physical address of the buffer. Must be < 16MB for 16 bit and < 1MB
|
---|
| 94 | * for 8 bit transfers.
|
---|
| 95 | * @param size DMA buffer size, limited to 64K.
|
---|
| 96 | * @param mode Mode of the DMA channel:
|
---|
| 97 | * - Read or Write
|
---|
| 98 | * - Allow automatic reset
|
---|
| 99 | * - Use address decrement instead of increment
|
---|
| 100 | * - Use SINGLE/BLOCK/ON DEMAND transfer mode
|
---|
| 101 | * @return Error code.
|
---|
| 102 | */
|
---|
[9991c47] | 103 | int hw_res_dma_channel_setup(async_sess_t *sess,
|
---|
[301032a] | 104 | unsigned channel, uint32_t pa, uint32_t size, uint8_t mode)
|
---|
[9991c47] | 105 | {
|
---|
| 106 | async_exch_t *exch = async_exchange_begin(sess);
|
---|
| 107 | if (exch == NULL)
|
---|
| 108 | return ENOMEM;
|
---|
[301032a] | 109 | const uint32_t packed = (channel & 0xffff) | (mode << 16);
|
---|
[a0d1d9d] | 110 | const int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
|
---|
[301032a] | 111 | HW_RES_DMA_CHANNEL_SETUP, packed, pa, size);
|
---|
[9991c47] | 112 | async_exchange_end(exch);
|
---|
[a0d1d9d] | 113 |
|
---|
[9991c47] | 114 | return ret;
|
---|
| 115 | }
|
---|
| 116 |
|
---|
[6fd365d] | 117 | /**
|
---|
| 118 | * Query remaining bytes in the buffer.
|
---|
| 119 | * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.
|
---|
| 120 | * @return Number of bytes remaining in the buffer(>=0) or error code(<0).
|
---|
| 121 | */
|
---|
| 122 | int hw_res_dma_channel_remain(async_sess_t *sess, unsigned channel)
|
---|
| 123 | {
|
---|
| 124 | async_exch_t *exch = async_exchange_begin(sess);
|
---|
| 125 | if (exch == NULL)
|
---|
| 126 | return ENOMEM;
|
---|
| 127 | sysarg_t remain;
|
---|
| 128 | const int ret = async_req_2_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
|
---|
| 129 | HW_RES_DMA_CHANNEL_REMAIN, channel, &remain);
|
---|
| 130 | async_exchange_end(exch);
|
---|
| 131 | if (ret == EOK)
|
---|
| 132 | return remain;
|
---|
| 133 | return ret;
|
---|
| 134 | }
|
---|
| 135 |
|
---|
[0adddea] | 136 | /** @}
|
---|
[be942bc] | 137 | */
|
---|