source: mainline/uspace/drv/platform/amdm37x/prm/clock_control.h@ c718bda

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c718bda was 7ee7e6a, checked in by Jakub Jermar <jakub@…>, 9 years ago

Further reduce the number of inclusions of sys/types.h

  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 * Copyright (c) 2012 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amdm37xdrvprm
30 * @{
31 */
32/** @file
33 * @brief Clock Control Clock Management IO register structure.
34 */
35#ifndef AMDM37X_PRM_CLOCK_CONTROL_H
36#define AMDM37X_PRM_CLOCK_CONTROL_H
37
38#include <ddi.h>
39#include <macros.h>
40
41/* AM/DM37x TRM p.536 and p.589 */
42#define CLOCK_CONTROL_PRM_BASE_ADDRESS 0x48306d00
43#define CLOCK_CONTROL_PRM_SIZE 8192
44
45/** Clock control PRM register map
46 */
47typedef struct {
48 PADD32[16];
49 ioport32_t clksel;
50#define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_MASK (0x7)
51#define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_12M (0x0)
52#define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_13M (0x1)
53#define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_19_2M (0x2)
54#define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_26M (0x3)
55#define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_38_4M (0x4)
56#define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_16_8M (0x5)
57
58 PADD32[12];
59 ioport32_t clkout_ctrl;
60#define CLOCK_CONTROL_PRM_CLKOUT_CTRL_CLKOUOUT_EN_FLAG (1 << 7)
61
62} clock_control_prm_regs_t;
63
64static inline unsigned sys_clk_freq_kHz(unsigned reg_val)
65{
66 switch(reg_val)
67 {
68 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_12M: return 12000;
69 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_13M: return 13000;
70 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_19_2M: return 19200;
71 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_26M: return 26000;
72 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_38_4M: return 38400;
73 case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_16_8M: return 16800;
74 }
75 return 0;
76}
77
78
79#endif
80/**
81 * @}
82 */
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