| 1 | /*
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| 2 | * Copyright (c) 2012 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup amdm37x
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief Clock Control Clock Management IO register structure.
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| 34 | */
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| 35 | #ifndef AMDM37X_PRM_CLOCK_CONTROL_H
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| 36 | #define AMDM37X_PRM_CLOCK_CONTROL_H
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| 37 |
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| 38 | #include <ddi.h>
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| 39 | #include <macros.h>
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| 40 |
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| 41 | /* AM/DM37x TRM p.536 and p.589 */
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| 42 | #define CLOCK_CONTROL_PRM_BASE_ADDRESS 0x48306d00
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| 43 | #define CLOCK_CONTROL_PRM_SIZE 8192
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| 44 |
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| 45 | /** Clock control PRM register map
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| 46 | */
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| 47 | typedef struct {
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| 48 | PADD32(16);
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| 49 | ioport32_t clksel;
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| 50 | #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_MASK (0x7)
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| 51 | #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_12M (0x0)
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| 52 | #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_13M (0x1)
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| 53 | #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_19_2M (0x2)
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| 54 | #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_26M (0x3)
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| 55 | #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_38_4M (0x4)
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| 56 | #define CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_16_8M (0x5)
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| 57 |
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| 58 | PADD32(12);
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| 59 | ioport32_t clkout_ctrl;
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| 60 | #define CLOCK_CONTROL_PRM_CLKOUT_CTRL_CLKOUOUT_EN_FLAG (1 << 7)
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| 61 |
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| 62 | } clock_control_prm_regs_t;
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| 63 |
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| 64 | static inline unsigned sys_clk_freq_kHz(unsigned reg_val)
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| 65 | {
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| 66 | switch (reg_val) {
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| 67 | case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_12M:
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| 68 | return 12000;
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| 69 | case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_13M:
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| 70 | return 13000;
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| 71 | case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_19_2M:
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| 72 | return 19200;
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| 73 | case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_26M:
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| 74 | return 26000;
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| 75 | case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_38_4M:
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| 76 | return 38400;
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| 77 | case CLOCK_CONTROL_PRM_CLKSEL_SYS_CLKIN_16_8M:
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| 78 | return 16800;
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| 79 | }
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| 80 | return 0;
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| 81 | }
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| 82 |
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| 83 | #endif
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| 84 | /**
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| 85 | * @}
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| 86 | */
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