[42dbb26] | 1 | /*
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| 2 | * Copyright (c) 2011 Jan Vesely
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbohcihc
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief OHCI host controller register structure
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| 34 | */
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| 35 | #ifndef DRV_OHCI_OHCI_REGS_H
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| 36 | #define DRV_OHCI_OHCI_REGS_H
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| 37 | #include <stdint.h>
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| 38 |
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| 39 | typedef struct ohci_regs
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| 40 | {
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| 41 | volatile uint32_t revision;
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| 42 | volatile uint32_t control;
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| 43 | volatile uint32_t command_status;
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[e7bc999] | 44 | volatile uint32_t interrupt_status;
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[42dbb26] | 45 | volatile uint32_t interupt_enable;
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[e7bc999] | 46 | #define IE_SO (1 << 0)
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| 47 | #define IE_WDH (1 << 1)
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| 48 | #define IE_SF (1 << 2)
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| 49 | #define IE_RD (1 << 3)
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| 50 | #define IE_UE (1 << 4)
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| 51 | #define IE_FNO (1 << 5)
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| 52 | #define IE_RHSC (1 << 6)
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| 53 | #define IE_OC (1 << 30)
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| 54 | #define IE_MIE (1 << 31)
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| 55 |
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[42dbb26] | 56 | volatile uint32_t interrupt_disable;
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| 57 | volatile uint32_t hcca;
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| 58 | volatile uint32_t period_corrent;
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| 59 | volatile uint32_t control_head;
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| 60 | volatile uint32_t control_current;
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| 61 | volatile uint32_t bulk_head;
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| 62 | volatile uint32_t bulk_current;
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| 63 | volatile uint32_t done_head;
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| 64 | volatile uint32_t fm_interval;
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| 65 | volatile uint32_t fm_remaining;
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| 66 | volatile uint32_t fm_number;
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| 67 | volatile uint32_t periodic_start;
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| 68 | volatile uint32_t ls_threshold;
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| 69 | volatile uint32_t rh_desc_a;
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| 70 | volatile uint32_t rh_desc_b;
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| 71 | volatile uint32_t rh_status;
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| 72 | volatile uint32_t rh_port_status[];
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[e7bc999] | 73 | } __attribute__((packed)) ohci_regs_t;
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[42dbb26] | 74 | #endif
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| 75 | /**
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| 76 | * @}
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| 77 | */
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