source: mainline/uspace/drv/ohci/hw_struct/transfer_descriptor.h@ f0891ce

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f0891ce was 5e2be267, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

OHCI hw memory structures

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File size: 2.6 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohci
29 * @{
30 */
31/** @file
32 * @brief OHCI driver
33 */
34#ifndef DRV_OHCI_TRANSFER_DESCRIPTOR_H
35#define DRV_OHCI_TRANSFER_DESCRIPTOR_H
36
37#include <stdint.h>
38
39typedef struct td {
40 volatile uint32_t status;
41#define TD_STATUS_ROUND_FLAG (1 << 18)
42#define TD_STATUS_DP_MASK (0x3) /* direction/PID */
43#define TD_STATUS_DP_SHIFT (19)
44#define TD_STATUS_DP_SETUP (0x0)
45#define TD_STATUS_DP_IN (0x1)
46#define TD_STATUS_DP_OUT (0x2)
47#define TD_STATUS_DI_MASK (0x7) /* delay interrupt, wait DI frames before int */
48#define TD_STATUS_DI_SHIFT (21)
49#define TD_STATUS_DI_NO_INTERRUPT (0x7)
50#define TD_STATUS_T_MASK (0x3) /* data toggle 1x = use ED toggle carry */
51#define TD_STATUS_T_SHIFT (24)
52#define TD_STATUS_EC_MASK (0x3) /* error count */
53#define TD_STATUS_EC_SHIFT (26)
54#define TD_STATUS_CC_MASK (0xf) /* condition code */
55#define TD_STATUS_CC_SHIFT (28)
56
57 volatile uint32_t cbp; /* current buffer ptr, data to be transfered */
58 volatile uint32_t next;
59#define TD_NEXT_PTR_MASK (0xfffffff0)
60#define TD_NEXT_PTR_SHIFT (0)
61
62 volatile uint32_t be; /* buffer end, address of the last byte */
63} __attribute__((packed)) td_t;
64#endif
65/**
66 * @}
67 */
68
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