source: mainline/uspace/drv/nic/e1k/e1k.c@ 2ff150e

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 2ff150e was 2ff150e, checked in by Jiri Svoboda <jiri@…>, 14 years ago

Correct handling of IP protocol field.
  • Property mode set to 100644
File size: 55.3 KB
Line 
1/*
2 * Copyright (c) 2011 Zdenek Bouska
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @file e1k.c
30 *
31 * Driver for Intel Pro/1000 8254x Family of Gigabit Ethernet Controllers
32 *
33 */
34
35#include <assert.h>
36#include <stdio.h>
37#include <errno.h>
38#include <adt/list.h>
39#include <align.h>
40#include <byteorder.h>
41#include <sysinfo.h>
42#include <ipc/irc.h>
43#include <ipc/ns.h>
44#include <libarch/ddi.h>
45#include <as.h>
46#include <ddf/log.h>
47#include <ddf/interrupt.h>
48#include <devman.h>
49#include <device/hw_res_parsed.h>
50#include <device/pci.h>
51#include <nic.h>
52#include <ops/nic.h>
53#include "e1k.h"
54
55#define NAME "e1k"
56
57#define E1000_DEFAULT_INTERRUPT_INTERVAL_USEC 250
58
59/* Must be power of 8 */
60#define E1000_RX_FRAME_COUNT 128
61#define E1000_TX_FRAME_COUNT 128
62
63#define E1000_RECEIVE_ADDRESS 16
64
65/** Maximum sending frame size */
66#define E1000_MAX_SEND_FRAME_SIZE 2048
67/** Maximum receiving frame size */
68#define E1000_MAX_RECEIVE_FRAME_SIZE 2048
69
70/** nic_driver_data_t* -> e1000_t* cast */
71#define DRIVER_DATA_NIC(nic) \
72 ((e1000_t *) nic_get_specific(nic))
73
74/** device_t* -> nic_driver_data_t* cast */
75#define NIC_DATA_DEV(dev) \
76 ((nic_t *) ((dev)->driver_data))
77
78/** device_t* -> e1000_t* cast */
79#define DRIVER_DATA_DEV(dev) \
80 (DRIVER_DATA_NIC(NIC_DATA_DEV(dev)))
81
82/** Cast pointer to uint64_t
83 *
84 * @param ptr Pointer to cast
85 *
86 * @return The uint64_t pointer representation.
87 *
88 */
89#define PTR_TO_U64(ptr) ((uint64_t) ((uintptr_t) (ptr)))
90
91/** Cast the memaddr part to the void*
92 *
93 * @param memaddr The memaddr value
94 *
95 */
96#define MEMADDR_TO_PTR(memaddr) ((void *) ((size_t) (memaddr)))
97
98#define E1000_REG_BASE(e1000) \
99 ((e1000)->reg_base_virt)
100
101#define E1000_REG_ADDR(e1000, reg) \
102 ((uint32_t *) (E1000_REG_BASE(e1000) + reg))
103
104#define E1000_REG_READ(e1000, reg) \
105 (pio_read_32(E1000_REG_ADDR(e1000, reg)))
106
107#define E1000_REG_WRITE(e1000, reg, value) \
108 (pio_write_32(E1000_REG_ADDR(e1000, reg), value))
109
110/** E1000 device data */
111typedef struct {
112 /** Device configuration */
113 e1000_info_t info;
114
115 /** Physical registers base address */
116 void *reg_base_phys;
117 /** Virtual registers base address */
118 void *reg_base_virt;
119
120 /** Physical tx ring address */
121 void *tx_ring_phys;
122 /** Virtual tx ring address */
123 void *tx_ring_virt;
124
125 /** Ring of TX frames, physical address */
126 void **tx_frame_phys;
127 /** Ring of TX frames, virtual address */
128 void **tx_frame_virt;
129
130 /** Physical rx ring address */
131 void *rx_ring_phys;
132 /** Virtual rx ring address */
133 void *rx_ring_virt;
134
135 /** Ring of RX frames, physical address */
136 void **rx_frame_phys;
137 /** Ring of RX frames, virtual address */
138 void **rx_frame_virt;
139
140 /** VLAN tag */
141 uint16_t vlan_tag;
142
143 /** Add VLAN tag to frame */
144 bool vlan_tag_add;
145
146 /** Used unicast Receive Address count */
147 unsigned int unicast_ra_count;
148
149 /** Used milticast Receive addrress count */
150 unsigned int multicast_ra_count;
151
152 /** The irq assigned */
153 int irq;
154
155 /** Lock for CTRL register */
156 fibril_mutex_t ctrl_lock;
157
158 /** Lock for receiver */
159 fibril_mutex_t rx_lock;
160
161 /** Lock for transmitter */
162 fibril_mutex_t tx_lock;
163
164 /** Lock for EEPROM access */
165 fibril_mutex_t eeprom_lock;
166} e1000_t;
167
168/** Global mutex for work with shared irq structure */
169FIBRIL_MUTEX_INITIALIZE(irq_reg_mutex);
170
171static int e1000_get_address(e1000_t *, nic_address_t *);
172static void e1000_eeprom_get_address(e1000_t *, nic_address_t *);
173static int e1000_set_addr(ddf_fun_t *, const nic_address_t *);
174
175static int e1000_defective_get_mode(ddf_fun_t *, uint32_t *);
176static int e1000_defective_set_mode(ddf_fun_t *, uint32_t);
177
178static int e1000_get_cable_state(ddf_fun_t *, nic_cable_state_t *);
179static int e1000_get_device_info(ddf_fun_t *, nic_device_info_t *);
180static int e1000_get_operation_mode(ddf_fun_t *, int *,
181 nic_channel_mode_t *, nic_role_t *);
182static int e1000_set_operation_mode(ddf_fun_t *, int,
183 nic_channel_mode_t, nic_role_t);
184static int e1000_autoneg_enable(ddf_fun_t *, uint32_t);
185static int e1000_autoneg_disable(ddf_fun_t *);
186static int e1000_autoneg_restart(ddf_fun_t *);
187
188static int e1000_vlan_set_tag(ddf_fun_t *, uint16_t, bool, bool);
189
190/** Network interface options for E1000 card driver */
191static nic_iface_t e1000_nic_iface;
192
193/** Network interface options for E1000 card driver */
194static nic_iface_t e1000_nic_iface = {
195 .set_address = &e1000_set_addr,
196 .get_device_info = &e1000_get_device_info,
197 .get_cable_state = &e1000_get_cable_state,
198 .get_operation_mode = &e1000_get_operation_mode,
199 .set_operation_mode = &e1000_set_operation_mode,
200 .autoneg_enable = &e1000_autoneg_enable,
201 .autoneg_disable = &e1000_autoneg_disable,
202 .autoneg_restart = &e1000_autoneg_restart,
203 .vlan_set_tag = &e1000_vlan_set_tag,
204 .defective_get_mode = &e1000_defective_get_mode,
205 .defective_set_mode = &e1000_defective_set_mode,
206};
207
208/** Basic device operations for E1000 driver */
209static ddf_dev_ops_t e1000_dev_ops;
210
211static int e1000_dev_add(ddf_dev_t *);
212
213/** Basic driver operations for E1000 driver */
214static driver_ops_t e1000_driver_ops = {
215 .dev_add = e1000_dev_add
216};
217
218/** Driver structure for E1000 driver */
219static driver_t e1000_driver = {
220 .name = NAME,
221 .driver_ops = &e1000_driver_ops
222};
223
224/* The default implementation callbacks */
225static int e1000_on_activating(nic_t *);
226static int e1000_on_stopping(nic_t *);
227static void e1000_send_frame(nic_t *, void *, size_t);
228
229/** Commands to deal with interrupt
230 *
231 */
232irq_cmd_t e1000_irq_commands[] = {
233 {
234 /* Get the interrupt status */
235 .cmd = CMD_PIO_READ_32,
236 .addr = NULL,
237 .dstarg = 2
238 },
239 {
240 .cmd = CMD_PREDICATE,
241 .value = 2,
242 .srcarg = 2
243 },
244 {
245 /* Disable interrupts until interrupt routine is finished */
246 .cmd = CMD_PIO_WRITE_32,
247 .addr = NULL,
248 .value = 0xffffffff
249 },
250 {
251 .cmd = CMD_ACCEPT
252 }
253};
254
255/** Interrupt code definition */
256irq_code_t e1000_irq_code = {
257 .cmdcount = sizeof(e1000_irq_commands) / sizeof(irq_cmd_t),
258 .cmds = e1000_irq_commands
259};
260
261/** Get the device information
262 *
263 * @param dev NIC device
264 * @param info Information to fill
265 *
266 * @return EOK
267 *
268 */
269static int e1000_get_device_info(ddf_fun_t *dev, nic_device_info_t *info)
270{
271 assert(dev);
272 assert(info);
273
274 bzero(info, sizeof(nic_device_info_t));
275
276 info->vendor_id = 0x8086;
277 str_cpy(info->vendor_name, NIC_VENDOR_MAX_LENGTH,
278 "Intel Corporation");
279 str_cpy(info->model_name, NIC_MODEL_MAX_LENGTH,
280 "Intel Pro");
281
282 info->ethernet_support[ETH_10M] = ETH_10BASE_T;
283 info->ethernet_support[ETH_100M] = ETH_100BASE_TX;
284 info->ethernet_support[ETH_1000M] = ETH_1000BASE_T;
285
286 return EOK;
287}
288
289/** Check the cable state
290 *
291 * @param[in] dev device
292 * @param[out] state state to fill
293 *
294 * @return EOK
295 *
296 */
297static int e1000_get_cable_state(ddf_fun_t *dev, nic_cable_state_t *state)
298{
299 assert(dev);
300 assert(DRIVER_DATA_DEV(dev));
301 assert(state);
302
303 e1000_t *e1000 = DRIVER_DATA_DEV(dev);
304 if (E1000_REG_READ(e1000, E1000_STATUS) & (STATUS_LU))
305 *state = NIC_CS_PLUGGED;
306 else
307 *state = NIC_CS_UNPLUGGED;
308
309 return EOK;
310}
311
312static uint16_t e1000_calculate_itr_interval_from_usecs(suseconds_t useconds)
313{
314 return useconds * 4;
315}
316
317/** Get operation mode of the device
318 *
319 */
320static int e1000_get_operation_mode(ddf_fun_t *dev, int *speed,
321 nic_channel_mode_t *duplex, nic_role_t *role)
322{
323 e1000_t *e1000 = DRIVER_DATA_DEV(dev);
324 uint32_t status = E1000_REG_READ(e1000, E1000_STATUS);
325
326 if (status & STATUS_FD)
327 *duplex = NIC_CM_FULL_DUPLEX;
328 else
329 *duplex = NIC_CM_HALF_DUPLEX;
330
331 uint32_t speed_bits =
332 (status >> STATUS_SPEED_SHIFT) & STATUS_SPEED_ALL;
333
334 if (speed_bits == STATUS_SPEED_10)
335 *speed = 10;
336 else if (speed_bits == STATUS_SPEED_100)
337 *speed = 100;
338 else if ((speed_bits == STATUS_SPEED_1000A) ||
339 (speed_bits == STATUS_SPEED_1000B))
340 *speed = 1000;
341
342 *role = NIC_ROLE_UNKNOWN;
343 return EOK;
344}
345
346static void e1000_link_restart(e1000_t *e1000)
347{
348 fibril_mutex_lock(&e1000->ctrl_lock);
349
350 uint32_t ctrl = E1000_REG_READ(e1000, E1000_CTRL);
351
352 if (ctrl & CTRL_SLU) {
353 ctrl &= ~(CTRL_SLU);
354 fibril_mutex_unlock(&e1000->ctrl_lock);
355 usleep(10);
356 fibril_mutex_lock(&e1000->ctrl_lock);
357 ctrl |= CTRL_SLU;
358 }
359
360 fibril_mutex_unlock(&e1000->ctrl_lock);
361
362 e1000_link_restart(e1000);
363}
364
365/** Set operation mode of the device
366 *
367 */
368static int e1000_set_operation_mode(ddf_fun_t *dev, int speed,
369 nic_channel_mode_t duplex, nic_role_t role)
370{
371 if ((speed != 10) && (speed != 100) && (speed != 1000))
372 return EINVAL;
373
374 if ((duplex != NIC_CM_HALF_DUPLEX) && (duplex != NIC_CM_FULL_DUPLEX))
375 return EINVAL;
376
377 e1000_t *e1000 = DRIVER_DATA_DEV(dev);
378
379 fibril_mutex_lock(&e1000->ctrl_lock);
380 uint32_t ctrl = E1000_REG_READ(e1000, E1000_CTRL);
381
382 ctrl |= CTRL_FRCSPD;
383 ctrl |= CTRL_FRCDPLX;
384 ctrl &= ~(CTRL_ASDE);
385
386 if (duplex == NIC_CM_FULL_DUPLEX)
387 ctrl |= CTRL_FD;
388 else
389 ctrl &= ~(CTRL_FD);
390
391 ctrl &= ~(CTRL_SPEED_MASK);
392 if (speed == 1000)
393 ctrl |= CTRL_SPEED_1000 << CTRL_SPEED_SHIFT;
394 else if (speed == 100)
395 ctrl |= CTRL_SPEED_100 << CTRL_SPEED_SHIFT;
396 else
397 ctrl |= CTRL_SPEED_10 << CTRL_SPEED_SHIFT;
398
399 E1000_REG_WRITE(e1000, E1000_CTRL, ctrl);
400
401 fibril_mutex_unlock(&e1000->ctrl_lock);
402
403 e1000_link_restart(e1000);
404
405 return EOK;
406}
407
408/** Enable auto-negotiation
409 *
410 * @param dev Device to update
411 * @param advertisement Ignored on E1000
412 *
413 * @return EOK if advertisement mode set successfully
414 *
415 */
416static int e1000_autoneg_enable(ddf_fun_t *dev, uint32_t advertisement)
417{
418 e1000_t *e1000 = DRIVER_DATA_DEV(dev);
419
420 fibril_mutex_lock(&e1000->ctrl_lock);
421
422 uint32_t ctrl = E1000_REG_READ(e1000, E1000_CTRL);
423
424 ctrl &= ~(CTRL_FRCSPD);
425 ctrl &= ~(CTRL_FRCDPLX);
426 ctrl |= CTRL_ASDE;
427
428 E1000_REG_WRITE(e1000, E1000_CTRL, ctrl);
429
430 fibril_mutex_unlock(&e1000->ctrl_lock);
431
432 e1000_link_restart(e1000);
433
434 return EOK;
435}
436
437/** Disable auto-negotiation
438 *
439 * @param dev Device to update
440 *
441 * @return EOK
442 *
443 */
444static int e1000_autoneg_disable(ddf_fun_t *dev)
445{
446 e1000_t *e1000 = DRIVER_DATA_DEV(dev);
447
448 fibril_mutex_lock(&e1000->ctrl_lock);
449
450 uint32_t ctrl = E1000_REG_READ(e1000, E1000_CTRL);
451
452 ctrl |= CTRL_FRCSPD;
453 ctrl |= CTRL_FRCDPLX;
454 ctrl &= ~(CTRL_ASDE);
455
456 E1000_REG_WRITE(e1000, E1000_CTRL, ctrl);
457
458 fibril_mutex_unlock(&e1000->ctrl_lock);
459
460 e1000_link_restart(e1000);
461
462 return EOK;
463}
464
465/** Restart auto-negotiation
466 *
467 * @param dev Device to update
468 *
469 * @return EOK if advertisement mode set successfully
470 *
471 */
472static int e1000_autoneg_restart(ddf_fun_t *dev)
473{
474 return e1000_autoneg_enable(dev, 0);
475}
476
477/** Get state of acceptance of weird frames
478 *
479 * @param device Device to check
480 * @param[out] mode Current mode
481 *
482 */
483static int e1000_defective_get_mode(ddf_fun_t *device, uint32_t *mode)
484{
485 e1000_t *e1000 = DRIVER_DATA_DEV(device);
486
487 *mode = 0;
488 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
489 if (rctl & RCTL_SBP)
490 *mode = NIC_DEFECTIVE_BAD_CRC | NIC_DEFECTIVE_SHORT;
491
492 return EOK;
493};
494
495/** Set acceptance of weird frames
496 *
497 * @param device Device to update
498 * @param mode Mode to set
499 *
500 * @return ENOTSUP if the mode is not supported
501 * @return EOK of mode was set
502 *
503 */
504static int e1000_defective_set_mode(ddf_fun_t *device, uint32_t mode)
505{
506 e1000_t *e1000 = DRIVER_DATA_DEV(device);
507 int rc = EOK;
508
509 fibril_mutex_lock(&e1000->rx_lock);
510
511 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
512 bool short_mode = (mode & NIC_DEFECTIVE_SHORT ? true : false);
513 bool bad_mode = (mode & NIC_DEFECTIVE_BAD_CRC ? true : false);
514
515 if (short_mode && bad_mode)
516 rctl |= RCTL_SBP;
517 else if ((!short_mode) && (!bad_mode))
518 rctl &= ~RCTL_SBP;
519 else
520 rc = ENOTSUP;
521
522 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
523
524 fibril_mutex_unlock(&e1000->rx_lock);
525 return rc;
526};
527
528/** Write receive address to RA registr
529 *
530 * @param e1000 E1000 data structure
531 * @param position RA register position
532 * @param address Ethernet address
533 * @param set_av_bit Set the Addtess Valid bit
534 *
535 */
536static void e1000_write_receive_address(e1000_t *e1000, unsigned int position,
537 const nic_address_t * address, bool set_av_bit)
538{
539 uint8_t *mac0 = (uint8_t *) address->address;
540 uint8_t *mac1 = (uint8_t *) address->address + 1;
541 uint8_t *mac2 = (uint8_t *) address->address + 2;
542 uint8_t *mac3 = (uint8_t *) address->address + 3;
543 uint8_t *mac4 = (uint8_t *) address->address + 4;
544 uint8_t *mac5 = (uint8_t *) address->address + 5;
545
546 uint32_t rah;
547 uint32_t ral;
548
549 ral = ((*mac3) << 24) | ((*mac2) << 16) | ((*mac1) << 8) | (*mac0);
550 rah = ((*mac5) << 8) | ((*mac4));
551
552 if (set_av_bit)
553 rah |= RAH_AV;
554 else
555 rah |= E1000_REG_READ(e1000, E1000_RAH_ARRAY(position)) & RAH_AV;
556
557 E1000_REG_WRITE(e1000, E1000_RAH_ARRAY(position), rah);
558 E1000_REG_WRITE(e1000, E1000_RAL_ARRAY(position), ral);
559}
560
561/** Disable receive address in RA registr
562 *
563 * Clear Address Valid bit
564 *
565 * @param e1000 E1000 data structure
566 * @param position RA register position
567 *
568 */
569static void e1000_disable_receive_address(e1000_t *e1000, unsigned int position)
570{
571 uint32_t rah = E1000_REG_READ(e1000, E1000_RAH_ARRAY(position));
572 rah = rah & ~RAH_AV;
573 E1000_REG_WRITE(e1000, E1000_RAH_ARRAY(position), rah);
574}
575
576/** Clear all unicast addresses from RA registers
577 *
578 * @param e1000 E1000 data structure
579 *
580 */
581static void e1000_clear_unicast_receive_addresses(e1000_t *e1000)
582{
583 for (unsigned int ra_num = 1;
584 ra_num <= e1000->unicast_ra_count;
585 ra_num++)
586 e1000_disable_receive_address(e1000, ra_num);
587
588 e1000->unicast_ra_count = 0;
589}
590
591/** Clear all multicast addresses from RA registers
592 *
593 * @param e1000 E1000 data structure
594 *
595 */
596static void e1000_clear_multicast_receive_addresses(e1000_t *e1000)
597{
598 unsigned int first_multicast_ra_num =
599 E1000_RECEIVE_ADDRESS - e1000->multicast_ra_count;
600
601 for (unsigned int ra_num = E1000_RECEIVE_ADDRESS - 1;
602 ra_num >= first_multicast_ra_num;
603 ra_num--)
604 e1000_disable_receive_address(e1000, ra_num);
605
606 e1000->multicast_ra_count = 0;
607}
608
609/** Return receive address filter positions count usable for unicast
610 *
611 * @param e1000 E1000 data structure
612 *
613 * @return receive address filter positions count usable for unicast
614 *
615 */
616static unsigned int get_free_unicast_address_count(e1000_t *e1000)
617{
618 return E1000_RECEIVE_ADDRESS - 1 - e1000->multicast_ra_count;
619}
620
621/** Return receive address filter positions count usable for multicast
622 *
623 * @param e1000 E1000 data structure
624 *
625 * @return receive address filter positions count usable for multicast
626 *
627 */
628static unsigned int get_free_multicast_address_count(e1000_t *e1000)
629{
630 return E1000_RECEIVE_ADDRESS - 1 - e1000->unicast_ra_count;
631}
632
633/** Write unicast receive addresses to receive address filter registers
634 *
635 * @param e1000 E1000 data structure
636 * @param addr Pointer to address array
637 * @param addr_cnt Address array count
638 *
639 */
640static void e1000_add_unicast_receive_addresses(e1000_t *e1000,
641 const nic_address_t *addr, size_t addr_cnt)
642{
643 assert(addr_cnt <= get_free_unicast_address_count(e1000));
644
645 nic_address_t *addr_iterator = (nic_address_t *) addr;
646
647 /* ra_num = 0 is primary address */
648 for (unsigned int ra_num = 1;
649 ra_num <= addr_cnt;
650 ra_num++) {
651 e1000_write_receive_address(e1000, ra_num, addr_iterator, true);
652 addr_iterator++;
653 }
654}
655
656/** Write multicast receive addresses to receive address filter registers
657 *
658 * @param e1000 E1000 data structure
659 * @param addr Pointer to address array
660 * @param addr_cnt Address array count
661 *
662 */
663static void e1000_add_multicast_receive_addresses(e1000_t *e1000,
664 const nic_address_t *addr, size_t addr_cnt)
665{
666 assert(addr_cnt <= get_free_multicast_address_count(e1000));
667
668 nic_address_t *addr_iterator = (nic_address_t *) addr;
669
670 unsigned int first_multicast_ra_num = E1000_RECEIVE_ADDRESS - addr_cnt;
671 for (unsigned int ra_num = E1000_RECEIVE_ADDRESS - 1;
672 ra_num >= first_multicast_ra_num;
673 ra_num--) {
674 e1000_write_receive_address(e1000, ra_num, addr_iterator, true);
675 addr_iterator++;
676 }
677}
678
679/** Disable receiving frames for default address
680 *
681 * @param e1000 E1000 data structure
682 *
683 */
684static void disable_ra0_address_filter(e1000_t *e1000)
685{
686 uint32_t rah0 = E1000_REG_READ(e1000, E1000_RAH_ARRAY(0));
687 rah0 = rah0 & ~RAH_AV;
688 E1000_REG_WRITE(e1000, E1000_RAH_ARRAY(0), rah0);
689}
690
691/** Enable receiving frames for default address
692 *
693 * @param e1000 E1000 data structure
694 *
695 */
696static void enable_ra0_address_filter(e1000_t *e1000)
697{
698 uint32_t rah0 = E1000_REG_READ(e1000, E1000_RAH_ARRAY(0));
699 rah0 = rah0 | RAH_AV;
700 E1000_REG_WRITE(e1000, E1000_RAH_ARRAY(0), rah0);
701}
702
703/** Disable unicast promiscuous mode
704 *
705 * @param e1000 E1000 data structure
706 *
707 */
708static void e1000_disable_unicast_promisc(e1000_t *e1000)
709{
710 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
711 rctl = rctl & ~RCTL_UPE;
712 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
713}
714
715/** Enable unicast promiscuous mode
716 *
717 * @param e1000 E1000 data structure
718 *
719 */
720static void e1000_enable_unicast_promisc(e1000_t *e1000)
721{
722 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
723 rctl = rctl | RCTL_UPE;
724 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
725}
726
727/** Disable multicast promiscuous mode
728 *
729 * @param e1000 E1000 data structure
730 *
731 */
732static void e1000_disable_multicast_promisc(e1000_t *e1000)
733{
734 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
735 rctl = rctl & ~RCTL_MPE;
736 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
737}
738
739/** Enable multicast promiscuous mode
740 *
741 * @param e1000 E1000 data structure
742 *
743 */
744static void e1000_enable_multicast_promisc(e1000_t *e1000)
745{
746 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
747 rctl = rctl | RCTL_MPE;
748 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
749}
750
751/** Enable accepting of broadcast frames
752 *
753 * @param e1000 E1000 data structure
754 *
755 */
756static void e1000_enable_broadcast_accept(e1000_t *e1000)
757{
758 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
759 rctl = rctl | RCTL_BAM;
760 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
761}
762
763/** Disable accepting of broadcast frames
764 *
765 * @param e1000 E1000 data structure
766 *
767 */
768static void e1000_disable_broadcast_accept(e1000_t *e1000)
769{
770 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
771 rctl = rctl & ~RCTL_BAM;
772 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
773}
774
775/** Enable VLAN filtering according to VFTA registers
776 *
777 * @param e1000 E1000 data structure
778 *
779 */
780static void e1000_enable_vlan_filter(e1000_t *e1000)
781{
782 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
783 rctl = rctl | RCTL_VFE;
784 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
785}
786
787/** Disable VLAN filtering
788 *
789 * @param e1000 E1000 data structure
790 *
791 */
792static void e1000_disable_vlan_filter(e1000_t *e1000)
793{
794 uint32_t rctl = E1000_REG_READ(e1000, E1000_RCTL);
795 rctl = rctl & ~RCTL_VFE;
796 E1000_REG_WRITE(e1000, E1000_RCTL, rctl);
797}
798
799/** Set multicast frames acceptance mode
800 *
801 * @param nic NIC device to update
802 * @param mode Mode to set
803 * @param addr Address list (used in mode = NIC_MULTICAST_LIST)
804 * @param addr_cnt Length of address list (used in mode = NIC_MULTICAST_LIST)
805 *
806 * @return EOK
807 *
808 */
809static int e1000_on_multicast_mode_change(nic_t *nic, nic_multicast_mode_t mode,
810 const nic_address_t *addr, size_t addr_cnt)
811{
812 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
813 int rc = EOK;
814
815 fibril_mutex_lock(&e1000->rx_lock);
816
817 switch (mode) {
818 case NIC_MULTICAST_BLOCKED:
819 e1000_clear_multicast_receive_addresses(e1000);
820 e1000_disable_multicast_promisc(e1000);
821 nic_report_hw_filtering(nic, -1, 1, -1);
822 break;
823 case NIC_MULTICAST_LIST:
824 e1000_clear_multicast_receive_addresses(e1000);
825 if (addr_cnt > get_free_multicast_address_count(e1000)) {
826 /*
827 * Future work: fill MTA table
828 * Not strictly neccessary, it only saves some compares
829 * in the NIC library.
830 */
831 e1000_enable_multicast_promisc(e1000);
832 nic_report_hw_filtering(nic, -1, 0, -1);
833 } else {
834 e1000_disable_multicast_promisc(e1000);
835 e1000_add_multicast_receive_addresses(e1000, addr, addr_cnt);
836 nic_report_hw_filtering(nic, -1, 1, -1);
837 }
838 break;
839 case NIC_MULTICAST_PROMISC:
840 e1000_enable_multicast_promisc(e1000);
841 e1000_clear_multicast_receive_addresses(e1000);
842 nic_report_hw_filtering(nic, -1, 1, -1);
843 break;
844 default:
845 rc = ENOTSUP;
846 break;
847 }
848
849 fibril_mutex_unlock(&e1000->rx_lock);
850 return rc;
851}
852
853/** Set unicast frames acceptance mode
854 *
855 * @param nic NIC device to update
856 * @param mode Mode to set
857 * @param addr Address list (used in mode = NIC_MULTICAST_LIST)
858 * @param addr_cnt Length of address list (used in mode = NIC_MULTICAST_LIST)
859 *
860 * @return EOK
861 *
862 */
863static int e1000_on_unicast_mode_change(nic_t *nic, nic_unicast_mode_t mode,
864 const nic_address_t *addr, size_t addr_cnt)
865{
866 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
867 int rc = EOK;
868
869 fibril_mutex_lock(&e1000->rx_lock);
870
871 switch (mode) {
872 case NIC_UNICAST_BLOCKED:
873 disable_ra0_address_filter(e1000);
874 e1000_clear_unicast_receive_addresses(e1000);
875 e1000_disable_unicast_promisc(e1000);
876 nic_report_hw_filtering(nic, 1, -1, -1);
877 break;
878 case NIC_UNICAST_DEFAULT:
879 enable_ra0_address_filter(e1000);
880 e1000_clear_unicast_receive_addresses(e1000);
881 e1000_disable_unicast_promisc(e1000);
882 nic_report_hw_filtering(nic, 1, -1, -1);
883 break;
884 case NIC_UNICAST_LIST:
885 enable_ra0_address_filter(e1000);
886 e1000_clear_unicast_receive_addresses(e1000);
887 if (addr_cnt > get_free_unicast_address_count(e1000)) {
888 e1000_enable_unicast_promisc(e1000);
889 nic_report_hw_filtering(nic, 0, -1, -1);
890 } else {
891 e1000_disable_unicast_promisc(e1000);
892 e1000_add_unicast_receive_addresses(e1000, addr, addr_cnt);
893 nic_report_hw_filtering(nic, 1, -1, -1);
894 }
895 break;
896 case NIC_UNICAST_PROMISC:
897 e1000_enable_unicast_promisc(e1000);
898 enable_ra0_address_filter(e1000);
899 e1000_clear_unicast_receive_addresses(e1000);
900 nic_report_hw_filtering(nic, 1, -1, -1);
901 break;
902 default:
903 rc = ENOTSUP;
904 break;
905 }
906
907 fibril_mutex_unlock(&e1000->rx_lock);
908 return rc;
909}
910
911/** Set broadcast frames acceptance mode
912 *
913 * @param nic NIC device to update
914 * @param mode Mode to set
915 *
916 * @return EOK
917 *
918 */
919static int e1000_on_broadcast_mode_change(nic_t *nic, nic_broadcast_mode_t mode)
920{
921 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
922 int rc = EOK;
923
924 fibril_mutex_lock(&e1000->rx_lock);
925
926 switch (mode) {
927 case NIC_BROADCAST_BLOCKED:
928 e1000_disable_broadcast_accept(e1000);
929 break;
930 case NIC_BROADCAST_ACCEPTED:
931 e1000_enable_broadcast_accept(e1000);
932 break;
933 default:
934 rc = ENOTSUP;
935 break;
936 }
937
938 fibril_mutex_unlock(&e1000->rx_lock);
939 return rc;
940}
941
942/** Check if receiving is enabled
943 *
944 * @param e1000 E1000 data structure
945 *
946 * @return true if receiving is enabled
947 *
948 */
949static bool e1000_is_rx_enabled(e1000_t *e1000)
950{
951 if (E1000_REG_READ(e1000, E1000_RCTL) & (RCTL_EN))
952 return true;
953
954 return false;
955}
956
957/** Enable receiving
958 *
959 * @param e1000 E1000 data structure
960 *
961 */
962static void e1000_enable_rx(e1000_t *e1000)
963{
964 /* Set Receive Enable Bit */
965 E1000_REG_WRITE(e1000, E1000_RCTL,
966 E1000_REG_READ(e1000, E1000_RCTL) | (RCTL_EN));
967}
968
969/** Disable receiving
970 *
971 * @param e1000 E1000 data structure
972 *
973 */
974static void e1000_disable_rx(e1000_t *e1000)
975{
976 /* Clear Receive Enable Bit */
977 E1000_REG_WRITE(e1000, E1000_RCTL,
978 E1000_REG_READ(e1000, E1000_RCTL) & ~(RCTL_EN));
979}
980
981/** Set VLAN mask
982 *
983 * @param nic NIC device to update
984 * @param vlan_mask VLAN mask
985 *
986 */
987static void e1000_on_vlan_mask_change(nic_t *nic,
988 const nic_vlan_mask_t *vlan_mask)
989{
990 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
991
992 fibril_mutex_lock(&e1000->rx_lock);
993
994 if (vlan_mask) {
995 /*
996 * Disable receiving, so that frame matching
997 * partially written VLAN is not received.
998 */
999 bool rx_enabled = e1000_is_rx_enabled(e1000);
1000 if (rx_enabled)
1001 e1000_disable_rx(e1000);
1002
1003 for (unsigned int i = 0; i < NIC_VLAN_BITMAP_SIZE; i += 4) {
1004 uint32_t bitmap_part =
1005 ((uint32_t) vlan_mask->bitmap[i]) |
1006 (((uint32_t) vlan_mask->bitmap[i + 1]) << 8) |
1007 (((uint32_t) vlan_mask->bitmap[i + 2]) << 16) |
1008 (((uint32_t) vlan_mask->bitmap[i + 3]) << 24);
1009 E1000_REG_WRITE(e1000, E1000_VFTA_ARRAY(i / 4), bitmap_part);
1010 }
1011
1012 e1000_enable_vlan_filter(e1000);
1013 if (rx_enabled)
1014 e1000_enable_rx(e1000);
1015 } else
1016 e1000_disable_vlan_filter(e1000);
1017
1018 fibril_mutex_unlock(&e1000->rx_lock);
1019}
1020
1021/** Set VLAN mask
1022 *
1023 * @param device E1000 device
1024 * @param tag VLAN tag
1025 *
1026 * @return EOK
1027 * @return ENOTSUP
1028 *
1029 */
1030static int e1000_vlan_set_tag(ddf_fun_t *device, uint16_t tag, bool add,
1031 bool strip)
1032{
1033 /* VLAN CFI bit cannot be set */
1034 if (tag & VLANTAG_CFI)
1035 return ENOTSUP;
1036
1037 /*
1038 * CTRL.VME is neccessary for both strip and add
1039 * but CTRL.VME means stripping tags on receive.
1040 */
1041 if (!strip && add)
1042 return ENOTSUP;
1043
1044 e1000_t *e1000 = DRIVER_DATA_DEV(device);
1045
1046 e1000->vlan_tag = tag;
1047 e1000->vlan_tag_add = add;
1048
1049 fibril_mutex_lock(&e1000->ctrl_lock);
1050
1051 uint32_t ctrl = E1000_REG_READ(e1000, E1000_CTRL);
1052 if (strip)
1053 ctrl |= CTRL_VME;
1054 else
1055 ctrl &= ~CTRL_VME;
1056
1057 E1000_REG_WRITE(e1000, E1000_CTRL, ctrl);
1058
1059 fibril_mutex_unlock(&e1000->ctrl_lock);
1060 return EOK;
1061}
1062
1063/** Fill receive descriptor with new empty buffer
1064 *
1065 * Store frame in e1000->rx_frame_phys
1066 *
1067 * @param nic NIC data stricture
1068 * @param offset Receive descriptor offset
1069 *
1070 */
1071static void e1000_fill_new_rx_descriptor(nic_t *nic, size_t offset)
1072{
1073 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1074
1075 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *)
1076 (e1000->rx_ring_virt + offset * sizeof(e1000_rx_descriptor_t));
1077
1078 rx_descriptor->phys_addr = PTR_TO_U64(e1000->rx_frame_phys[offset]);
1079 rx_descriptor->length = 0;
1080 rx_descriptor->checksum = 0;
1081 rx_descriptor->status = 0;
1082 rx_descriptor->errors = 0;
1083 rx_descriptor->special = 0;
1084}
1085
1086/** Clear receive descriptor
1087 *
1088 * @param e1000 E1000 data
1089 * @param offset Receive descriptor offset
1090 *
1091 */
1092static void e1000_clear_rx_descriptor(e1000_t *e1000, unsigned int offset)
1093{
1094 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *)
1095 (e1000->rx_ring_virt + offset * sizeof(e1000_rx_descriptor_t));
1096
1097 rx_descriptor->length = 0;
1098 rx_descriptor->checksum = 0;
1099 rx_descriptor->status = 0;
1100 rx_descriptor->errors = 0;
1101 rx_descriptor->special = 0;
1102}
1103
1104/** Clear receive descriptor
1105 *
1106 * @param nic NIC data
1107 * @param offset Receive descriptor offset
1108 *
1109 */
1110static void e1000_clear_tx_descriptor(nic_t *nic, unsigned int offset)
1111{
1112 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1113
1114 e1000_tx_descriptor_t *tx_descriptor = (e1000_tx_descriptor_t *)
1115 (e1000->tx_ring_virt + offset * sizeof(e1000_tx_descriptor_t));
1116
1117 tx_descriptor->phys_addr = 0;
1118 tx_descriptor->length = 0;
1119 tx_descriptor->checksum_offset = 0;
1120 tx_descriptor->command = 0;
1121 tx_descriptor->status = 0;
1122 tx_descriptor->checksum_start_field = 0;
1123 tx_descriptor->special = 0;
1124}
1125
1126/** Increment tail pointer for receive or transmit ring
1127 *
1128 * @param tail Old Tail
1129 * @param descriptors_count Ring length
1130 *
1131 * @return New tail
1132 *
1133 */
1134static uint32_t e1000_inc_tail(uint32_t tail, uint32_t descriptors_count)
1135{
1136 if (tail + 1 == descriptors_count)
1137 return 0;
1138 else
1139 return tail + 1;
1140}
1141
1142/** Receive frames
1143 *
1144 * @param nic NIC data
1145 *
1146 */
1147static void e1000_receive_frames(nic_t *nic)
1148{
1149 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1150
1151 fibril_mutex_lock(&e1000->rx_lock);
1152
1153 uint32_t *tail_addr = E1000_REG_ADDR(e1000, E1000_RDT);
1154 uint32_t next_tail = e1000_inc_tail(*tail_addr, E1000_RX_FRAME_COUNT);
1155
1156 e1000_rx_descriptor_t *rx_descriptor = (e1000_rx_descriptor_t *)
1157 (e1000->rx_ring_virt + next_tail * sizeof(e1000_rx_descriptor_t));
1158
1159 while (rx_descriptor->status & 0x01) {
1160 uint32_t frame_size = rx_descriptor->length - E1000_CRC_SIZE;
1161
1162 nic_frame_t *frame = nic_alloc_frame(nic, frame_size);
1163 if (frame != NULL) {
1164 memcpy(frame->data, e1000->rx_frame_virt[next_tail], frame_size);
1165 nic_received_frame(nic, frame);
1166 } else {
1167 ddf_msg(LVL_ERROR, "Memory allocation failed. Frame dropped.");
1168 }
1169
1170 e1000_fill_new_rx_descriptor(nic, next_tail);
1171
1172 *tail_addr = e1000_inc_tail(*tail_addr, E1000_RX_FRAME_COUNT);
1173 next_tail = e1000_inc_tail(*tail_addr, E1000_RX_FRAME_COUNT);
1174
1175 rx_descriptor = (e1000_rx_descriptor_t *)
1176 (e1000->rx_ring_virt + next_tail * sizeof(e1000_rx_descriptor_t));
1177 }
1178
1179 fibril_mutex_unlock(&e1000->rx_lock);
1180}
1181
1182/** Enable E1000 interupts
1183 *
1184 * @param e1000 E1000 data structure
1185 *
1186 */
1187static void e1000_enable_interrupts(e1000_t *e1000)
1188{
1189 E1000_REG_WRITE(e1000, E1000_IMS, ICR_RXT0);
1190}
1191
1192/** Disable E1000 interupts
1193 *
1194 * @param e1000 E1000 data structure
1195 *
1196 */
1197static void e1000_disable_interrupts(e1000_t *e1000)
1198{
1199 E1000_REG_WRITE(e1000, E1000_IMS, 0);
1200}
1201
1202/** Interrupt handler implementation
1203 *
1204 * This function is called from e1000_interrupt_handler()
1205 * and e1000_poll()
1206 *
1207 * @param nic NIC data
1208 * @param icr ICR register value
1209 *
1210 */
1211static void e1000_interrupt_handler_impl(nic_t *nic, uint32_t icr)
1212{
1213 if (icr & ICR_RXT0)
1214 e1000_receive_frames(nic);
1215}
1216
1217/** Handle device interrupt
1218 *
1219 * @param dev E1000 device
1220 * @param iid IPC call id
1221 * @param icall IPC call structure
1222 *
1223 */
1224static void e1000_interrupt_handler(ddf_dev_t *dev, ipc_callid_t iid,
1225 ipc_call_t *icall)
1226{
1227 uint32_t icr = (uint32_t) IPC_GET_ARG2(*icall);
1228 nic_t *nic = NIC_DATA_DEV(dev);
1229 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1230
1231 e1000_interrupt_handler_impl(nic, icr);
1232 e1000_enable_interrupts(e1000);
1233}
1234
1235/** Register interrupt handler for the card in the system
1236 *
1237 * Note: The global irq_reg_mutex is locked because of work with global
1238 * structure.
1239 *
1240 * @param nic Driver data
1241 *
1242 * @return EOK if the handler was registered
1243 * @return Negative error code otherwise
1244 *
1245 */
1246inline static int e1000_register_int_handler(nic_t *nic)
1247{
1248 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1249
1250 /* Lock the mutex in whole driver while working with global structure */
1251 fibril_mutex_lock(&irq_reg_mutex);
1252
1253 e1000_irq_code.cmds[0].addr = e1000->reg_base_virt + E1000_ICR;
1254 e1000_irq_code.cmds[2].addr = e1000->reg_base_virt + E1000_IMC;
1255
1256 int rc = register_interrupt_handler(nic_get_ddf_dev(nic),
1257 e1000->irq, e1000_interrupt_handler, &e1000_irq_code);
1258
1259 fibril_mutex_unlock(&irq_reg_mutex);
1260 return rc;
1261}
1262
1263/** Force receiving all frames in the receive buffer
1264 *
1265 * @param nic NIC data
1266 *
1267 */
1268static void e1000_poll(nic_t *nic)
1269{
1270 assert(nic);
1271
1272 e1000_t *e1000 = nic_get_specific(nic);
1273 assert(e1000);
1274
1275 uint32_t icr = E1000_REG_READ(e1000, E1000_ICR);
1276 e1000_interrupt_handler_impl(nic, icr);
1277}
1278
1279/** Calculates ITR register interrupt from timeval structure
1280 *
1281 * @param period Period
1282 *
1283 */
1284static uint16_t e1000_calculate_itr_interval(const struct timeval *period)
1285{
1286 // TODO: use also tv_sec
1287 return e1000_calculate_itr_interval_from_usecs(period->tv_usec);
1288}
1289
1290/** Set polling mode
1291 *
1292 * @param device Device to set
1293 * @param mode Mode to set
1294 * @param period Period for NIC_POLL_PERIODIC
1295 *
1296 * @return EOK if succeed
1297 * @return ENOTSUP if the mode is not supported
1298 *
1299 */
1300static int e1000_poll_mode_change(nic_t *nic, nic_poll_mode_t mode,
1301 const struct timeval *period)
1302{
1303 assert(nic);
1304
1305 e1000_t *e1000 = nic_get_specific(nic);
1306 assert(e1000);
1307
1308 switch (mode) {
1309 case NIC_POLL_IMMEDIATE:
1310 E1000_REG_WRITE(e1000, E1000_ITR, 0);
1311 e1000_enable_interrupts(e1000);
1312 break;
1313 case NIC_POLL_ON_DEMAND:
1314 e1000_disable_interrupts(e1000);
1315 break;
1316 case NIC_POLL_PERIODIC:
1317 assert(period);
1318 uint16_t itr_interval = e1000_calculate_itr_interval(period);
1319 E1000_REG_WRITE(e1000, E1000_ITR, (uint32_t) itr_interval);
1320 e1000_enable_interrupts(e1000);
1321 break;
1322 default:
1323 return ENOTSUP;
1324 }
1325
1326 return EOK;
1327}
1328
1329/** Initialize receive registers
1330 *
1331 * @param e1000 E1000 data structure
1332 *
1333 */
1334static void e1000_initialize_rx_registers(e1000_t *e1000)
1335{
1336 E1000_REG_WRITE(e1000, E1000_RDLEN, E1000_RX_FRAME_COUNT * 16);
1337 E1000_REG_WRITE(e1000, E1000_RDH, 0);
1338
1339 /* It is not posible to let HW use all descriptors */
1340 E1000_REG_WRITE(e1000, E1000_RDT, E1000_RX_FRAME_COUNT - 1);
1341
1342 /* Set Broadcast Enable Bit */
1343 E1000_REG_WRITE(e1000, E1000_RCTL, RCTL_BAM);
1344}
1345
1346/** Initialize receive structure
1347 *
1348 * @param nic NIC data
1349 *
1350 * @return EOK if succeed
1351 * @return Negative error code otherwise
1352 *
1353 */
1354static int e1000_initialize_rx_structure(nic_t *nic)
1355{
1356 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1357 fibril_mutex_lock(&e1000->rx_lock);
1358
1359 int rc = dmamem_map_anonymous(
1360 E1000_RX_FRAME_COUNT * sizeof(e1000_rx_descriptor_t),
1361 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->rx_ring_phys,
1362 &e1000->rx_ring_virt);
1363 if (rc != EOK)
1364 return rc;
1365
1366 E1000_REG_WRITE(e1000, E1000_RDBAH,
1367 (uint32_t) (PTR_TO_U64(e1000->rx_ring_phys) >> 32));
1368 E1000_REG_WRITE(e1000, E1000_RDBAL,
1369 (uint32_t) PTR_TO_U64(e1000->rx_ring_phys));
1370
1371 e1000->rx_frame_phys =
1372 calloc(E1000_RX_FRAME_COUNT, sizeof(void *));
1373 e1000->rx_frame_virt =
1374 calloc(E1000_RX_FRAME_COUNT, sizeof(void *));
1375 if (e1000->rx_frame_phys == NULL || e1000->rx_frame_virt == NULL) {
1376 rc = ENOMEM;
1377 goto error;
1378 }
1379
1380 size_t i;
1381 void *frame_virt;
1382 void *frame_phys;
1383
1384 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) {
1385 rc = dmamem_map_anonymous(
1386 E1000_MAX_SEND_FRAME_SIZE, AS_AREA_READ | AS_AREA_WRITE,
1387 0, &frame_phys, &frame_virt);
1388 if (rc != EOK)
1389 goto error;
1390
1391 e1000->rx_frame_virt[i] = frame_virt;
1392 e1000->rx_frame_phys[i] = frame_phys;
1393 }
1394
1395 /* Write descriptor */
1396 for (i = 0; i < E1000_RX_FRAME_COUNT; i++)
1397 e1000_fill_new_rx_descriptor(nic, i);
1398
1399 e1000_initialize_rx_registers(e1000);
1400
1401 fibril_mutex_unlock(&e1000->rx_lock);
1402 return EOK;
1403
1404error:
1405 for (i = 0; i < E1000_RX_FRAME_COUNT; i++) {
1406 if (e1000->rx_frame_virt[i] != NULL) {
1407 dmamem_unmap_anonymous(e1000->rx_frame_virt[i]);
1408 e1000->rx_frame_virt[i] = NULL;
1409 e1000->rx_frame_phys[i] = NULL;
1410 }
1411 }
1412
1413 if (e1000->rx_frame_phys != NULL) {
1414 free(e1000->rx_frame_phys);
1415 e1000->rx_frame_phys = NULL;
1416 }
1417
1418 if (e1000->rx_frame_virt != NULL) {
1419 free(e1000->rx_frame_virt);
1420 e1000->rx_frame_phys = NULL;
1421 }
1422
1423 return rc;
1424}
1425
1426/** Uninitialize receive structure
1427 *
1428 * @param nic NIC data
1429 *
1430 */
1431static void e1000_uninitialize_rx_structure(nic_t *nic)
1432{
1433 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1434
1435 /* Write descriptor */
1436 for (unsigned int offset = 0; offset < E1000_RX_FRAME_COUNT; offset++) {
1437 dmamem_unmap_anonymous(e1000->rx_frame_virt[offset]);
1438 e1000->rx_frame_virt[offset] = NULL;
1439 e1000->rx_frame_phys[offset] = NULL;
1440 }
1441
1442 free(e1000->rx_frame_virt);
1443 free(e1000->rx_frame_phys);
1444 e1000->rx_frame_virt = NULL;
1445 e1000->rx_frame_phys = NULL;
1446 dmamem_unmap_anonymous(e1000->rx_ring_virt);
1447}
1448
1449/** Clear receive descriptor ring
1450 *
1451 * @param e1000 E1000 data
1452 *
1453 */
1454static void e1000_clear_rx_ring(e1000_t *e1000)
1455{
1456 /* Write descriptor */
1457 for (unsigned int offset = 0;
1458 offset < E1000_RX_FRAME_COUNT;
1459 offset++)
1460 e1000_clear_rx_descriptor(e1000, offset);
1461}
1462
1463/** Initialize filters
1464 *
1465 * @param e1000 E1000 data
1466 *
1467 */
1468static void e1000_initialize_filters(e1000_t *e1000)
1469{
1470 /* Initialize address filter */
1471 e1000->unicast_ra_count = 0;
1472 e1000->multicast_ra_count = 0;
1473 e1000_clear_unicast_receive_addresses(e1000);
1474}
1475
1476/** Initialize VLAN
1477 *
1478 * @param e1000 E1000 data
1479 *
1480 */
1481static void e1000_initialize_vlan(e1000_t *e1000)
1482{
1483 e1000->vlan_tag_add = false;
1484}
1485
1486/** Fill MAC address from EEPROM to RA[0] register
1487 *
1488 * @param e1000 E1000 data
1489 *
1490 */
1491static void e1000_fill_mac_from_eeprom(e1000_t *e1000)
1492{
1493 /* MAC address from eeprom to RA[0] */
1494 nic_address_t address;
1495 e1000_eeprom_get_address(e1000, &address);
1496 e1000_write_receive_address(e1000, 0, &address, true);
1497}
1498
1499/** Initialize other registers
1500 *
1501 * @param dev E1000 data.
1502 *
1503 * @return EOK if succeed
1504 * @return Negative error code otherwise
1505 *
1506 */
1507static void e1000_initialize_registers(e1000_t *e1000)
1508{
1509 E1000_REG_WRITE(e1000, E1000_ITR,
1510 e1000_calculate_itr_interval_from_usecs(
1511 E1000_DEFAULT_INTERRUPT_INTERVAL_USEC));
1512 E1000_REG_WRITE(e1000, E1000_FCAH, 0);
1513 E1000_REG_WRITE(e1000, E1000_FCAL, 0);
1514 E1000_REG_WRITE(e1000, E1000_FCT, 0);
1515 E1000_REG_WRITE(e1000, E1000_FCTTV, 0);
1516 E1000_REG_WRITE(e1000, E1000_VET, VET_VALUE);
1517 E1000_REG_WRITE(e1000, E1000_CTRL, CTRL_ASDE);
1518}
1519
1520/** Initialize transmit registers
1521 *
1522 * @param e1000 E1000 data.
1523 *
1524 */
1525static void e1000_initialize_tx_registers(e1000_t *e1000)
1526{
1527 E1000_REG_WRITE(e1000, E1000_TDLEN, E1000_TX_FRAME_COUNT * 16);
1528 E1000_REG_WRITE(e1000, E1000_TDH, 0);
1529 E1000_REG_WRITE(e1000, E1000_TDT, 0);
1530
1531 E1000_REG_WRITE(e1000, E1000_TIPG,
1532 10 << TIPG_IPGT_SHIFT |
1533 8 << TIPG_IPGR1_SHIFT |
1534 6 << TIPG_IPGR2_SHIFT);
1535
1536 E1000_REG_WRITE(e1000, E1000_TCTL,
1537 0x0F << TCTL_CT_SHIFT /* Collision Threshold */ |
1538 0x40 << TCTL_COLD_SHIFT /* Collision Distance */ |
1539 TCTL_PSP /* Pad Short Packets */);
1540}
1541
1542/** Initialize transmit structure
1543 *
1544 * @param e1000 E1000 data.
1545 *
1546 */
1547static int e1000_initialize_tx_structure(e1000_t *e1000)
1548{
1549 size_t i;
1550
1551 fibril_mutex_lock(&e1000->tx_lock);
1552
1553 e1000->tx_ring_phys = NULL;
1554 e1000->tx_ring_virt = NULL;
1555 e1000->tx_frame_phys = NULL;
1556 e1000->tx_frame_virt = NULL;
1557
1558 int rc = dmamem_map_anonymous(
1559 E1000_TX_FRAME_COUNT * sizeof(e1000_tx_descriptor_t),
1560 AS_AREA_READ | AS_AREA_WRITE, 0, &e1000->tx_ring_phys,
1561 &e1000->tx_ring_virt);
1562 if (rc != EOK)
1563 goto error;
1564
1565 bzero(e1000->tx_ring_virt,
1566 E1000_TX_FRAME_COUNT * sizeof(e1000_tx_descriptor_t));
1567
1568 e1000->tx_frame_phys = calloc(E1000_TX_FRAME_COUNT, sizeof(void *));
1569 e1000->tx_frame_virt = calloc(E1000_TX_FRAME_COUNT, sizeof(void *));
1570
1571 if (e1000->tx_frame_phys == NULL || e1000->tx_frame_virt == NULL) {
1572 rc = ENOMEM;
1573 goto error;
1574 }
1575
1576 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) {
1577 rc = dmamem_map_anonymous(
1578 E1000_MAX_SEND_FRAME_SIZE, AS_AREA_READ | AS_AREA_WRITE,
1579 0, &e1000->tx_frame_phys[i], &e1000->tx_frame_virt[i]);
1580 if (rc != EOK)
1581 goto error;
1582 }
1583
1584 E1000_REG_WRITE(e1000, E1000_TDBAH,
1585 (uint32_t) (PTR_TO_U64(e1000->tx_ring_phys) >> 32));
1586 E1000_REG_WRITE(e1000, E1000_TDBAL,
1587 (uint32_t) PTR_TO_U64(e1000->tx_ring_phys));
1588
1589 e1000_initialize_tx_registers(e1000);
1590
1591 fibril_mutex_unlock(&e1000->tx_lock);
1592 return EOK;
1593
1594error:
1595 if (e1000->tx_ring_virt != NULL) {
1596 dmamem_unmap_anonymous(e1000->tx_ring_virt);
1597 e1000->tx_ring_virt = NULL;
1598 }
1599
1600 if (e1000->tx_frame_phys != NULL && e1000->tx_frame_virt != NULL) {
1601 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) {
1602 if (e1000->tx_frame_virt[i] != NULL) {
1603 dmamem_unmap_anonymous(e1000->tx_frame_virt[i]);
1604 e1000->tx_frame_virt[i] = NULL;
1605 e1000->tx_frame_phys[i] = NULL;
1606 }
1607 }
1608 }
1609
1610 if (e1000->tx_frame_phys != NULL) {
1611 free(e1000->tx_frame_phys);
1612 e1000->tx_frame_phys = NULL;
1613 }
1614
1615 if (e1000->tx_frame_virt != NULL) {
1616 free(e1000->tx_frame_virt);
1617 e1000->tx_frame_phys = NULL;
1618 }
1619
1620 return rc;
1621}
1622
1623/** Uninitialize transmit structure
1624 *
1625 * @param nic NIC data
1626 *
1627 */
1628static void e1000_uninitialize_tx_structure(e1000_t *e1000)
1629{
1630 size_t i;
1631
1632 for (i = 0; i < E1000_TX_FRAME_COUNT; i++) {
1633 dmamem_unmap_anonymous(e1000->tx_frame_virt[i]);
1634 e1000->tx_frame_virt[i] = NULL;
1635 e1000->tx_frame_phys[i] = NULL;
1636 }
1637
1638 if (e1000->tx_frame_phys != NULL) {
1639 free(e1000->tx_frame_phys);
1640 e1000->tx_frame_phys = NULL;
1641 }
1642
1643 if (e1000->tx_frame_virt != NULL) {
1644 free(e1000->tx_frame_virt);
1645 e1000->tx_frame_phys = NULL;
1646 }
1647
1648 dmamem_unmap_anonymous(e1000->tx_ring_virt);
1649}
1650
1651/** Clear transmit descriptor ring
1652 *
1653 * @param nic NIC data
1654 *
1655 */
1656static void e1000_clear_tx_ring(nic_t *nic)
1657{
1658 /* Write descriptor */
1659 for (unsigned int offset = 0;
1660 offset < E1000_TX_FRAME_COUNT;
1661 offset++)
1662 e1000_clear_tx_descriptor(nic, offset);
1663}
1664
1665/** Enable transmit
1666 *
1667 * @param e1000 E1000 data
1668 *
1669 */
1670static void e1000_enable_tx(e1000_t *e1000)
1671{
1672 /* Set Transmit Enable Bit */
1673 E1000_REG_WRITE(e1000, E1000_TCTL,
1674 E1000_REG_READ(e1000, E1000_TCTL) | (TCTL_EN));
1675}
1676
1677/** Disable transmit
1678 *
1679 * @param e1000 E1000 data
1680 *
1681 */
1682static void e1000_disable_tx(e1000_t *e1000)
1683{
1684 /* Clear Transmit Enable Bit */
1685 E1000_REG_WRITE(e1000, E1000_TCTL,
1686 E1000_REG_READ(e1000, E1000_TCTL) & ~(TCTL_EN));
1687}
1688
1689/** Reset E1000 device
1690 *
1691 * @param e1000 The E1000 data
1692 *
1693 */
1694static int e1000_reset(nic_t *nic)
1695{
1696 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1697
1698 E1000_REG_WRITE(e1000, E1000_CTRL, CTRL_RST);
1699
1700 /* Wait for the reset */
1701 usleep(20);
1702
1703 /* check if RST_BIT cleared */
1704 if (E1000_REG_READ(e1000, E1000_CTRL) & (CTRL_RST))
1705 return EINVAL;
1706
1707 e1000_initialize_registers(e1000);
1708 e1000_initialize_rx_registers(e1000);
1709 e1000_initialize_tx_registers(e1000);
1710 e1000_fill_mac_from_eeprom(e1000);
1711 e1000_initialize_filters(e1000);
1712 e1000_initialize_vlan(e1000);
1713
1714 return EOK;
1715}
1716
1717/** Activate the device to receive and transmit frames
1718 *
1719 * @param nic NIC driver data
1720 *
1721 * @return EOK if activated successfully
1722 * @return Error code otherwise
1723 *
1724 */
1725static int e1000_on_activating(nic_t *nic)
1726{
1727 assert(nic);
1728
1729 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1730
1731 fibril_mutex_lock(&e1000->rx_lock);
1732 fibril_mutex_lock(&e1000->tx_lock);
1733 fibril_mutex_lock(&e1000->ctrl_lock);
1734
1735 e1000_enable_interrupts(e1000);
1736
1737 nic_enable_interrupt(nic, e1000->irq);
1738
1739 e1000_clear_rx_ring(e1000);
1740 e1000_enable_rx(e1000);
1741
1742 e1000_clear_tx_ring(nic);
1743 e1000_enable_tx(e1000);
1744
1745 uint32_t ctrl = E1000_REG_READ(e1000, E1000_CTRL);
1746 ctrl |= CTRL_SLU;
1747 E1000_REG_WRITE(e1000, E1000_CTRL, ctrl);
1748
1749 fibril_mutex_unlock(&e1000->ctrl_lock);
1750 fibril_mutex_unlock(&e1000->tx_lock);
1751 fibril_mutex_unlock(&e1000->rx_lock);
1752
1753 return EOK;
1754}
1755
1756/** Callback for NIC_STATE_DOWN change
1757 *
1758 * @param nic NIC driver data
1759 *
1760 * @return EOK if succeed
1761 * @return Error code otherwise
1762 *
1763 */
1764static int e1000_on_down_unlocked(nic_t *nic)
1765{
1766 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1767
1768 uint32_t ctrl = E1000_REG_READ(e1000, E1000_CTRL);
1769 ctrl &= ~CTRL_SLU;
1770 E1000_REG_WRITE(e1000, E1000_CTRL, ctrl);
1771
1772 e1000_disable_tx(e1000);
1773 e1000_disable_rx(e1000);
1774
1775 nic_disable_interrupt(nic, e1000->irq);
1776 e1000_disable_interrupts(e1000);
1777
1778 /*
1779 * Wait for the for the end of all data
1780 * transfers to descriptors.
1781 */
1782 usleep(100);
1783
1784 return EOK;
1785}
1786
1787/** Callback for NIC_STATE_DOWN change
1788 *
1789 * @param nic NIC driver data
1790 *
1791 * @return EOK if succeed
1792 * @return Error code otherwise
1793 *
1794 */
1795static int e1000_on_down(nic_t *nic)
1796{
1797 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1798
1799 fibril_mutex_lock(&e1000->rx_lock);
1800 fibril_mutex_lock(&e1000->tx_lock);
1801 fibril_mutex_lock(&e1000->ctrl_lock);
1802
1803 int rc = e1000_on_down_unlocked(nic);
1804
1805 fibril_mutex_unlock(&e1000->ctrl_lock);
1806 fibril_mutex_unlock(&e1000->tx_lock);
1807 fibril_mutex_unlock(&e1000->rx_lock);
1808
1809 return rc;
1810}
1811
1812/** Callback for NIC_STATE_STOPPED change
1813 *
1814 * @param nic NIC driver data
1815 *
1816 * @return EOK if succeed
1817 * @return Error code otherwise
1818 *
1819 */
1820static int e1000_on_stopping(nic_t *nic)
1821{
1822 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
1823
1824 fibril_mutex_lock(&e1000->rx_lock);
1825 fibril_mutex_lock(&e1000->tx_lock);
1826 fibril_mutex_lock(&e1000->ctrl_lock);
1827
1828 int rc = e1000_on_down_unlocked(nic);
1829 if (rc == EOK)
1830 rc = e1000_reset(nic);
1831
1832 fibril_mutex_unlock(&e1000->ctrl_lock);
1833 fibril_mutex_unlock(&e1000->tx_lock);
1834 fibril_mutex_unlock(&e1000->rx_lock);
1835
1836 return rc;
1837}
1838
1839/** Create driver data structure
1840 *
1841 * @return Intialized device data structure or NULL
1842 *
1843 */
1844static e1000_t *e1000_create_dev_data(ddf_dev_t *dev)
1845{
1846 assert(dev);
1847 assert(!dev->driver_data);
1848
1849 nic_t *nic = nic_create_and_bind(dev);
1850 if (!nic)
1851 return NULL;
1852
1853 e1000_t *e1000 = malloc(sizeof(e1000_t));
1854 if (!e1000) {
1855 nic_unbind_and_destroy(dev);
1856 return NULL;
1857 }
1858
1859 bzero(e1000, sizeof(e1000_t));
1860
1861 nic_set_specific(nic, e1000);
1862 nic_set_send_frame_handler(nic, e1000_send_frame);
1863 nic_set_state_change_handlers(nic, e1000_on_activating,
1864 e1000_on_down, e1000_on_stopping);
1865 nic_set_filtering_change_handlers(nic,
1866 e1000_on_unicast_mode_change, e1000_on_multicast_mode_change,
1867 e1000_on_broadcast_mode_change, NULL, e1000_on_vlan_mask_change);
1868 nic_set_poll_handlers(nic, e1000_poll_mode_change, e1000_poll);
1869
1870 fibril_mutex_initialize(&e1000->ctrl_lock);
1871 fibril_mutex_initialize(&e1000->rx_lock);
1872 fibril_mutex_initialize(&e1000->tx_lock);
1873 fibril_mutex_initialize(&e1000->eeprom_lock);
1874
1875 return e1000;
1876}
1877
1878/** Delete driver data structure
1879 *
1880 * @param data E1000 device data structure
1881 *
1882 */
1883inline static void e1000_delete_dev_data(ddf_dev_t *dev)
1884{
1885 assert(dev);
1886
1887 if (dev->driver_data != NULL)
1888 nic_unbind_and_destroy(dev);
1889}
1890
1891/** Clean up the E1000 device structure.
1892 *
1893 * @param dev Device structure.
1894 *
1895 */
1896static void e1000_dev_cleanup(ddf_dev_t *dev)
1897{
1898 assert(dev);
1899
1900 e1000_delete_dev_data(dev);
1901
1902 if (dev->parent_sess != NULL) {
1903 async_hangup(dev->parent_sess);
1904 dev->parent_sess = NULL;
1905 }
1906}
1907
1908/** Fill the irq and io_addr part of device data structure
1909 *
1910 * The hw_resources must be obtained before calling this function
1911 *
1912 * @param dev Device structure
1913 * @param hw_resources Hardware resources obtained from the parent device
1914 *
1915 * @return EOK if succeed
1916 * @return Negative error code otherwise
1917 *
1918 */
1919static int e1000_fill_resource_info(ddf_dev_t *dev,
1920 const hw_res_list_parsed_t *hw_resources)
1921{
1922 assert(dev != NULL);
1923 assert(hw_resources != NULL);
1924 assert(dev->driver_data != NULL);
1925
1926 e1000_t *e1000 = DRIVER_DATA_DEV(dev);
1927
1928 if (hw_resources->irqs.count != 1)
1929 return EINVAL;
1930
1931 e1000->irq = hw_resources->irqs.irqs[0];
1932 e1000->reg_base_phys =
1933 MEMADDR_TO_PTR(hw_resources->mem_ranges.ranges[0].address);
1934
1935 return EOK;
1936}
1937
1938/** Obtain information about hardware resources of the device
1939 *
1940 * The device must be connected to the parent
1941 *
1942 * @param dev Device structure
1943 *
1944 * @return EOK if succeed
1945 * @return Negative error code otherwise
1946 *
1947 */
1948static int e1000_get_resource_info(ddf_dev_t *dev)
1949{
1950 assert(dev != NULL);
1951 assert(NIC_DATA_DEV(dev) != NULL);
1952
1953 hw_res_list_parsed_t hw_res_parsed;
1954 hw_res_list_parsed_init(&hw_res_parsed);
1955
1956 /* Get hw resources form parent driver */
1957 int rc = nic_get_resources(NIC_DATA_DEV(dev), &hw_res_parsed);
1958 if (rc != EOK)
1959 return rc;
1960
1961 /* Fill resources information to the device */
1962 rc = e1000_fill_resource_info(dev, &hw_res_parsed);
1963 hw_res_list_parsed_clean(&hw_res_parsed);
1964
1965 return rc;
1966}
1967
1968/** Initialize the E1000 device structure
1969 *
1970 * @param dev Device information
1971 *
1972 * @return EOK if succeed
1973 * @return Negative error code otherwise
1974 *
1975 */
1976static int e1000_device_initialize(ddf_dev_t *dev)
1977{
1978 /* Allocate driver data for the device. */
1979 e1000_t *e1000 = e1000_create_dev_data(dev);
1980 if (e1000 == NULL) {
1981 ddf_msg(LVL_ERROR, "Unable to allocate device softstate");
1982 return ENOMEM;
1983 }
1984
1985 /* Obtain and fill hardware resources info */
1986 int rc = e1000_get_resource_info(dev);
1987 if (rc != EOK) {
1988 ddf_msg(LVL_ERROR, "Cannot obtain hardware resources");
1989 e1000_dev_cleanup(dev);
1990 return rc;
1991 }
1992
1993 uint16_t device_id;
1994 rc = pci_config_space_read_16(dev->parent_sess, PCI_DEVICE_ID,
1995 &device_id);
1996 if (rc != EOK) {
1997 ddf_msg(LVL_ERROR, "Cannot access PCI configuration space");
1998 e1000_dev_cleanup(dev);
1999 return rc;
2000 }
2001
2002 e1000_board_t board;
2003 switch (device_id) {
2004 case 0x100e:
2005 case 0x1015:
2006 case 0x1016:
2007 case 0x1017:
2008 board = E1000_82540;
2009 break;
2010 case 0x1013:
2011 case 0x1018:
2012 case 0x1078:
2013 board = E1000_82541;
2014 break;
2015 case 0x1076:
2016 case 0x1077:
2017 case 0x107c:
2018 board = E1000_82541REV2;
2019 break;
2020 case 0x100f:
2021 case 0x1011:
2022 case 0x1026:
2023 case 0x1027:
2024 case 0x1028:
2025 board = E1000_82545;
2026 break;
2027 case 0x1010:
2028 case 0x1012:
2029 case 0x101d:
2030 case 0x1079:
2031 case 0x107a:
2032 case 0x107b:
2033 board = E1000_82546;
2034 break;
2035 case 0x1019:
2036 case 0x101a:
2037 board = E1000_82547;
2038 break;
2039 case 0x10b9:
2040 board = E1000_82572;
2041 break;
2042 case 0x1096:
2043 board = E1000_80003ES2;
2044 break;
2045 default:
2046 ddf_msg(LVL_ERROR, "Device not supported (%#" PRIx16 ")",
2047 device_id);
2048 e1000_dev_cleanup(dev);
2049 return ENOTSUP;
2050 }
2051
2052 switch (board) {
2053 case E1000_82540:
2054 case E1000_82541:
2055 case E1000_82541REV2:
2056 case E1000_82545:
2057 case E1000_82546:
2058 e1000->info.eerd_start = 0x01;
2059 e1000->info.eerd_done = 0x10;
2060 e1000->info.eerd_address_offset = 8;
2061 e1000->info.eerd_data_offset = 16;
2062 break;
2063 case E1000_82547:
2064 case E1000_82572:
2065 case E1000_80003ES2:
2066 e1000->info.eerd_start = 0x01;
2067 e1000->info.eerd_done = 0x02;
2068 e1000->info.eerd_address_offset = 2;
2069 e1000->info.eerd_data_offset = 16;
2070 break;
2071 }
2072
2073 return EOK;
2074}
2075
2076/** Enable the I/O ports of the device.
2077 *
2078 * @param dev E1000 device.
2079 *
2080 * @return EOK if successed
2081 * @return Negative error code otherwise
2082 *
2083 */
2084static int e1000_pio_enable(ddf_dev_t *dev)
2085{
2086 e1000_t *e1000 = DRIVER_DATA_DEV(dev);
2087
2088 int rc = pio_enable(e1000->reg_base_phys, 8 * PAGE_SIZE,
2089 &e1000->reg_base_virt);
2090 if (rc != EOK)
2091 return EADDRNOTAVAIL;
2092
2093 return EOK;
2094}
2095
2096/** Probe and initialize the newly added device.
2097 *
2098 * @param dev E1000 device.
2099 *
2100 */
2101int e1000_dev_add(ddf_dev_t *dev)
2102{
2103 ddf_fun_t *fun;
2104 assert(dev);
2105
2106 /* Initialize device structure for E1000 */
2107 int rc = e1000_device_initialize(dev);
2108 if (rc != EOK)
2109 return rc;
2110
2111 /* Device initialization */
2112 nic_t *nic = dev->driver_data;
2113 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
2114
2115 /* Map registers */
2116 rc = e1000_pio_enable(dev);
2117 if (rc != EOK)
2118 goto err_destroy;
2119
2120 e1000_initialize_registers(e1000);
2121 rc = e1000_initialize_tx_structure(e1000);
2122 if (rc != EOK)
2123 goto err_pio;
2124
2125 fibril_mutex_lock(&e1000->rx_lock);
2126
2127 e1000_fill_mac_from_eeprom(e1000);
2128 e1000_initialize_filters(e1000);
2129
2130 fibril_mutex_unlock(&e1000->rx_lock);
2131
2132 e1000_initialize_vlan(e1000);
2133
2134 fun = ddf_fun_create(nic_get_ddf_dev(nic), fun_exposed, "port0");
2135 if (fun == NULL)
2136 goto err_tx_structure;
2137 nic_set_ddf_fun(nic, fun);
2138 fun->ops = &e1000_dev_ops;
2139 fun->driver_data = nic;
2140
2141 rc = e1000_register_int_handler(nic);
2142 if (rc != EOK)
2143 goto err_fun_create;
2144
2145 rc = nic_connect_to_services(nic);
2146 if (rc != EOK)
2147 goto err_irq;
2148
2149 rc = e1000_initialize_rx_structure(nic);
2150 if (rc != EOK)
2151 goto err_irq;
2152
2153 nic_address_t e1000_address;
2154 e1000_get_address(e1000, &e1000_address);
2155 rc = nic_report_address(nic, &e1000_address);
2156 if (rc != EOK)
2157 goto err_rx_structure;
2158
2159 struct timeval period;
2160 period.tv_sec = 0;
2161 period.tv_usec = E1000_DEFAULT_INTERRUPT_INTERVAL_USEC;
2162 rc = nic_report_poll_mode(nic, NIC_POLL_PERIODIC, &period);
2163 if (rc != EOK)
2164 goto err_rx_structure;
2165
2166 rc = ddf_fun_bind(fun);
2167 if (rc != EOK)
2168 goto err_fun_bind;
2169
2170 rc = ddf_fun_add_to_category(fun, DEVICE_CATEGORY_NIC);
2171 if (rc != EOK)
2172 goto err_add_to_cat;
2173
2174 return EOK;
2175
2176err_add_to_cat:
2177 ddf_fun_unbind(fun);
2178err_fun_bind:
2179err_rx_structure:
2180 e1000_uninitialize_rx_structure(nic);
2181err_irq:
2182 unregister_interrupt_handler(dev, DRIVER_DATA_DEV(dev)->irq);
2183err_fun_create:
2184 ddf_fun_destroy(fun);
2185 nic_set_ddf_fun(nic, NULL);
2186err_tx_structure:
2187 e1000_uninitialize_tx_structure(e1000);
2188err_pio:
2189 // TODO: e1000_pio_disable(dev);
2190err_destroy:
2191 e1000_dev_cleanup(dev);
2192 return rc;
2193}
2194
2195/** Read 16-bit value from EEPROM of E1000 adapter
2196 *
2197 * Read using the EERD register.
2198 *
2199 * @param device E1000 device
2200 * @param eeprom_address 8-bit EEPROM address
2201 *
2202 * @return 16-bit value from EEPROM
2203 *
2204 */
2205static uint16_t e1000_eeprom_read(e1000_t *e1000, uint8_t eeprom_address)
2206{
2207 fibril_mutex_lock(&e1000->eeprom_lock);
2208
2209 /* Write address and START bit to EERD register */
2210 uint32_t write_data = e1000->info.eerd_start |
2211 (((uint32_t) eeprom_address) <<
2212 e1000->info.eerd_address_offset);
2213 E1000_REG_WRITE(e1000, E1000_EERD, write_data);
2214
2215 uint32_t eerd = E1000_REG_READ(e1000, E1000_EERD);
2216 while ((eerd & e1000->info.eerd_done) == 0) {
2217 usleep(1);
2218 eerd = E1000_REG_READ(e1000, E1000_EERD);
2219 }
2220
2221 fibril_mutex_unlock(&e1000->eeprom_lock);
2222
2223 return (uint16_t) (eerd >> e1000->info.eerd_data_offset);
2224}
2225
2226/** Get MAC address of the E1000 adapter
2227 *
2228 * @param device E1000 device
2229 * @param address Place to store the address
2230 * @param max_len Maximal addresss length to store
2231 *
2232 * @return EOK if succeed
2233 * @return Negative error code otherwise
2234 *
2235 */
2236static int e1000_get_address(e1000_t *e1000, nic_address_t *address)
2237{
2238 fibril_mutex_lock(&e1000->rx_lock);
2239
2240 uint8_t *mac0_dest = (uint8_t *) address->address;
2241 uint8_t *mac1_dest = (uint8_t *) address->address + 1;
2242 uint8_t *mac2_dest = (uint8_t *) address->address + 2;
2243 uint8_t *mac3_dest = (uint8_t *) address->address + 3;
2244 uint8_t *mac4_dest = (uint8_t *) address->address + 4;
2245 uint8_t *mac5_dest = (uint8_t *) address->address + 5;
2246
2247 uint32_t rah = E1000_REG_READ(e1000, E1000_RAH_ARRAY(0));
2248 uint32_t ral = E1000_REG_READ(e1000, E1000_RAL_ARRAY(0));
2249
2250 *mac0_dest = (uint8_t) ral;
2251 *mac1_dest = (uint8_t) (ral >> 8);
2252 *mac2_dest = (uint8_t) (ral >> 16);
2253 *mac3_dest = (uint8_t) (ral >> 24);
2254 *mac4_dest = (uint8_t) rah;
2255 *mac5_dest = (uint8_t) (rah >> 8);
2256
2257 fibril_mutex_unlock(&e1000->rx_lock);
2258 return EOK;
2259};
2260
2261/** Set card MAC address
2262 *
2263 * @param device E1000 device
2264 * @param address Address
2265 *
2266 * @return EOK if succeed
2267 * @return Negative error code otherwise
2268 */
2269static int e1000_set_addr(ddf_fun_t *dev, const nic_address_t *addr)
2270{
2271 nic_t *nic = NIC_DATA_DEV(dev);
2272 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
2273
2274 fibril_mutex_lock(&e1000->rx_lock);
2275 fibril_mutex_lock(&e1000->tx_lock);
2276
2277 int rc = nic_report_address(nic, addr);
2278 if (rc == EOK)
2279 e1000_write_receive_address(e1000, 0, addr, false);
2280
2281 fibril_mutex_unlock(&e1000->tx_lock);
2282 fibril_mutex_unlock(&e1000->rx_lock);
2283
2284 return rc;
2285}
2286
2287static void e1000_eeprom_get_address(e1000_t *e1000,
2288 nic_address_t *address)
2289{
2290 uint16_t *mac0_dest = (uint16_t *) address->address;
2291 uint16_t *mac2_dest = (uint16_t *) (address->address + 2);
2292 uint16_t *mac4_dest = (uint16_t *) (address->address + 4);
2293
2294 *mac0_dest = e1000_eeprom_read(e1000, 0);
2295 *mac2_dest = e1000_eeprom_read(e1000, 1);
2296 *mac4_dest = e1000_eeprom_read(e1000, 2);
2297}
2298
2299/** Send frame
2300 *
2301 * @param nic NIC driver data structure
2302 * @param data Frame data
2303 * @param size Frame size in bytes
2304 *
2305 * @return EOK if succeed
2306 * @return Error code in the case of error
2307 *
2308 */
2309static void e1000_send_frame(nic_t *nic, void *data, size_t size)
2310{
2311 assert(nic);
2312
2313 e1000_t *e1000 = DRIVER_DATA_NIC(nic);
2314 fibril_mutex_lock(&e1000->tx_lock);
2315
2316 uint32_t tdt = E1000_REG_READ(e1000, E1000_TDT);
2317 e1000_tx_descriptor_t *tx_descriptor_addr = (e1000_tx_descriptor_t *)
2318 (e1000->tx_ring_virt + tdt * sizeof(e1000_tx_descriptor_t));
2319
2320 bool descriptor_available = false;
2321
2322 /* Descriptor never used */
2323 if (tx_descriptor_addr->length == 0)
2324 descriptor_available = true;
2325
2326 /* Descriptor done */
2327 if (tx_descriptor_addr->status & TXDESCRIPTOR_STATUS_DD)
2328 descriptor_available = true;
2329
2330 if (!descriptor_available) {
2331 /* Frame lost */
2332 fibril_mutex_unlock(&e1000->tx_lock);
2333 return;
2334 }
2335
2336 memcpy(e1000->tx_frame_virt[tdt], data, size);
2337
2338 tx_descriptor_addr->phys_addr = PTR_TO_U64(e1000->tx_frame_phys[tdt]);
2339 tx_descriptor_addr->length = size;
2340
2341 /*
2342 * Report status to STATUS.DD (descriptor done),
2343 * add ethernet CRC, end of packet.
2344 */
2345 tx_descriptor_addr->command = TXDESCRIPTOR_COMMAND_RS |
2346 TXDESCRIPTOR_COMMAND_IFCS |
2347 TXDESCRIPTOR_COMMAND_EOP;
2348
2349 tx_descriptor_addr->checksum_offset = 0;
2350 tx_descriptor_addr->status = 0;
2351 if (e1000->vlan_tag_add) {
2352 tx_descriptor_addr->special = e1000->vlan_tag;
2353 tx_descriptor_addr->command |= TXDESCRIPTOR_COMMAND_VLE;
2354 } else
2355 tx_descriptor_addr->special = 0;
2356
2357 tx_descriptor_addr->checksum_start_field = 0;
2358
2359 tdt++;
2360 if (tdt == E1000_TX_FRAME_COUNT)
2361 tdt = 0;
2362
2363 E1000_REG_WRITE(e1000, E1000_TDT, tdt);
2364
2365 fibril_mutex_unlock(&e1000->tx_lock);
2366}
2367
2368int main(void)
2369{
2370 int rc = nic_driver_init(NAME);
2371 if (rc != EOK)
2372 return rc;
2373
2374 nic_driver_implement(&e1000_driver_ops, &e1000_dev_ops,
2375 &e1000_nic_iface);
2376
2377 ddf_log_init(NAME, LVL_ERROR);
2378 ddf_msg(LVL_NOTE, "HelenOS E1000 driver started");
2379 return ddf_driver_main(&e1000_driver);
2380}
Note: See TracBrowser for help on using the repository browser.