source: mainline/uspace/drv/nic/e1k/e1k.c@ bf84871

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since bf84871 was bf84871, checked in by Martin Decky <martin@…>, 14 years ago

merge Realtek RTL8319 and Intel E1000 drivers from lp:~helenos-nicf/helenos/nicf
(the drivers do not compile and are not part of the build system so far)
  • Property mode set to 100644
File size: 56.7 KB
Line 
1/*
2 * Copyright (c) 2011 Zdenek Bouska
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @file e1000.c
30 *
31 * Driver for Intel Pro/1000 8254x Family of Gigabit Ethernet Controllers
32 */
33
34#include <assert.h>
35#include <stdio.h>
36#include <errno.h>
37#include <adt/list.h>
38#include <nlog.h>
39#include <align.h>
40#include <byteorder.h>
41#include <sysinfo.h>
42#include <ipc/irc.h>
43#include <ipc/ns.h>
44#include <libarch/ddi.h>
45
46#include <as.h>
47#include <dma.h>
48#include <ddf/interrupt.h>
49#include <devman.h>
50#include <device/hw_res_parsed.h>
51#include <device/pci.h>
52#include <nic.h>
53#include <nil_remote.h>
54#include <ops/nic.h>
55#include <packet_client.h>
56#include <packet_remote.h>
57#include <net/packet_header.h>
58
59#include "e1000_defs.h"
60
61/// The driver name
62#define NAME "e1000"
63
64#define E1000_DEFAULT_INTERRUPT_INTEVAL_USEC 250
65
66
67// Must be power of 8
68#define E1000_RX_PACKETS_COUNT 128
69#define E1000_TX_PACKETS_COUNT 128
70
71#define E1000_RECEIVE_ADDRESS 16
72
73/** Maximum receiving packet size */
74#define E1000_MAX_RECEIVE_PACKET_SIZE 2048
75
76/** nic_driver_data_t* -> e1000_t* cast */
77#define DRIVER_DATA_NIC(nic_data) ((e1000_t*) nic_get_specific(nic_data))
78/** device_t* -> nic_driver_data_t* cast */
79#define NIC_DATA_DEV(dev) ((nic_t*)((dev)->driver_data))
80/** device_t* -> e1000_t* cast */
81#define DRIVER_DATA_DEV(dev) (DRIVER_DATA_NIC(NIC_DATA_DEV(dev)))
82
83/** Cast pointer to uint32_t
84 *
85 * @param ptr The pointer to cast
86 * @return The uint32_t pointer representation. The low 32 bit is taken
87 * in the case of the 64 bit pointers
88 */
89#define PTR_TO_U64(ptr) ((uint64_t)((size_t)(ptr)))
90
91/** Cast the memaddr part to the void*
92 *
93 * @param memaddr The memaddr value
94 */
95#define MEMADDR_TO_PTR(memaddr) ((void*)((size_t)(memaddr)))
96
97#define E1000_REG_BASE(e1000_data) (e1000_data->virt_reg_base)
98#define E1000_REG_ADDR(e1000_data, reg) ((uint32_t *)(E1000_REG_BASE(e1000_data) + reg))
99#define E1000_REG_READ(e1000_data, reg) (pio_read_32(E1000_REG_ADDR(e1000_data, reg)))
100#define E1000_REG_WRITE(e1000_data, reg, value) (pio_write_32(E1000_REG_ADDR(e1000_data, reg), value))
101
102
103/** E1000 device data */
104typedef struct e1000_data {
105 /** Physical registers base address */
106 void * phys_reg_base;
107 /** Virtual registers base address */
108 void * virt_reg_base;
109 /** Tx ring */
110 dma_mem_t tx_ring;
111 /** Packets in tx ring */
112 packet_t ** tx_ring_packets;
113 /** Rx ring */
114 dma_mem_t rx_ring;
115 /** Packets in rx ring */
116 packet_t ** rx_ring_packets;
117 /** VLAN tag */
118 uint16_t vlan_tag;
119 /** add VLAN tag to packet */
120 int vlan_tag_add;
121 /** Used unicast Receive Address count */
122 unsigned int unicast_ra_count;
123 /** Used milticast Receive addrress count */
124 unsigned int multicast_ra_count;
125 /** PCI device ID */
126 uint16_t device_id;
127 /** The irq assigned */
128 int irq;
129 /** Lock for CTRL register */
130 fibril_mutex_t ctrl_lock;
131 /** Lock for receiver */
132 fibril_mutex_t rx_lock;
133 /** Lock for transmitter */
134 fibril_mutex_t tx_lock;
135 /** Lock for EEPROM access */
136 fibril_mutex_t eeprom_lock;
137} e1000_t;
138
139/** Global mutex for work with shared irq structure */
140FIBRIL_MUTEX_INITIALIZE(irq_reg_mutex);
141
142static int e1000_get_address(e1000_t *, nic_address_t *);
143static void e1000_eeprom_get_address(e1000_t *, nic_address_t *address);
144static int e1000_set_addr(ddf_fun_t *dev, const nic_address_t *addr);
145
146static int e1000_defective_get_mode(ddf_fun_t *device, uint32_t *mode);
147static int e1000_defective_set_mode(ddf_fun_t *device, uint32_t mode);
148
149static int e1000_get_cable_state(ddf_fun_t *dev, nic_cable_state_t *state);
150static int e1000_get_device_info(ddf_fun_t *dev, nic_device_info_t *info);
151static int e1000_get_operation_mode(ddf_fun_t *device, int *speed,
152 nic_channel_mode_t *duplex, nic_role_t *role);
153static int e1000_set_operation_mode(ddf_fun_t *device, int speed,
154 nic_channel_mode_t duplex, nic_role_t);
155static int e1000_autoneg_enable(ddf_fun_t *device, uint32_t advertisement);
156static int e1000_autoneg_disable(ddf_fun_t *device);
157static int e1000_autoneg_restart(ddf_fun_t *device);
158
159static int e1000_vlan_set_tag(ddf_fun_t *device, uint16_t tag, int add, int strip);
160
161/** Network interface options for E1000 card driver */
162static nic_iface_t e1000_nic_iface;
163
164/** Network interface options for E1000 card driver */
165static nic_iface_t e1000_nic_iface = {
166 .set_address = &e1000_set_addr,
167 .get_device_info = &e1000_get_device_info,
168 .get_cable_state = &e1000_get_cable_state,
169 .get_operation_mode = &e1000_get_operation_mode,
170 .set_operation_mode = &e1000_set_operation_mode,
171 .autoneg_enable = &e1000_autoneg_enable,
172 .autoneg_disable = &e1000_autoneg_disable,
173 .autoneg_restart = &e1000_autoneg_restart,
174 .vlan_set_tag = &e1000_vlan_set_tag,
175
176 .defective_get_mode = &e1000_defective_get_mode,
177 .defective_set_mode = &e1000_defective_set_mode,
178
179};
180
181/** Basic device operations for E1000 driver */
182static ddf_dev_ops_t e1000_dev_ops;
183
184static int e1000_add_device(ddf_dev_t *dev);
185
186/** Basic driver operations for E1000 driver */
187static driver_ops_t e1000_driver_ops = {
188 .add_device = e1000_add_device
189};
190
191/** Driver structure for E1000 driver */
192static driver_t e1000_driver = {
193 .name = NAME,
194 .driver_ops = &e1000_driver_ops
195};
196
197/* The default implementation callbacks */
198static int e1000_on_activating(nic_t *nic_data);
199static int e1000_on_stopping(nic_t *nic_data);
200static void e1000_write_packet(nic_t *nic_data, packet_t *packet);
201
202/** Commands to deal with interrupt
203 *
204 */
205irq_cmd_t e1000_irq_commands[] = {
206 {
207 /* Get the interrupt status */
208 .cmd = CMD_PIO_READ_32,
209 .addr = NULL,
210 .dstarg = 2
211 },
212 {
213 .cmd = CMD_PREDICATE,
214 .value = 2,
215 .srcarg = 2
216 },
217 {
218 /* Disable interrupts until interrupt routine is finished */
219 .cmd = CMD_PIO_WRITE_32,
220 .addr = NULL,
221 .value = 0xFFFFFFFF
222 },
223 {
224 .cmd = CMD_ACCEPT
225 }
226};
227
228/** Interrupt code definition */
229irq_code_t e1000_irq_code = {
230 .cmdcount = sizeof(e1000_irq_commands)/sizeof(irq_cmd_t),
231 .cmds = e1000_irq_commands
232};
233
234/** Get the device information
235 *
236 * @param dev The NIC device
237 * @param info The information to fill
238 * @return EOK
239 */
240static int e1000_get_device_info(ddf_fun_t *dev, nic_device_info_t *info)
241{
242 assert(dev);
243 assert(info);
244
245 bzero(info, sizeof(nic_device_info_t));
246
247 info->vendor_id = 0x8086;
248 str_cpy(info->vendor_name, NIC_VENDOR_MAX_LENGTH, "Intel Corporation");
249 str_cpy(info->model_name, NIC_MODEL_MAX_LENGTH, "Intel Pro");
250 info->ethernet_support[ETH_10M] = ETH_10BASE_T;
251 info->ethernet_support[ETH_100M] = ETH_100BASE_TX;
252 info->ethernet_support[ETH_1000M] = ETH_1000BASE_T;
253 return EOK;
254}
255
256/** Check the cable state
257 *
258 * @param[in] dev The device
259 * @param[out] state The state to fill
260 * @return EOK
261 */
262static int e1000_get_cable_state(ddf_fun_t *dev, nic_cable_state_t *state)
263{
264 assert(dev);
265 assert(DRIVER_DATA_DEV(dev));
266 assert(state);
267
268 e1000_t *e1000_data = DRIVER_DATA_DEV(dev);
269 if (E1000_REG_READ(e1000_data, E1000_STATUS) & (STATUS_LU)) {
270 *state = NIC_CS_PLUGGED;
271 } else {
272 *state = NIC_CS_UNPLUGGED;
273 }
274
275 return EOK;
276}
277
278static uint16_t e1000_calculate_itr_interval_from_usecs(suseconds_t useconds) {
279 return useconds * 4;
280}
281
282/** Get operation mode of the device
283 */
284static int e1000_get_operation_mode(ddf_fun_t *dev, int *speed,
285 nic_channel_mode_t *duplex, nic_role_t *role)
286{
287 e1000_t *e1000_data = DRIVER_DATA_DEV(dev);
288 uint32_t status = E1000_REG_READ(e1000_data, E1000_STATUS);
289
290 if (status & STATUS_FD) {
291 *duplex = NIC_CM_FULL_DUPLEX;
292 } else {
293 *duplex = NIC_CM_HALF_DUPLEX;
294 }
295
296 uint32_t speed_bits =
297 (status >> STATUS_SPEED_SHIFT) & STATUS_SPEED_ALL;
298
299 if (speed_bits == STATUS_SPEED_10) {
300 *speed = 10;
301 } else if (speed_bits == STATUS_SPEED_100) {
302 *speed = 100;
303 } else if ((speed_bits == STATUS_SPEED_1000A)
304 || (speed_bits == STATUS_SPEED_1000B)) {
305 *speed = 1000;
306 }
307
308 *role = NIC_ROLE_UNKNOWN;
309 return EOK;
310}
311
312static void e1000_link_restart(e1000_t * e1000_data)
313{
314 fibril_mutex_lock(&e1000_data->ctrl_lock);;
315 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL);
316
317 if (ctrl & CTRL_SLU) {
318 ctrl &= ~(CTRL_SLU);
319 fibril_mutex_unlock(&e1000_data->ctrl_lock);
320 usleep(10);
321 fibril_mutex_lock(&e1000_data->ctrl_lock);
322 ctrl |= CTRL_SLU;
323 }
324 fibril_mutex_unlock(&e1000_data->ctrl_lock);
325
326 e1000_link_restart(e1000_data);
327
328}
329
330/** Set operation mode of the device
331 *
332 */
333static int e1000_set_operation_mode(ddf_fun_t *dev, int speed,
334 nic_channel_mode_t duplex, nic_role_t role)
335{
336 if (speed != 10 && speed != 100 && speed != 1000)
337 return EINVAL;
338 if (duplex != NIC_CM_HALF_DUPLEX && duplex != NIC_CM_FULL_DUPLEX)
339 return EINVAL;
340
341 e1000_t *e1000_data = DRIVER_DATA_DEV(dev);
342 fibril_mutex_lock(&e1000_data->ctrl_lock);;
343 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL);
344
345 ctrl |= CTRL_FRCSPD;
346 ctrl |= CTRL_FRCDPLX;
347 ctrl &= ~(CTRL_ASDE);
348
349 if (duplex == NIC_CM_FULL_DUPLEX) {
350 ctrl |= CTRL_FD;
351 } else {
352 ctrl &= ~(CTRL_FD);
353 }
354
355
356 ctrl &= ~(CTRL_SPEED_MASK);
357 if (speed == 1000) {
358 ctrl |= CTRL_SPEED_1000 << CTRL_SPEED_SHIFT;
359 } else if (speed == 100) {
360 ctrl |= CTRL_SPEED_100 << CTRL_SPEED_SHIFT;
361 } else {
362 ctrl |= CTRL_SPEED_10 << CTRL_SPEED_SHIFT;
363 }
364
365 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl);
366 fibril_mutex_unlock(&e1000_data->ctrl_lock);
367
368 e1000_link_restart(e1000_data);
369
370 return EOK;
371}
372
373/** Enable autonegoation
374 *
375 * @param dev The device to update
376 * @param advertisement Ignored on E1000
377 * @returns EOK if advertisement mode set successfully
378 */
379static int e1000_autoneg_enable(ddf_fun_t *dev, uint32_t advertisement)
380{
381 e1000_t *e1000_data = DRIVER_DATA_DEV(dev);
382 fibril_mutex_lock(&e1000_data->ctrl_lock);
383 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL);
384
385 ctrl &= ~(CTRL_FRCSPD);
386 ctrl &= ~(CTRL_FRCDPLX);
387 ctrl |= CTRL_ASDE;
388
389 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl);
390 fibril_mutex_unlock(&e1000_data->ctrl_lock);
391
392 e1000_link_restart(e1000_data);
393
394 return EOK;
395}
396
397/** Disable autonegoation
398 *
399 * @param dev The device to update
400 * @returns EOK
401 */
402static int e1000_autoneg_disable(ddf_fun_t *dev)
403{
404 e1000_t *e1000_data = DRIVER_DATA_DEV(dev);
405 fibril_mutex_lock(&e1000_data->ctrl_lock);
406 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL);
407
408 ctrl |= CTRL_FRCSPD;
409 ctrl |= CTRL_FRCDPLX;
410 ctrl &= ~(CTRL_ASDE);
411
412 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl);
413 fibril_mutex_unlock(&e1000_data->ctrl_lock);
414
415 e1000_link_restart(e1000_data);
416
417 return EOK;
418}
419
420/** Restart autonegoation
421 *
422 * @param dev The device to update
423 * @returns EOK if advertisement mode set successfully
424 */
425static int e1000_autoneg_restart(ddf_fun_t *dev)
426{
427 return e1000_autoneg_enable(dev, 0);
428}
429
430
431/** Get state of acceptance of weird packets
432 *
433 * @param device The device to check
434 * @param [out] mode The current mode
435 */
436static int e1000_defective_get_mode(ddf_fun_t *device, uint32_t *mode)
437{
438 e1000_t *e1000_data = DRIVER_DATA_DEV(device);
439 *mode = 0;
440 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
441 if (rctl & RCTL_SBP) {
442 *mode = NIC_DEFECTIVE_BAD_CRC | NIC_DEFECTIVE_SHORT;
443 }
444 return EOK;
445};
446
447/** Set acceptance of weird packets
448 *
449 * @param device The device to update
450 * @param mode The mode to set
451 * @returns ENOTSUP if the mode is not supported
452 * @returns EOK of mode was set
453 */
454static int e1000_defective_set_mode(ddf_fun_t *device, uint32_t mode)
455{
456
457 e1000_t *e1000_data = DRIVER_DATA_DEV(device);
458 fibril_mutex_lock(&e1000_data->rx_lock);
459
460 int rc = EOK;
461 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
462 bool short_mode = (mode & NIC_DEFECTIVE_SHORT ? true : false);
463 bool bad_mode = (mode & NIC_DEFECTIVE_BAD_CRC ? true : false);
464 if (short_mode && bad_mode) {
465 rctl |= RCTL_SBP;
466 } else if ((!short_mode) && (!bad_mode)) {
467 rctl &= ~RCTL_SBP;
468 } else {
469 rc = ENOTSUP;
470 }
471 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
472 fibril_mutex_unlock(&e1000_data->rx_lock);
473 return rc;
474};
475
476
477/** Write receive address to RA registr
478 *
479 * @param e1000_data The E1000 data structure
480 * @param position RA register position
481 * @param address Ethernet address
482 * @param set_av_bit Set the Addtess Valid bit
483 */
484static void e1000_write_receive_address(e1000_t *e1000_data,
485 unsigned int position, const nic_address_t * address,
486 bool set_av_bit)
487{
488 uint8_t *mac0 = (uint8_t *)address->address;
489 uint8_t *mac1 = (uint8_t *)address->address + 1;
490 uint8_t *mac2 = (uint8_t *)address->address + 2;
491 uint8_t *mac3 = (uint8_t *)address->address + 3;
492 uint8_t *mac4 = (uint8_t *)address->address + 4;
493 uint8_t *mac5 = (uint8_t *)address->address + 5;
494
495 uint32_t rah;
496 uint32_t ral;
497
498 ral = ((*mac3) << 24) | ((*mac2) << 16) | ((*mac1) << 8) | (*mac0);
499 rah = ((*mac5) << 8) | ((*mac4));
500 if (set_av_bit) {
501 rah |= RAH_AV;
502 } else {
503 rah |= E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(position))
504 & RAH_AV;
505 }
506
507 E1000_REG_WRITE(e1000_data, E1000_RAH_ARRAY(position), rah);
508 E1000_REG_WRITE(e1000_data, E1000_RAL_ARRAY(position), ral);
509}
510
511/** Disable receive address in RA registr
512 * Clears Address Valid bit
513 *
514 * @param e1000_data The E1000 data structure
515 * @param position RA register position
516 */
517static void e1000_disable_receive_address(e1000_t *e1000_data,
518 unsigned int position)
519{
520 uint32_t rah = E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(position));
521 rah = rah & ~RAH_AV;
522 E1000_REG_WRITE(e1000_data, E1000_RAH_ARRAY(position), rah);
523}
524
525/** Clears all unicast addresses from RA registers
526 *
527 * @param e1000_data The E1000 data structure
528 */
529static void e1000_clear_unicast_receive_addresses(e1000_t *e1000_data)
530{
531 unsigned int ra_num;
532 for(ra_num = 1; ra_num <= e1000_data->unicast_ra_count; ra_num++) {
533 e1000_disable_receive_address(e1000_data, ra_num);
534 }
535 e1000_data->unicast_ra_count = 0;
536}
537
538/** Clears all multicast addresses from RA registers
539 *
540 * @param e1000_data The E1000 data structure
541 */
542static void e1000_clear_multicast_receive_addresses(e1000_t *e1000_data)
543{
544 unsigned int first_multicast_ra_num =
545 E1000_RECEIVE_ADDRESS - e1000_data->multicast_ra_count;
546 unsigned int ra_num;
547 for (ra_num = E1000_RECEIVE_ADDRESS - 1;
548 ra_num >= first_multicast_ra_num; ra_num--) {
549 e1000_disable_receive_address(e1000_data, ra_num);
550 }
551 e1000_data->multicast_ra_count = 0;
552}
553
554/**
555 * Returns receive address filter positions count usable for unicast
556 *
557 * @param e1000_data The E1000 data structure
558 * @return receive address filter positions count usable for unicast
559 */
560static unsigned int get_free_unicast_address_count(e1000_t *e1000_data)
561{
562 return E1000_RECEIVE_ADDRESS - 1 - e1000_data->multicast_ra_count;
563}
564
565/**
566 * Returns receive address filter positions count usable for multicast
567 *
568 * @param e1000_data The E1000 data structure
569 * @return receive address filter positions count usable for multicast
570 */
571static unsigned int get_free_multicast_address_count(e1000_t *e1000_data)
572{
573 return E1000_RECEIVE_ADDRESS - 1 - e1000_data->unicast_ra_count;
574}
575
576/**
577 * Writes unicast receive addresses to receive address filter registers
578 *
579 * @param e1000_data The E1000 data structure
580 * @param addr Pointer to address array
581 * @param addr_cnt Address array count
582 */
583static void e1000_add_unicast_receive_addresses(e1000_t *e1000_data,
584 const nic_address_t * addr, size_t addr_cnt)
585{
586 assert(addr_cnt <= get_free_unicast_address_count(e1000_data));
587 nic_address_t * addr_iterator = (nic_address_t *) addr;
588 unsigned int ra_num;
589 // ra_num=0 is primary address
590 for (ra_num = 1; ra_num <= addr_cnt; ra_num++) {
591 e1000_write_receive_address(e1000_data, ra_num, addr_iterator, true);
592 addr_iterator++;
593 }
594}
595
596/**
597 * Writes multicast receive addresses to receive address filter registers
598 *
599 * @param e1000_data The E1000 data structure
600 * @param addr Pointer to address array
601 * @param addr_cnt Address array count
602 */
603static void e1000_add_multicast_receive_addresses(e1000_t *e1000_data,
604 const nic_address_t * addr, size_t addr_cnt)
605{
606 nic_address_t * addr_iterator = (nic_address_t *) addr;
607 assert(addr_cnt <= get_free_multicast_address_count(e1000_data));
608 unsigned int first_multicast_ra_num = E1000_RECEIVE_ADDRESS - addr_cnt;
609 unsigned int ra_num;
610 for (
611 ra_num = E1000_RECEIVE_ADDRESS - 1;
612 ra_num >= first_multicast_ra_num;
613 ra_num--
614 ) {
615 e1000_write_receive_address(e1000_data, ra_num, addr_iterator, true);
616 addr_iterator++;
617 }
618}
619
620/**
621 * Disables receiving packets for default address
622 *
623 * @param e1000_data The E1000 data structure
624 */
625static void disable_ra0_address_filter(e1000_t *e1000_data)
626{
627 uint32_t rah0 = E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(0));
628 rah0 = rah0 & ~RAH_AV;
629 E1000_REG_WRITE(e1000_data, E1000_RAH_ARRAY(0), rah0);
630}
631
632/**
633 * Enables receiving packets for default address
634 *
635 * @param e1000_data The E1000 data structure
636 */
637static void enable_ra0_address_filter(e1000_t *e1000_data)
638{
639 uint32_t rah0 = E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(0));
640 rah0 = rah0 | RAH_AV;
641 E1000_REG_WRITE(e1000_data, E1000_RAH_ARRAY(0), rah0);
642}
643
644/**
645 * Disables unicast promiscuous mode
646 *
647 * @param e1000_data The E1000 data structure
648 */
649static void e1000_disable_unicast_promisc(e1000_t *e1000_data)
650{
651 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
652 rctl = rctl & ~RCTL_UPE;
653 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
654}
655
656/**
657 * Enables unicast promiscuous mode
658 *
659 * @param e1000_data The E1000 data structure
660 */
661static void e1000_enable_unicast_promisc(e1000_t *e1000_data)
662{
663 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
664 rctl = rctl | RCTL_UPE;
665 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
666}
667
668/**
669 * Disables multicast promiscuous mode
670 *
671 * @param e1000_data The E1000 data structure
672 */
673static void e1000_disable_multicast_promisc(e1000_t *e1000_data)
674{
675 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
676 rctl = rctl & ~RCTL_MPE;
677 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
678}
679
680/**
681 * Enables multicast promiscuous mode
682 *
683 * @param e1000_data The E1000 data structure
684 */
685static void e1000_enable_multicast_promisc(e1000_t *e1000_data)
686{
687 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
688 rctl = rctl | RCTL_MPE;
689 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
690}
691
692/**
693 * Enables accepting of broadcast packets
694 *
695 * @param e1000_data The E1000 data structure
696 */
697static void e1000_enable_broadcast_accept(e1000_t *e1000_data)
698{
699 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
700 rctl = rctl | RCTL_BAM;
701 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
702}
703
704/**
705 * Disables accepting of broadcast packets
706 *
707 * @param e1000_data The E1000 data structure
708 */
709static void e1000_disable_broadcast_accept(e1000_t *e1000_data)
710{
711 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
712 rctl = rctl & ~RCTL_BAM;
713 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
714}
715
716/**
717 * Enables VLAN filtering according to VFTA registers
718 *
719 * @param e1000_data The E1000 data structure
720 */
721static void e1000_enable_vlan_filter(e1000_t *e1000_data)
722{
723 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
724 rctl = rctl | RCTL_VFE;
725 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
726}
727
728/**
729 * Disables VLAN filtering
730 *
731 * @param e1000_data The E1000 data structure
732 */
733static void e1000_disable_vlan_filter(e1000_t *e1000_data)
734{
735 uint32_t rctl = E1000_REG_READ(e1000_data, E1000_RCTL);
736 rctl = rctl & ~RCTL_VFE;
737 E1000_REG_WRITE(e1000_data, E1000_RCTL, rctl);
738}
739
740
741/** Set multicast packets acceptance mode
742 *
743 * @param nic_data The nic device to update
744 * @param mode The mode to set
745 * @param addr address list - used in mode=NIC_MULTICAST_LIST
746 * @param addr_cnt length of address list - used in mode=NIC_MULTICAST_LIST
747 *
748 * @returns EOK
749 */
750static int e1000_on_multicast_mode_change(nic_t *nic_data,
751 nic_multicast_mode_t mode, const nic_address_t * addr, size_t addr_cnt)
752{
753 int rc = EOK;
754 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
755 fibril_mutex_lock(&e1000_data->rx_lock);
756 switch (mode) {
757 case NIC_MULTICAST_BLOCKED:
758 e1000_clear_multicast_receive_addresses(e1000_data);
759 e1000_disable_multicast_promisc(e1000_data);
760 nic_report_hw_filtering(nic_data, -1, 1, -1);
761 break;
762 case NIC_MULTICAST_LIST:
763 e1000_clear_multicast_receive_addresses(e1000_data);
764 if (addr_cnt > get_free_multicast_address_count(e1000_data)) {
765 //TODO: fill MTA table
766 //not neccessary - it only saves some compares in NIC library
767 e1000_enable_multicast_promisc(e1000_data);
768 nic_report_hw_filtering(nic_data, -1, 0, -1);
769 } else {
770 e1000_disable_multicast_promisc(e1000_data);
771 e1000_add_multicast_receive_addresses(e1000_data, addr, addr_cnt);
772 nic_report_hw_filtering(nic_data, -1, 1, -1);
773 }
774 break;
775 case NIC_MULTICAST_PROMISC:
776 e1000_enable_multicast_promisc(e1000_data);
777 e1000_clear_multicast_receive_addresses(e1000_data);
778 nic_report_hw_filtering(nic_data, -1, 1, -1);
779 break;
780 default:
781 rc = ENOTSUP;
782 break;
783 }
784 fibril_mutex_unlock(&e1000_data->rx_lock);
785 return rc;
786}
787/** Set unicast packets acceptance mode
788 *
789 * @param nic_data The nic device to update
790 * @param mode The mode to set
791 * @param addr address list - used in mode=NIC_MULTICAST_LIST
792 * @param addr_cnt length of address list - used in mode=NIC_MULTICAST_LIST
793 *
794 * @returns EOK
795 */
796static int e1000_on_unicast_mode_change(nic_t *nic_data,
797 nic_unicast_mode_t mode, const nic_address_t * addr, size_t addr_cnt)
798{
799 int rc = EOK;
800 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
801 fibril_mutex_lock(&e1000_data->rx_lock);
802 switch (mode) {
803 case NIC_UNICAST_BLOCKED:
804 disable_ra0_address_filter(e1000_data);
805 e1000_clear_unicast_receive_addresses(e1000_data);
806 e1000_disable_unicast_promisc(e1000_data);
807 nic_report_hw_filtering(nic_data, 1, -1, -1);
808 break;
809 case NIC_UNICAST_DEFAULT:
810 enable_ra0_address_filter(e1000_data);
811 e1000_clear_unicast_receive_addresses(e1000_data);
812 e1000_disable_unicast_promisc(e1000_data);
813 nic_report_hw_filtering(nic_data, 1, -1, -1);
814 break;
815 case NIC_UNICAST_LIST:
816 enable_ra0_address_filter(e1000_data);
817 e1000_clear_unicast_receive_addresses(e1000_data);
818 if (addr_cnt > get_free_unicast_address_count(e1000_data)) {
819 e1000_enable_unicast_promisc(e1000_data);
820 nic_report_hw_filtering(nic_data, 0, -1, -1);
821 } else {
822 e1000_disable_unicast_promisc(e1000_data);
823 e1000_add_unicast_receive_addresses(e1000_data, addr, addr_cnt);
824 nic_report_hw_filtering(nic_data, 1, -1, -1);
825 }
826 break;
827 case NIC_UNICAST_PROMISC:
828 e1000_enable_unicast_promisc(e1000_data);
829 enable_ra0_address_filter(e1000_data);
830 e1000_clear_unicast_receive_addresses(e1000_data);
831 nic_report_hw_filtering(nic_data, 1, -1, -1);
832 break;
833 default:
834 rc = ENOTSUP;
835 break;
836 }
837 fibril_mutex_unlock(&e1000_data->rx_lock);
838 return rc;
839}
840
841/** Set broadcast packets acceptance mode
842 *
843 * @param nic_data The nic device to update
844 * @param mode The mode to set
845 *
846 * @returns EOK
847 */
848static int e1000_on_broadcast_mode_change(nic_t *nic_data,
849 nic_broadcast_mode_t mode)
850{
851 int rc = EOK;
852 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
853 fibril_mutex_lock(&e1000_data->rx_lock);
854
855 switch (mode) {
856 case NIC_BROADCAST_BLOCKED:
857 e1000_disable_broadcast_accept(e1000_data);
858 break;
859 case NIC_BROADCAST_ACCEPTED:
860 e1000_enable_broadcast_accept(e1000_data);
861 break;
862 default:
863 rc = ENOTSUP;
864 break;
865 }
866 fibril_mutex_unlock(&e1000_data->rx_lock);
867 return rc;
868}
869
870/**
871 * Checks if receiving is enabled
872 *
873 * @param e1000_data The E1000 data structure
874 * @return true if receiving is enabled
875 */
876static bool e1000_is_rx_enabled(e1000_t *e1000_data)
877{
878 if (E1000_REG_READ(e1000_data, E1000_RCTL) & (RCTL_EN)) {
879 return true;
880 } else {
881 return false;
882 }
883}
884
885/**
886 * Enables receiving
887 *
888 * @param e1000_data The E1000 data structure
889 */
890static void e1000_enable_rx(e1000_t *e1000_data)
891{
892 //setting Receive Enable Bit
893 E1000_REG_WRITE(e1000_data, E1000_RCTL,
894 E1000_REG_READ(e1000_data, E1000_RCTL) | (RCTL_EN));
895}
896
897/**
898 * Disables receiving
899 *
900 * @param e1000_data The E1000 data structure
901 */
902static void e1000_disable_rx(e1000_t *e1000_data)
903{
904 //clearing Receive Enable Bit
905 E1000_REG_WRITE(e1000_data, E1000_RCTL,
906 E1000_REG_READ(e1000_data, E1000_RCTL) & ~(RCTL_EN));
907}
908
909
910/** Set VLAN mask
911 *
912 * @param nic_data The nic device to update
913 * @param vlan_mask VLAN mask
914 */
915static void e1000_on_vlan_mask_change(nic_t *nic_data,
916 const nic_vlan_mask_t * vlan_mask)
917{
918 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
919
920 fibril_mutex_lock(&e1000_data->rx_lock);
921 if (vlan_mask) {
922 bool rx_enabled = e1000_is_rx_enabled(e1000_data);
923 if (rx_enabled) {
924 //Disable receiving, so that packet matching
925 //partially written wlan is not received
926 e1000_disable_rx(e1000_data);
927 }
928 int i;
929 for (i = 0; i < NIC_VLAN_BITMAP_SIZE; i += 4) {
930 uint32_t bitmap_part =
931 ((uint32_t) vlan_mask->bitmap[i]) |
932 (((uint32_t) vlan_mask->bitmap[i + 1]) << 8) |
933 (((uint32_t) vlan_mask->bitmap[i + 2]) << 16) |
934 (((uint32_t) vlan_mask->bitmap[i + 3]) << 24);
935 E1000_REG_WRITE(e1000_data, E1000_VFTA_ARRAY(i / 4), bitmap_part);
936 }
937 e1000_enable_vlan_filter(e1000_data);
938 if (rx_enabled) {
939 e1000_enable_rx(e1000_data);
940 }
941 } else {
942 e1000_disable_vlan_filter(e1000_data);
943 }
944 fibril_mutex_unlock(&e1000_data->rx_lock);
945
946}
947
948/** Set VLAN mask
949 *
950 * @param device The E1000 device
951 * @param tag VLAN tag
952 *
953 * @return EOK
954 * @return ENOTSUP
955 */
956static int e1000_vlan_set_tag(ddf_fun_t *device, uint16_t tag, int add,
957 int strip)
958{
959
960 //VLAN CFI bit cannot be set
961 if (tag & VLANTAG_CFI) {
962 return ENOTSUP;
963 }
964 if (!strip && add) {
965 //CTRL.VME is neccessary for both strip and add
966 //but CTRL.VME means stripping tags on receive
967 return ENOTSUP;
968 }
969
970 e1000_t *e1000_data = DRIVER_DATA_DEV(device);
971 e1000_data->vlan_tag = tag;
972 e1000_data->vlan_tag_add = add;
973
974 fibril_mutex_lock(&e1000_data->ctrl_lock);
975 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL);
976 if (strip) {
977 ctrl |= CTRL_VME;
978 } else {
979 ctrl &= ~CTRL_VME;
980 }
981 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl);
982 fibril_mutex_unlock(&e1000_data->ctrl_lock);
983
984 return EOK;
985}
986
987/** Fill receive descriptor with new empty packet
988 * stores packet in e1000_data->rx_ring_packets
989 *
990 * @param nic_data NIC data stricture
991 * @param offset Receive descriptor offset
992 */
993static void e1000_fill_new_rx_descriptor(nic_t *nic_data, unsigned int offset)
994{
995 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
996
997 packet_t *packet = nic_alloc_packet(nic_data, E1000_MAX_RECEIVE_PACKET_SIZE);
998
999 assert(packet);
1000
1001 *(e1000_data->rx_ring_packets + offset) = packet;
1002 e1000_rx_descriptor_t * rx_descriptor = (e1000_rx_descriptor_t *)
1003 (e1000_data->rx_ring.virtual +
1004 offset * sizeof(e1000_rx_descriptor_t));
1005
1006 void * phys_addr = nic_dma_lock_packet(packet);
1007
1008 if (phys_addr) {
1009 rx_descriptor->phys_addr = PTR_TO_U64(phys_addr +
1010 packet->data_start);
1011 } else {
1012 rx_descriptor->phys_addr = 0;
1013 }
1014 rx_descriptor->length = 0;
1015 rx_descriptor->checksum = 0;
1016 rx_descriptor->status = 0;
1017 rx_descriptor->errors = 0;
1018 rx_descriptor->special = 0;
1019
1020}
1021
1022/** Clear receive descriptor
1023 *
1024 * @param e1000_data E1000 data
1025 * @param offset Receive descriptor offset
1026 */
1027static void e1000_clear_rx_descriptor(e1000_t *e1000_data, unsigned int offset) {
1028
1029 e1000_rx_descriptor_t * rx_descriptor = (e1000_rx_descriptor_t *)
1030 (e1000_data->rx_ring.virtual +
1031 offset * sizeof(e1000_rx_descriptor_t));
1032
1033 rx_descriptor->length = 0;
1034 rx_descriptor->checksum = 0;
1035 rx_descriptor->status = 0;
1036 rx_descriptor->errors = 0;
1037 rx_descriptor->special = 0;
1038}
1039
1040/** Clear receive descriptor
1041 *
1042 * @param nic_data NIC data
1043 * @param offset Receive descriptor offset
1044 */
1045static void e1000_clear_tx_descriptor(nic_t *nic_data, unsigned int offset)
1046{
1047 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1048
1049 e1000_tx_descriptor_t * tx_descriptor = (e1000_tx_descriptor_t *)
1050 (e1000_data->tx_ring.virtual +
1051 offset * sizeof(e1000_tx_descriptor_t));
1052
1053 if (tx_descriptor->length) {
1054 packet_t * old_packet = *(e1000_data->tx_ring_packets + offset);
1055 if (old_packet) {
1056 nic_release_packet(nic_data, old_packet);
1057 }
1058 }
1059 tx_descriptor->phys_addr = 0;
1060 tx_descriptor->length = 0;
1061 tx_descriptor->checksum_offset = 0;
1062 tx_descriptor->command = 0;
1063 tx_descriptor->status = 0;
1064 tx_descriptor->checksum_start_field = 0;
1065 tx_descriptor->special = 0;
1066}
1067
1068/** Increment tail pointer for receive or transmit ring
1069 *
1070 * @param tail old Tail
1071 * @param descriptors_count ring length
1072 *
1073 * @return new tail
1074 */
1075static uint32_t e1000_inc_tail(uint32_t tail, uint32_t descriptors_count)
1076{
1077 if (tail + 1 == descriptors_count) {
1078 return 0;
1079 } else {
1080 return tail + 1;
1081 }
1082}
1083
1084/** Receive packets
1085 *
1086 * @param nic_data The NIC data
1087 */
1088
1089static void e1000_receive_packets(nic_t *nic_data)
1090{
1091 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1092
1093 fibril_mutex_lock(&e1000_data->rx_lock);
1094
1095 uint32_t * tail_addr = E1000_REG_ADDR(e1000_data, E1000_RDT);
1096 uint32_t next_tail;
1097 next_tail = e1000_inc_tail(*tail_addr, E1000_RX_PACKETS_COUNT);
1098 e1000_rx_descriptor_t * rx_descriptor = (e1000_rx_descriptor_t *)
1099 (e1000_data->rx_ring.virtual +
1100 next_tail * sizeof(e1000_rx_descriptor_t));
1101 while (rx_descriptor->status & 0x1) {
1102 uint32_t packet_size = rx_descriptor->length - E1000_CRC_SIZE;
1103
1104 packet_t * packet = *(e1000_data->rx_ring_packets + next_tail);
1105 packet_suffix(packet, packet_size);
1106
1107 nic_dma_unlock_packet(packet);
1108 nic_received_packet(nic_data, packet);
1109
1110 e1000_fill_new_rx_descriptor(nic_data, next_tail);
1111
1112 *tail_addr = e1000_inc_tail(* tail_addr, E1000_RX_PACKETS_COUNT);
1113 next_tail = e1000_inc_tail(*tail_addr, E1000_RX_PACKETS_COUNT);
1114
1115 rx_descriptor = (e1000_rx_descriptor_t *)
1116 (e1000_data->rx_ring.virtual +
1117 next_tail * sizeof(e1000_rx_descriptor_t));
1118 }
1119
1120 fibril_mutex_unlock(&e1000_data->rx_lock);
1121}
1122
1123/**
1124 * Enable E1000 interupts
1125 *
1126 * @param e1000_data The E1000 data structure
1127 */
1128static void e1000_enable_interrupts(e1000_t * e1000_data)
1129{
1130 E1000_REG_WRITE(e1000_data, E1000_IMS, ICR_RXT0);
1131}
1132
1133/**
1134 * Disable E1000 interupts
1135 *
1136 * @param e1000_data The E1000 data structure
1137 */
1138static void e1000_disable_interrupts(e1000_t * e1000_data)
1139{
1140 E1000_REG_WRITE(e1000_data, E1000_IMS, 0);
1141}
1142
1143/** Interrupt handler implementation
1144 * It is called from e1000_interrupt_handler() and e1000_poll()
1145 *
1146 * @param nic_data The NIC data
1147 * @param icr ICR register value
1148 */
1149static void e1000_interrupt_handler_impl(nic_t * nic_data, uint32_t icr) {
1150 if (icr & ICR_RXT0) {
1151 e1000_receive_packets(nic_data);
1152 }
1153}
1154
1155/** Handle device interrupt
1156 *
1157 * @param dev The e1000 device
1158 * @param iid The IPC call id
1159 * @param icall The IPC call structure
1160 */
1161static void e1000_interrupt_handler(ddf_dev_t *dev, ipc_callid_t iid,
1162 ipc_call_t *icall)
1163{
1164 uint32_t icr = (uint32_t) IPC_GET_ARG2(*icall);
1165 nic_t *nic_data = NIC_DATA_DEV(dev);
1166 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1167
1168 e1000_interrupt_handler_impl(nic_data, icr);
1169 e1000_enable_interrupts(e1000_data);
1170};
1171
1172/** Register interrupt handler for the card in the system
1173 *
1174 * Note: the global irq_reg_mutex is locked because of work with global
1175 * structure.
1176 *
1177 * @param nic_data The driver data
1178 * @return EOK if the handler was registered, negative error code otherwise
1179 */
1180inline static int e1000_register_int_handler(nic_t *nic_data)
1181{
1182 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1183
1184 /* Lock the mutex in whole driver while working with global structure */
1185 fibril_mutex_lock(&irq_reg_mutex);
1186
1187 /* TODO remove this dirty hack after accessing memmory mapped registers
1188 * from interrupt pseudeocode is fixed
1189 *
1190 * dirty hack allowing accessing E1000 registers from interrupt
1191 * handler
1192 * 0xffff800000000000 is PA2KA mapping on amd64
1193 * on ia32 adding it does nothing
1194 * see also
1195 * kernel/arch/amd64/src/mm/page.c
1196 * kernel/arch/ia32/src/mm/page.c
1197 * */
1198 e1000_irq_code.cmds[0].addr = 0xffff800000000000 +
1199 e1000_data->phys_reg_base + E1000_ICR;
1200 e1000_irq_code.cmds[2].addr = 0xffff800000000000 +
1201 e1000_data->phys_reg_base + E1000_IMC;
1202 /* End of dirty hack */
1203
1204 int rc = register_interrupt_handler(
1205 nic_get_ddf_dev(nic_data),
1206 e1000_data->irq,
1207 e1000_interrupt_handler,
1208 &e1000_irq_code
1209 );
1210
1211 fibril_mutex_unlock(&irq_reg_mutex);
1212
1213 return rc;
1214}
1215
1216/** Force receiving all packets in the receive buffer
1217 *
1218 * @param nic_data The NIC data
1219 */
1220static void e1000_poll(nic_t *nic_data)
1221{
1222 assert(nic_data);
1223 e1000_t *e1000_data = nic_get_specific(nic_data);
1224 assert(e1000_data);
1225
1226 uint32_t icr = E1000_REG_READ(e1000_data, E1000_ICR);
1227 e1000_interrupt_handler_impl(nic_data, icr);
1228}
1229
1230/** Calculates ITR register interrupt from timeval structure
1231 *
1232 * @param period Period
1233 */
1234static uint16_t e1000_calculate_itr_interval(const struct timeval *period) {
1235 //TODO use also tv_sec
1236 return e1000_calculate_itr_interval_from_usecs(period->tv_usec);
1237}
1238
1239/** Set polling mode
1240 *
1241 * @param device The device to set
1242 * @param mode The mode to set
1243 * @param period The period for NIC_POLL_PERIODIC
1244 *
1245 * @returns EOK if succeed
1246 * @returns ENOTSUP if the mode is not supported
1247 */
1248static int e1000_poll_mode_change(nic_t *nic_data, nic_poll_mode_t mode,
1249 const struct timeval *period)
1250{
1251 assert(nic_data);
1252
1253 e1000_t *e1000_data = nic_get_specific(nic_data);
1254 assert(e1000_data);
1255
1256 switch(mode) {
1257 case NIC_POLL_IMMEDIATE:
1258 E1000_REG_WRITE(e1000_data, E1000_ITR, 0);
1259 e1000_enable_interrupts(e1000_data);
1260 break;
1261 case NIC_POLL_ON_DEMAND:
1262 e1000_disable_interrupts(e1000_data);
1263 break;
1264 case NIC_POLL_PERIODIC:
1265 assert(period);
1266 uint16_t itr_interval = e1000_calculate_itr_interval(period);
1267 E1000_REG_WRITE(e1000_data, E1000_ITR, (uint32_t) itr_interval);
1268 e1000_enable_interrupts(e1000_data);
1269 break;
1270 default:
1271 return ENOTSUP;
1272 }
1273
1274 return EOK;
1275}
1276
1277/**
1278 * Initialize receive registers
1279 *
1280 * @param e1000_data The E1000 data structure
1281 */
1282static void e1000_initialize_rx_registers(e1000_t * e1000_data)
1283{
1284 E1000_REG_WRITE(e1000_data, E1000_RDLEN, E1000_RX_PACKETS_COUNT * 16);
1285 E1000_REG_WRITE(e1000_data, E1000_RDH, 0);
1286 //It is not posible to let HW use all descriptors
1287 E1000_REG_WRITE(e1000_data, E1000_RDT, E1000_RX_PACKETS_COUNT - 1);
1288
1289 //set broadcast enable bit
1290 E1000_REG_WRITE(e1000_data, E1000_RCTL, RCTL_BAM);
1291}
1292
1293/** Initializes receive structure
1294 *
1295 * @param nic_data The NIC data
1296 * @return EOK if succeed, negative error code otherwise
1297 */
1298static int e1000_initialize_rx_structure(nic_t *nic_data)
1299{
1300 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1301 fibril_mutex_lock(&e1000_data->rx_lock);
1302
1303 e1000_data->rx_ring.size = ALIGN_UP(E1000_RX_PACKETS_COUNT *
1304 sizeof(e1000_rx_descriptor_t), PAGE_SIZE) / PAGE_SIZE;
1305 e1000_data->rx_ring.mapping_flags = AS_AREA_READ | AS_AREA_WRITE;
1306 int rc = dma_allocate_anonymous(&e1000_data->rx_ring, 0);
1307 if( rc != EOK ) {
1308 nlog_error("Can not allocate rx ring.");
1309 return rc;
1310 }
1311
1312 E1000_REG_WRITE(e1000_data, E1000_RDBAH,
1313 (uint32_t) (PTR_TO_U64(e1000_data->rx_ring.physical) >> 32));
1314 E1000_REG_WRITE(e1000_data, E1000_RDBAL,
1315 (uint32_t) PTR_TO_U64(e1000_data->rx_ring.physical));
1316
1317 e1000_data->rx_ring_packets =
1318 malloc(E1000_RX_PACKETS_COUNT * sizeof(packet_t *));
1319
1320 //write descriptor
1321 unsigned int offset;
1322 for (offset = 0; offset < E1000_RX_PACKETS_COUNT; offset++) {
1323 e1000_fill_new_rx_descriptor(nic_data, offset);
1324 }
1325
1326 e1000_initialize_rx_registers(e1000_data);
1327
1328 fibril_mutex_unlock(&e1000_data->rx_lock);
1329
1330 return EOK;
1331}
1332
1333/** Uninitializes receive structure
1334 *
1335 * @param nic_data The NIC data
1336 */
1337static void e1000_uninitialize_rx_structure(nic_t *nic_data)
1338{
1339 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1340
1341 //write descriptor
1342 unsigned int offset;
1343 for (offset = 0; offset < E1000_RX_PACKETS_COUNT; offset++) {
1344 packet_t * packet = *(e1000_data->rx_ring_packets + offset);
1345 nic_dma_unlock_packet(packet);
1346 nic_release_packet(nic_data, packet);
1347 }
1348
1349 free(e1000_data->rx_ring_packets);
1350
1351 dma_free(&e1000_data->rx_ring);
1352}
1353
1354/** Clear receive descriptor ring
1355 *
1356 * @param e1000_data The E1000 data
1357 */
1358static void e1000_clear_rx_ring(e1000_t * e1000_data)
1359{
1360 //write descriptor
1361 unsigned int offset;
1362 for (offset = 0; offset < E1000_RX_PACKETS_COUNT; offset++) {
1363 e1000_clear_rx_descriptor(e1000_data, offset);
1364 }
1365}
1366
1367/** Initialize filters
1368 *
1369 * @param e1000_data The E1000 data
1370 */
1371static void e1000_initialize_filters(e1000_t *e1000_data)
1372{
1373 //initialize address filter
1374 e1000_data->unicast_ra_count = 0;
1375 e1000_data->multicast_ra_count = 0;
1376 e1000_clear_unicast_receive_addresses(e1000_data);
1377}
1378
1379/** Initialize VLAN
1380 *
1381 * @param e1000_data The E1000 data
1382 */
1383static void e1000_initialize_vlan(e1000_t *e1000_data)
1384{
1385 e1000_data->vlan_tag_add = false;
1386}
1387
1388/** Fill mac address from EEPROM to RA[0] register
1389 *
1390 * @param e1000_data The E1000 data
1391 */
1392static void e1000_fill_mac_from_eeprom(e1000_t *e1000_data)
1393{
1394 //mac address from eeprom to RA[0]
1395 nic_address_t address;
1396 e1000_eeprom_get_address(e1000_data, &address);
1397 e1000_write_receive_address(e1000_data, 0, &address, true);
1398}
1399
1400/** Initializes other registers
1401 *
1402 * @param dev The E1000 data.
1403 * @return EOK if succeed, negative error code otherwise
1404 */
1405static void e1000_initialize_registers(e1000_t * e1000_data)
1406{
1407 E1000_REG_WRITE(e1000_data, E1000_ITR,
1408 e1000_calculate_itr_interval_from_usecs(
1409 E1000_DEFAULT_INTERRUPT_INTEVAL_USEC));
1410 E1000_REG_WRITE(e1000_data, E1000_FCAH, 0);
1411 E1000_REG_WRITE(e1000_data, E1000_FCAL, 0);
1412 E1000_REG_WRITE(e1000_data, E1000_FCT, 0);
1413 E1000_REG_WRITE(e1000_data, E1000_FCTTV, 0);
1414 E1000_REG_WRITE(e1000_data, E1000_VET, VET_VALUE);
1415 E1000_REG_WRITE(e1000_data, E1000_CTRL, CTRL_ASDE);
1416}
1417
1418/** Initializes transmit registers
1419 *
1420 * @param e1000_data The E1000 data.
1421 */
1422static void e1000_initialize_tx_registers(e1000_t * e1000_data)
1423{
1424
1425 E1000_REG_WRITE(e1000_data, E1000_TDLEN, E1000_TX_PACKETS_COUNT * 16);
1426 E1000_REG_WRITE(e1000_data, E1000_TDH, 0);
1427 E1000_REG_WRITE(e1000_data, E1000_TDT, 0);
1428
1429 E1000_REG_WRITE(e1000_data, E1000_TIPG,
1430 10 << TIPG_IPGT_SHIFT |
1431 8 << TIPG_IPGR1_SHIFT |
1432 6 << TIPG_IPGR2_SHIFT
1433 );
1434 E1000_REG_WRITE(e1000_data, E1000_TCTL,
1435 //Collision Threshold
1436 0x0F << TCTL_CT_SHIFT |
1437 //Collision DISTANCE
1438 0x40 << TCTL_COLD_SHIFT |
1439 //Pad Short Packets
1440 TCTL_PSP
1441 );
1442
1443}
1444
1445/** Initialize transmit structure
1446 *
1447 * @param e1000_data The E1000 data.
1448 */
1449static int e1000_initialize_tx_structure(e1000_t * e1000_data)
1450{
1451
1452 fibril_mutex_lock(&e1000_data->tx_lock);
1453
1454 e1000_data->tx_ring.size = ALIGN_UP(E1000_TX_PACKETS_COUNT *
1455 sizeof(e1000_tx_descriptor_t), PAGE_SIZE) / PAGE_SIZE;
1456 e1000_data->tx_ring.mapping_flags = AS_AREA_READ | AS_AREA_WRITE;
1457 int rc = dma_allocate_anonymous(&e1000_data->tx_ring, 0);
1458 if( rc != EOK ) {
1459 nlog_error("Can not allocate tx ring.");
1460 return rc;
1461 }
1462
1463 bzero(e1000_data->tx_ring.virtual,
1464 E1000_TX_PACKETS_COUNT * sizeof(e1000_tx_descriptor_t));
1465
1466 E1000_REG_WRITE(e1000_data, E1000_TDBAH,
1467 (uint32_t) (PTR_TO_U64(e1000_data->tx_ring.physical) >> 32));
1468 E1000_REG_WRITE(e1000_data, E1000_TDBAL,
1469 (uint32_t) PTR_TO_U64(e1000_data->tx_ring.physical));
1470
1471 e1000_data->tx_ring_packets = malloc(E1000_TX_PACKETS_COUNT *
1472 sizeof(packet_t *));
1473
1474
1475 e1000_initialize_tx_registers(e1000_data);
1476
1477 fibril_mutex_unlock(&e1000_data->tx_lock);
1478
1479 return EOK;
1480}
1481
1482/** Uninitializes transmit structure
1483 *
1484 * @param nic_data The NIC data
1485 */
1486static void e1000_uninitialize_tx_structure(e1000_t * e1000_data)
1487{
1488 free(e1000_data->tx_ring_packets);
1489
1490 dma_free(&e1000_data->tx_ring);
1491}
1492
1493
1494/** Clear transmit descriptor ring
1495 *
1496 * @param nic_data The NIC data
1497 */
1498static void e1000_clear_tx_ring(nic_t * nic_data)
1499{
1500 //write descriptor
1501 unsigned int offset;
1502 for (offset = 0; offset < E1000_TX_PACKETS_COUNT; offset++) {
1503 e1000_clear_tx_descriptor(nic_data, offset);
1504 }
1505}
1506
1507/** Enable transmit
1508 *
1509 * @param e1000_data The E1000 data
1510 */
1511static void e1000_enable_tx(e1000_t *e1000_data)
1512{
1513 //setting Transmit Enable Bit
1514 E1000_REG_WRITE(e1000_data, E1000_TCTL,
1515 E1000_REG_READ(e1000_data, E1000_TCTL) | (TCTL_EN));
1516}
1517
1518/** Disable transmit
1519 *
1520 * @param e1000_data The E1000 data
1521 */
1522static void e1000_disable_tx(e1000_t *e1000_data)
1523{
1524 //clearing Transmit Enable Bit
1525 E1000_REG_WRITE(e1000_data, E1000_TCTL,
1526 E1000_REG_READ(e1000_data, E1000_TCTL) & ~(TCTL_EN));
1527}
1528
1529/** Reset E1000 device
1530 *
1531 * @param e1000_data The E1000 data
1532 */
1533static int e1000_reset(nic_t *nic_data)
1534{
1535 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1536
1537 E1000_REG_WRITE(e1000_data, E1000_CTRL, CTRL_RST);
1538 //wait for the reset
1539 usleep(10);
1540 //check if RST_BIT cleared
1541 assert(! (E1000_REG_READ(e1000_data, E1000_CTRL)
1542 & (CTRL_RST)));
1543
1544 e1000_initialize_registers(e1000_data);
1545 e1000_initialize_rx_registers(e1000_data);
1546 e1000_initialize_tx_registers(e1000_data);
1547
1548 e1000_fill_mac_from_eeprom(e1000_data);
1549
1550 e1000_initialize_filters(e1000_data);
1551
1552 e1000_initialize_vlan(e1000_data);
1553
1554 return EOK;
1555
1556}
1557
1558
1559/** Activate the device to receive and transmit packets
1560 *
1561 * @param nic_data The nic driver data
1562 * @return EOK if activated successfully, error code otherwise
1563 */
1564static int e1000_on_activating(nic_t *nic_data)
1565{
1566 assert(nic_data);
1567
1568 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1569
1570 fibril_mutex_lock(&e1000_data->rx_lock);
1571 fibril_mutex_lock(&e1000_data->tx_lock);
1572 fibril_mutex_lock(&e1000_data->ctrl_lock);
1573
1574 e1000_enable_interrupts(e1000_data);
1575
1576 nic_enable_interrupt(nic_data, e1000_data->irq);
1577
1578 e1000_clear_rx_ring(e1000_data);
1579 e1000_enable_rx(e1000_data);
1580
1581 e1000_clear_tx_ring(nic_data);
1582 e1000_enable_tx(e1000_data);
1583
1584 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL);
1585 ctrl |= CTRL_SLU;
1586 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl);
1587
1588 fibril_mutex_unlock(&e1000_data->ctrl_lock);
1589 fibril_mutex_unlock(&e1000_data->tx_lock);
1590 fibril_mutex_unlock(&e1000_data->rx_lock);
1591
1592 return EOK;
1593}
1594
1595/** Callback for NIC_STATE_DOWN change
1596 *
1597 * @param nic_data The nic driver data
1598 * @return EOK if succeed, error code otherwise
1599 */
1600static int e1000_on_down_unlocked(nic_t *nic_data)
1601{
1602 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1603
1604 uint32_t ctrl = E1000_REG_READ(e1000_data, E1000_CTRL);
1605 ctrl &= ~CTRL_SLU;
1606 E1000_REG_WRITE(e1000_data, E1000_CTRL, ctrl);
1607
1608 e1000_disable_tx(e1000_data);
1609
1610 e1000_disable_rx(e1000_data);
1611
1612 nic_disable_interrupt(nic_data, e1000_data->irq);
1613
1614 e1000_disable_interrupts(e1000_data);
1615
1616 //wait for the for the end of all data transfers to descriptors
1617 usleep(100);
1618
1619 return EOK;
1620}
1621
1622/** Callback for NIC_STATE_DOWN change
1623 *
1624 * @param nic_data The nic driver data
1625 * @return EOK if succeed, error code otherwise
1626 */
1627static int e1000_on_down(nic_t *nic_data)
1628{
1629 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1630
1631 fibril_mutex_lock(&e1000_data->rx_lock);
1632 fibril_mutex_lock(&e1000_data->tx_lock);
1633 fibril_mutex_lock(&e1000_data->ctrl_lock);
1634
1635 int rc = e1000_on_down_unlocked(nic_data);
1636
1637 fibril_mutex_unlock(&e1000_data->ctrl_lock);
1638 fibril_mutex_unlock(&e1000_data->tx_lock);
1639 fibril_mutex_unlock(&e1000_data->rx_lock);
1640
1641 return rc;
1642}
1643
1644/** Callback for NIC_STATE_STOPPED change
1645 *
1646 * @param nic_data The nic driver data
1647 * @return EOK if succeed, error code otherwise
1648 */
1649static int e1000_on_stopping(nic_t *nic_data)
1650{
1651 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1652
1653 fibril_mutex_lock(&e1000_data->rx_lock);
1654 fibril_mutex_lock(&e1000_data->tx_lock);
1655 fibril_mutex_lock(&e1000_data->ctrl_lock);
1656
1657 int rc = e1000_on_down_unlocked(nic_data);
1658 if (rc == EOK) {
1659 rc = e1000_reset(nic_data);
1660 }
1661
1662 fibril_mutex_unlock(&e1000_data->ctrl_lock);
1663 fibril_mutex_unlock(&e1000_data->tx_lock);
1664 fibril_mutex_unlock(&e1000_data->rx_lock);
1665
1666 return rc;
1667}
1668
1669
1670
1671/** Create driver data structure
1672 *
1673 * @return Intialized device data structure or NULL
1674 */
1675static e1000_t *e1000_create_dev_data(ddf_dev_t *dev)
1676{
1677 assert(dev);
1678 assert(!dev->driver_data);
1679
1680 nic_t *nic_data = nic_create_and_bind(dev);
1681 if (!nic_data)
1682 return NULL;
1683
1684 e1000_t *e1000_data = malloc(sizeof(e1000_t));
1685 if (!e1000_data) {
1686 nic_unbind_and_destroy(dev);
1687 return NULL;
1688 }
1689
1690 bzero(e1000_data, sizeof(e1000_t));
1691
1692 nic_set_specific(nic_data, e1000_data);
1693 nic_set_write_packet_handler(nic_data, e1000_write_packet);
1694 nic_set_state_change_handlers(
1695 nic_data,
1696 e1000_on_activating,
1697 e1000_on_down,
1698 e1000_on_stopping
1699 );
1700 nic_set_filtering_change_handlers(
1701 nic_data,
1702 e1000_on_unicast_mode_change,
1703 e1000_on_multicast_mode_change,
1704 e1000_on_broadcast_mode_change,
1705 NULL,
1706 e1000_on_vlan_mask_change
1707 );
1708
1709 nic_set_poll_handlers(nic_data, e1000_poll_mode_change, e1000_poll);
1710
1711 fibril_mutex_initialize(&e1000_data->ctrl_lock);
1712 fibril_mutex_initialize(&e1000_data->rx_lock);
1713 fibril_mutex_initialize(&e1000_data->tx_lock);
1714 fibril_mutex_initialize(&e1000_data->eeprom_lock);
1715
1716 return e1000_data;
1717}
1718
1719/** Delete driver data structure if not null and null the pointer
1720 *
1721 * @param data The e1000 device data structure
1722 */
1723inline static void e1000_delete_dev_data(ddf_dev_t *dev)
1724{
1725 assert(dev);
1726 if (dev->driver_data != NULL)
1727 nic_unbind_and_destroy(dev);
1728}
1729
1730/** Clean up the e1000 device structure.
1731 *
1732 * @param dev The device structure.
1733 */
1734static void e1000_dev_cleanup(ddf_dev_t *dev)
1735{
1736 assert(dev);
1737
1738 e1000_delete_dev_data(dev);
1739
1740 if (dev->parent_sess != NULL) {
1741 async_hangup(dev->parent_sess);
1742 dev->parent_sess = NULL;
1743 }
1744}
1745
1746/** Fill the irq and io_addr part of device data structure
1747 *
1748 * The hw_resources must be obtained before calling this function
1749 *
1750 * @param dev The device structure
1751 * @param hw_resources Drive hardware resources obtained from the parent device
1752 * @return EOK if succeed, negative error code otherwise
1753 */
1754static int e1000_fill_resource_info(ddf_dev_t *dev, const hw_res_list_parsed_t
1755 *hw_resources)
1756{
1757 assert(dev != NULL);
1758 assert(hw_resources != NULL);
1759 assert(dev->driver_data != NULL);
1760
1761 e1000_t *e1000_data = DRIVER_DATA_DEV(dev);
1762
1763 if (hw_resources->irqs.count != 1) {
1764 nlog_error("%s device: unexpected irq count", dev->name);
1765 return EINVAL;
1766 };
1767
1768 e1000_data->irq = hw_resources->irqs.irqs[0];
1769
1770 e1000_data->phys_reg_base =
1771 MEMADDR_TO_PTR(hw_resources->mem_ranges.ranges[0].address);
1772 //TODO remove when hack is not neccessary
1773 nlog_info("%s DIRTY HACK: FILL THIS ADDRESS %p "
1774 "to kernel/arch/(ia32|amd64)/src/mm/page.c ", dev->name,
1775 e1000_data->phys_reg_base);
1776
1777 return EOK;
1778}
1779
1780/** Obtain information about hardware resources of the device
1781 *
1782 * The device must be connected to the parent
1783 *
1784 * @param dev The device structure
1785 * @return EOK if succeed, negative error code otherwise
1786 */
1787static int e1000_get_resource_info(ddf_dev_t *dev)
1788{
1789 assert(dev != NULL);
1790 assert(NIC_DATA_DEV(dev) != NULL);
1791
1792 hw_res_list_parsed_t hw_res_parsed;
1793 hw_res_list_parsed_init(&hw_res_parsed);
1794
1795 /* Get hw resources form parent driver */
1796 int rc = nic_get_resources(NIC_DATA_DEV(dev), &hw_res_parsed);
1797 if (rc != EOK)
1798 return rc;
1799
1800 /* Fill resources information to the device */
1801 rc = e1000_fill_resource_info(dev, &hw_res_parsed);
1802 hw_res_list_parsed_clean(&hw_res_parsed);
1803
1804 return rc;
1805}
1806
1807/** Initialize the e1000 device structure
1808 *
1809 * @param dev The device information
1810 * @return EOK if succeed, negative error code otherwise
1811 */
1812static int e1000_device_initialize(ddf_dev_t *dev)
1813{
1814 int rc = EOK;
1815
1816 /* Allocate driver data for the device. */
1817 e1000_t *e1000_data = e1000_create_dev_data(dev);
1818 if (e1000_data == NULL) {
1819 nlog_error("Not enough memory for initializing %s.", dev->name);
1820 return ENOMEM;
1821 }
1822
1823 /* Obtain and fill hardware resources info */
1824 rc = e1000_get_resource_info(dev);
1825 if (rc != EOK) {
1826 nlog_error("Can not obatin hw resources information");
1827 goto failed;
1828 }
1829
1830 rc = pci_config_space_read_16(dev->parent_sess, PCI_DEVICE_ID,
1831 &e1000_data->device_id);
1832 if (rc != EOK) {
1833 nlog_error("Can not load PCI device_id.");
1834 goto failed;
1835 }
1836
1837 return rc;
1838
1839failed:
1840 nlog_error("The device initialization failed");
1841 e1000_dev_cleanup(dev);
1842 return rc;
1843}
1844
1845/** Enable the i/o ports of the device.
1846 *
1847 * @param dev The E1000 device.
1848 * @return EOK if successed, negative error code otherwise
1849 */
1850static int e1000_pio_enable(ddf_dev_t *dev)
1851{
1852 e1000_t *e1000_data = DRIVER_DATA_DEV(dev);
1853
1854 /* Gain control over port's registers. */
1855 if (pio_enable(e1000_data->phys_reg_base, 8 * PAGE_SIZE,
1856 &e1000_data->virt_reg_base)) { //TODO 8*PAGE_SIZE nahradit
1857 nlog_error(
1858 "Cannot gain the memory mapped registers %lx for device %s.",
1859 e1000_data->phys_reg_base,
1860 dev->name
1861 );
1862 return EADDRNOTAVAIL;
1863 }
1864
1865 return EOK;
1866}
1867
1868/** The add_device callback of E1000 callback
1869 *
1870 * Probe and initialize the newly added device.
1871 *
1872 * @param dev The E1000 device.
1873 */
1874int e1000_add_device(ddf_dev_t *dev)
1875{
1876 assert(dev);
1877
1878 /* Init device structure for e1000 */
1879 int rc = e1000_device_initialize(dev);
1880 if (rc != EOK)
1881 return rc;
1882
1883 // Device initialization
1884 nic_t * nic_data = dev->driver_data;
1885
1886 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
1887
1888 /* Map registers */
1889 rc = e1000_pio_enable(dev);
1890 if (rc != EOK)
1891 goto err_destroy;
1892
1893 e1000_initialize_registers(e1000_data);
1894
1895 rc = e1000_initialize_tx_structure(e1000_data);
1896 if( rc!= EOK )
1897 goto err_pio;
1898
1899 fibril_mutex_lock(&e1000_data->rx_lock);
1900
1901 e1000_fill_mac_from_eeprom(e1000_data);
1902 e1000_initialize_filters(e1000_data);
1903
1904 fibril_mutex_unlock(&e1000_data->rx_lock);
1905
1906 e1000_initialize_vlan(e1000_data);
1907
1908 rc = nic_register_as_ddf_fun(nic_data, &e1000_dev_ops);
1909 if (rc != EOK) {
1910 nlog_error("Failed to register as DDF function - error %d", rc);
1911 goto err_tx_structure;
1912 }
1913
1914 rc = e1000_register_int_handler(nic_data);
1915 if (rc != EOK) {
1916 goto err_tx_structure;
1917 }
1918
1919 rc = nic_connect_to_services(nic_data);
1920 if (rc != EOK) {
1921 nlog_error("Failed to connect to essential services - error %d", rc);
1922 goto err_irq;
1923 }
1924
1925 rc = e1000_initialize_rx_structure(nic_data);
1926 if (rc != EOK) {
1927 nlog_error("Failed to init rx - error %d", rc);
1928 goto err_irq;
1929 }
1930
1931 nic_address_t e1000_address;
1932 e1000_get_address(e1000_data, &e1000_address);
1933 rc = nic_report_address(nic_data, &e1000_address);
1934 if (rc != EOK) {
1935 nlog_error("Failed to setup address - error %d", rc);
1936 goto err_rx_structure;
1937 }
1938
1939 struct timeval period;
1940 period.tv_sec = 0;
1941 period.tv_usec = E1000_DEFAULT_INTERRUPT_INTEVAL_USEC;
1942 rc = nic_report_poll_mode(nic_data, NIC_POLL_PERIODIC, &period);
1943 if (rc != EOK) {
1944 nlog_error("Failed report poll mode %d", rc);
1945 goto err_rx_structure;
1946 }
1947
1948 nlog_info("The %s device has been successfully initialized.",
1949 dev->name);
1950
1951 return EOK;
1952
1953err_rx_structure:
1954 e1000_uninitialize_rx_structure(nic_data);
1955err_irq:
1956 unregister_interrupt_handler(dev, DRIVER_DATA_DEV(dev)->irq);
1957err_tx_structure:
1958 e1000_uninitialize_tx_structure(e1000_data);
1959err_pio:
1960 // e1000_pio_disable(dev);
1961 /* TODO: find out if the pio_disable is needed */
1962err_destroy:
1963 e1000_dev_cleanup(dev);
1964 return rc;
1965};
1966
1967/** Read 16-bit value from EEPROM of E1000 adapter
1968 * Function uses EERD register.
1969 *
1970 * @param device The E1000 device
1971 * @param eeprom_address 8-bit EEPROM address
1972 * @return 16-bit value from EEPROM
1973 */
1974static uint16_t e1000_eeprom_read(e1000_t *e1000_data, uint8_t eeprom_address)
1975{
1976
1977 fibril_mutex_lock(&e1000_data->eeprom_lock);
1978
1979 uint32_t eerd_done;
1980 uint32_t eerd_address_offset;
1981
1982 switch (e1000_data->device_id) {
1983 case 0x107c:
1984 case 0x1013:
1985 case 0x1018:
1986 case 0x1019:
1987 case 0x101A:
1988 case 0x1076:
1989 case 0x1077:
1990 case 0x1078:
1991 case 0x10b9:
1992 //82541xx and 82547GI/EI
1993 //TODO add more device ids
1994 eerd_done =
1995 EERD_DONE_82541XX_82547GI_EI;
1996 eerd_address_offset =
1997 EERD_ADDRESS_OFFSET_82541XX_82547GI_EI;
1998 break;
1999 default:
2000 eerd_done = EERD_DONE;
2001 eerd_address_offset = EERD_ADDRESS_OFFSET;
2002 break;
2003 }
2004
2005 //write address and START bit to EERD register
2006 uint32_t write_data =
2007 EERD_START | (((uint32_t)eeprom_address) << eerd_address_offset);
2008 E1000_REG_WRITE(e1000_data, E1000_EERD, write_data);
2009
2010 uint32_t eerd = E1000_REG_READ(e1000_data, E1000_EERD);
2011 while ((eerd & eerd_done) == 0) {
2012 usleep(1);
2013 eerd = E1000_REG_READ(e1000_data, E1000_EERD);
2014 }
2015
2016 fibril_mutex_unlock(&e1000_data->eeprom_lock);
2017
2018 return (uint16_t)(eerd >> EERD_DATA_OFFSET);
2019}
2020
2021/** Get MAC address of the E1000 adapter
2022 *
2023 * @param device The E10000 device
2024 * @param address The place to store the address
2025 * @param max_len Maximal addresss length to store
2026 * @return EOK if succeed, negative error code otherwise
2027 */
2028static int e1000_get_address(e1000_t *e1000_data, nic_address_t *address)
2029{
2030 fibril_mutex_lock(&e1000_data->rx_lock);
2031
2032 uint8_t *mac0_dest = (uint8_t *)address->address;
2033 uint8_t *mac1_dest = (uint8_t *)address->address + 1;
2034 uint8_t *mac2_dest = (uint8_t *)address->address + 2;
2035 uint8_t *mac3_dest = (uint8_t *)address->address + 3;
2036 uint8_t *mac4_dest = (uint8_t *)address->address + 4;
2037 uint8_t *mac5_dest = (uint8_t *)address->address + 5;
2038
2039 uint32_t rah = E1000_REG_READ(e1000_data, E1000_RAH_ARRAY(0));
2040 uint32_t ral = E1000_REG_READ(e1000_data, E1000_RAL_ARRAY(0));
2041
2042 *mac0_dest = (uint8_t) ral;
2043 *mac1_dest = (uint8_t) (ral >> 8);
2044 *mac2_dest = (uint8_t) (ral >> 16);
2045 *mac3_dest = (uint8_t) (ral >> 24);
2046 *mac4_dest = (uint8_t) rah;
2047 *mac5_dest = (uint8_t) (rah >> 8);
2048
2049 fibril_mutex_unlock(&e1000_data->rx_lock);
2050
2051 return EOK;
2052};
2053
2054/** Set card MAC address
2055 *
2056 * @param device The E1000 device
2057 * @param address The place to store the address
2058 * @param max_len Maximal addresss length to store
2059 * @return EOK if succeed, negative error code otherwise
2060 */
2061static int e1000_set_addr(ddf_fun_t *dev, const nic_address_t *addr)
2062{
2063 nic_t *nic_data = NIC_DATA_DEV(dev);
2064 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
2065 fibril_mutex_lock(&e1000_data->rx_lock);
2066 fibril_mutex_lock(&e1000_data->tx_lock);
2067
2068 int rc = nic_report_address(nic_data, addr);
2069 if (rc == EOK) {
2070 e1000_write_receive_address(e1000_data, 0, addr, false);
2071 }
2072
2073 fibril_mutex_unlock(&e1000_data->tx_lock);
2074 fibril_mutex_unlock(&e1000_data->rx_lock);
2075
2076 return rc;
2077}
2078
2079static void e1000_eeprom_get_address(e1000_t *e1000_data,
2080 nic_address_t *address)
2081{
2082 uint16_t *mac0_dest = (uint16_t *)address->address;
2083 uint16_t *mac2_dest = (uint16_t *)(address->address + 2);
2084 uint16_t *mac4_dest = (uint16_t *)(address->address + 4);
2085
2086 *mac0_dest = e1000_eeprom_read(e1000_data, 0);
2087 *mac2_dest = e1000_eeprom_read(e1000_data, 1);
2088 *mac4_dest = e1000_eeprom_read(e1000_data, 2);
2089}
2090
2091/** Send packet with the hardware
2092 *
2093 * @param nic_data The nic driver data structure
2094 * @param packet The packet to send
2095 *
2096 * @return EOK if succeed, error code in the case of error
2097 */
2098static void e1000_write_packet(nic_t *nic_data, packet_t *packet)
2099{
2100 assert(nic_data);
2101
2102 e1000_t *e1000_data = DRIVER_DATA_NIC(nic_data);
2103 fibril_mutex_lock(&e1000_data->tx_lock);
2104
2105 uint32_t tdt = E1000_REG_READ(e1000_data, E1000_TDT);
2106 e1000_tx_descriptor_t * tx_descriptor_addr = (e1000_tx_descriptor_t *)
2107 (e1000_data->tx_ring.virtual + tdt * sizeof(e1000_tx_descriptor_t));
2108
2109 bool descriptor_available = false;
2110 //Descriptor never used
2111 if (tx_descriptor_addr->length == 0) {
2112 descriptor_available = true;
2113 }
2114 //Descriptor done
2115 if (tx_descriptor_addr->status & TXDESCRIPTOR_STATUS_DD) {
2116 descriptor_available = true;
2117 packet_t * old_packet = *(e1000_data->tx_ring_packets + tdt);
2118 if (old_packet) {
2119 nic_dma_unlock_packet(old_packet);
2120 nic_release_packet(nic_data, old_packet);
2121 }
2122 }
2123 if (! descriptor_available) {
2124 nlog_error("Packet %d lost no space in tx ring", packet->packet_id);
2125 fibril_mutex_unlock(&e1000_data->tx_lock);
2126 return;
2127 }
2128
2129 size_t packet_size = packet_get_data_length(packet);
2130
2131 void * phys_addr;
2132 phys_addr = nic_dma_lock_packet(packet);
2133 if (!phys_addr) {
2134 fibril_mutex_unlock(&e1000_data->tx_lock);
2135 return;
2136 }
2137
2138 *(e1000_data->tx_ring_packets + tdt) = packet;
2139
2140 tx_descriptor_addr->phys_addr =
2141 PTR_TO_U64(phys_addr + packet->data_start);
2142 tx_descriptor_addr->length = packet_size;
2143 tx_descriptor_addr->command =
2144 TXDESCRIPTOR_COMMAND_RS | // report status to STATUS.DD (descr. done)
2145 TXDESCRIPTOR_COMMAND_IFCS | // add ethernet CRC
2146 TXDESCRIPTOR_COMMAND_EOP; // end of packet
2147 tx_descriptor_addr->checksum_offset = 0;
2148 tx_descriptor_addr->status = 0;
2149 if (e1000_data->vlan_tag_add) {
2150 tx_descriptor_addr->special = e1000_data->vlan_tag;
2151 tx_descriptor_addr->command |= TXDESCRIPTOR_COMMAND_VLE;
2152 } else {
2153 tx_descriptor_addr->special = 0;
2154 }
2155 tx_descriptor_addr->checksum_start_field = 0;
2156
2157 ++tdt;
2158 if (tdt == E1000_TX_PACKETS_COUNT ) {
2159 tdt = 0;
2160 }
2161
2162 E1000_REG_WRITE(e1000_data, E1000_TDT, tdt);
2163
2164
2165 fibril_mutex_unlock(&e1000_data->tx_lock);
2166
2167};
2168
2169/** Initialize the driver
2170 */
2171static void e1000_driver_init()
2172{
2173 int rc = dma_allocator_init();
2174 if (rc != EOK) {
2175 nlog_error("Unable to initialize DMA allocator");
2176 }
2177}
2178
2179/** Main function of E1000 driver
2180 *
2181 * Just initialize the driver structures and
2182 * put it into the device drivers interface
2183 */
2184int main(void)
2185{
2186 int rc = nic_driver_init(NAME);
2187 if (rc != EOK) {
2188 return rc;
2189 }
2190
2191 nlog_set_min_severity(DEBUG);
2192 nic_driver_implement(&e1000_driver_ops, &e1000_dev_ops, &e1000_nic_iface);
2193
2194 e1000_driver_init();
2195 nlog_info("HelenOS E1000 driver started");
2196 return ddf_driver_main(&e1000_driver);
2197}
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