| 1 | /*
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| 2 | * Copyright (c) 2017 Michal Staruch
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief The host controller transfer ring management
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| 34 | */
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| 35 |
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| 36 | #include <usb/debug.h>
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| 37 | #include <usb/request.h>
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| 38 | #include "endpoint.h"
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| 39 | #include "hc.h"
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| 40 | #include "hw_struct/trb.h"
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| 41 | #include "transfers.h"
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| 42 | #include "trb_ring.h"
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| 43 |
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| 44 | typedef enum {
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| 45 | STAGE_OUT,
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| 46 | STAGE_IN,
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| 47 | } stage_dir_flag_t;
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| 48 |
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| 49 | #define REQUEST_TYPE_DTD (0x80)
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| 50 | #define REQUEST_TYPE_IS_DEVICE_TO_HOST(rq) ((rq) & REQUEST_TYPE_DTD)
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| 51 |
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| 52 |
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| 53 | /** Get direction flag of data stage.
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| 54 | * See Table 7 of xHCI specification.
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| 55 | */
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| 56 | static inline stage_dir_flag_t get_status_direction_flag(xhci_trb_t* trb,
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| 57 | uint8_t bmRequestType, uint16_t wLength)
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| 58 | {
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| 59 | /* See Table 7 of xHCI specification */
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| 60 | return REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType) && (wLength > 0)
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| 61 | ? STAGE_OUT
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| 62 | : STAGE_IN;
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| 63 | }
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| 64 |
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| 65 | typedef enum {
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| 66 | DATA_STAGE_NO = 0,
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| 67 | DATA_STAGE_OUT = 2,
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| 68 | DATA_STAGE_IN = 3,
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| 69 | } data_stage_type_t;
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| 70 |
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| 71 | /** Get transfer type flag.
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| 72 | * See Table 8 of xHCI specification.
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| 73 | */
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| 74 | static inline data_stage_type_t get_transfer_type(xhci_trb_t* trb, uint8_t
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| 75 | bmRequestType, uint16_t wLength)
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| 76 | {
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| 77 | if (wLength == 0)
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| 78 | return DATA_STAGE_NO;
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| 79 |
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| 80 | /* See Table 7 of xHCI specification */
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| 81 | return REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType)
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| 82 | ? DATA_STAGE_IN
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| 83 | : DATA_STAGE_NO;
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| 84 | }
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| 85 |
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| 86 | static inline bool configure_endpoint_needed(usb_device_request_setup_packet_t *setup)
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| 87 | {
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| 88 | usb_request_type_t request_type = SETUP_REQUEST_TYPE_GET_TYPE(setup->request_type);
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| 89 |
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| 90 | return request_type == USB_REQUEST_TYPE_STANDARD &&
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| 91 | (setup->request == USB_DEVREQ_SET_CONFIGURATION
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| 92 | || setup->request == USB_DEVREQ_SET_INTERFACE);
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| 93 | }
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| 94 |
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| 95 | /**
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| 96 | * Create a xHCI-specific transfer batch.
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| 97 | *
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| 98 | * Bus callback.
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| 99 | */
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| 100 | usb_transfer_batch_t * xhci_transfer_create(endpoint_t* ep)
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| 101 | {
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| 102 | xhci_transfer_t *transfer = calloc(1, sizeof(xhci_transfer_t));
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| 103 | if (!transfer)
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| 104 | return NULL;
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| 105 |
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| 106 | usb_transfer_batch_init(&transfer->batch, ep);
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| 107 | return &transfer->batch;
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| 108 | }
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| 109 |
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| 110 | /**
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| 111 | * Destroy a xHCI transfer.
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| 112 | */
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| 113 | void xhci_transfer_destroy(usb_transfer_batch_t* batch)
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| 114 | {
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| 115 | xhci_transfer_t *transfer = xhci_transfer_from_batch(batch);
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| 116 |
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| 117 | dma_buffer_free(&transfer->hc_buffer);
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| 118 | free(transfer);
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| 119 | }
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| 120 |
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| 121 | static xhci_trb_ring_t *get_ring(xhci_hc_t *hc, xhci_transfer_t *transfer)
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| 122 | {
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| 123 | return &xhci_endpoint_get(transfer->batch.ep)->ring;
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| 124 | }
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| 125 |
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| 126 | static int schedule_control(xhci_hc_t* hc, xhci_transfer_t* transfer)
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| 127 | {
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| 128 | usb_transfer_batch_t *batch = &transfer->batch;
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| 129 | xhci_trb_ring_t *ring = get_ring(hc, transfer);
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| 130 | xhci_endpoint_t *xhci_ep = xhci_endpoint_get(transfer->batch.ep);
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| 131 |
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| 132 | usb_device_request_setup_packet_t* setup = &batch->setup.packet;
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| 133 |
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| 134 | xhci_trb_t trbs[3];
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| 135 | int trbs_used = 0;
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| 136 |
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| 137 | xhci_trb_t *trb_setup = trbs + trbs_used++;
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| 138 | xhci_trb_clean(trb_setup);
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| 139 |
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| 140 | TRB_CTRL_SET_SETUP_WVALUE(*trb_setup, setup->value);
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| 141 | TRB_CTRL_SET_SETUP_WLENGTH(*trb_setup, setup->length);
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| 142 | TRB_CTRL_SET_SETUP_WINDEX(*trb_setup, setup->index);
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| 143 | TRB_CTRL_SET_SETUP_BREQ(*trb_setup, setup->request);
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| 144 | TRB_CTRL_SET_SETUP_BMREQTYPE(*trb_setup, setup->request_type);
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| 145 |
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| 146 | /* Size of the setup packet is always 8 */
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| 147 | TRB_CTRL_SET_XFER_LEN(*trb_setup, 8);
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| 148 |
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| 149 | /* Immediate data */
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| 150 | TRB_CTRL_SET_IDT(*trb_setup, 1);
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| 151 | TRB_CTRL_SET_TRB_TYPE(*trb_setup, XHCI_TRB_TYPE_SETUP_STAGE);
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| 152 | TRB_CTRL_SET_TRT(*trb_setup, get_transfer_type(trb_setup, setup->request_type, setup->length));
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| 153 |
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| 154 | /* Data stage */
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| 155 | xhci_trb_t *trb_data = NULL;
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| 156 | if (setup->length > 0) {
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| 157 | trb_data = trbs + trbs_used++;
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| 158 | xhci_trb_clean(trb_data);
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| 159 |
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| 160 | trb_data->parameter = host2xhci(64, transfer->hc_buffer.phys);
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| 161 |
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| 162 | // data size (sent for OUT, or buffer size)
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| 163 | TRB_CTRL_SET_XFER_LEN(*trb_data, batch->buffer_size);
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| 164 | // FIXME: TD size 4.11.2.4
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| 165 | TRB_CTRL_SET_TD_SIZE(*trb_data, 1);
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| 166 |
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| 167 | // Some more fields here, no idea what they mean
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| 168 | TRB_CTRL_SET_TRB_TYPE(*trb_data, XHCI_TRB_TYPE_DATA_STAGE);
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| 169 |
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| 170 | int stage_dir = REQUEST_TYPE_IS_DEVICE_TO_HOST(setup->request_type)
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| 171 | ? STAGE_IN : STAGE_OUT;
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| 172 | TRB_CTRL_SET_DIR(*trb_data, stage_dir);
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| 173 | }
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| 174 |
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| 175 | /* Status stage */
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| 176 | xhci_trb_t *trb_status = trbs + trbs_used++;
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| 177 | xhci_trb_clean(trb_status);
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| 178 |
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| 179 | // FIXME: Evaluate next TRB? 4.12.3
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| 180 | // TRB_CTRL_SET_ENT(*trb_status, 1);
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| 181 |
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| 182 | TRB_CTRL_SET_IOC(*trb_status, 1);
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| 183 | TRB_CTRL_SET_TRB_TYPE(*trb_status, XHCI_TRB_TYPE_STATUS_STAGE);
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| 184 | TRB_CTRL_SET_DIR(*trb_status, get_status_direction_flag(trb_setup, setup->request_type, setup->length));
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| 185 |
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| 186 | // Issue a Configure Endpoint command, if needed.
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| 187 | if (configure_endpoint_needed(setup)) {
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| 188 | const int err = hc_configure_device(hc, xhci_ep_to_dev(xhci_ep)->slot_id);
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| 189 | if (err)
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| 190 | return err;
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| 191 | }
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| 192 |
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| 193 | return xhci_trb_ring_enqueue_multiple(ring, trbs, trbs_used, &transfer->interrupt_trb_phys);
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| 194 | }
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| 195 |
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| 196 | static int schedule_bulk(xhci_hc_t* hc, xhci_transfer_t *transfer)
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| 197 | {
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| 198 | xhci_trb_t trb;
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| 199 | xhci_trb_clean(&trb);
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| 200 | trb.parameter = host2xhci(64, transfer->hc_buffer.phys);
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| 201 |
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| 202 | // data size (sent for OUT, or buffer size)
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| 203 | TRB_CTRL_SET_XFER_LEN(trb, transfer->batch.buffer_size);
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| 204 | // FIXME: TD size 4.11.2.4
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| 205 | TRB_CTRL_SET_TD_SIZE(trb, 1);
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| 206 |
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| 207 | // we want an interrupt after this td is done
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| 208 | TRB_CTRL_SET_IOC(trb, 1);
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| 209 |
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| 210 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
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| 211 |
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| 212 | xhci_trb_ring_t* ring = get_ring(hc, transfer);
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| 213 |
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| 214 | return xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
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| 215 | }
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| 216 |
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| 217 | static int schedule_interrupt(xhci_hc_t* hc, xhci_transfer_t* transfer)
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| 218 | {
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| 219 | xhci_trb_t trb;
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| 220 | xhci_trb_clean(&trb);
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| 221 | trb.parameter = host2xhci(64, transfer->hc_buffer.phys);
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| 222 |
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| 223 | // data size (sent for OUT, or buffer size)
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| 224 | TRB_CTRL_SET_XFER_LEN(trb, transfer->batch.buffer_size);
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| 225 | // FIXME: TD size 4.11.2.4
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| 226 | TRB_CTRL_SET_TD_SIZE(trb, 1);
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| 227 |
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| 228 | // we want an interrupt after this td is done
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| 229 | TRB_CTRL_SET_IOC(trb, 1);
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| 230 |
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| 231 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
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| 232 |
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| 233 | xhci_trb_ring_t* ring = get_ring(hc, transfer);
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| 234 |
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| 235 | return xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
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| 236 | }
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| 237 |
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| 238 | static int schedule_isochronous(xhci_transfer_t* transfer)
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| 239 | {
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| 240 | endpoint_t *ep = transfer->batch.ep;
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| 241 |
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| 242 | return ep->direction == USB_DIRECTION_OUT
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| 243 | ? isoch_schedule_out(transfer)
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| 244 | : isoch_schedule_in(transfer);
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| 245 | }
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| 246 |
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| 247 | int xhci_handle_transfer_event(xhci_hc_t* hc, xhci_trb_t* trb)
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| 248 | {
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| 249 | uintptr_t addr = trb->parameter;
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| 250 | const unsigned slot_id = XHCI_DWORD_EXTRACT(trb->control, 31, 24);
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| 251 | const unsigned ep_dci = XHCI_DWORD_EXTRACT(trb->control, 20, 16);
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| 252 |
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| 253 | xhci_device_t *dev = hc->bus.devices_by_slot[slot_id];
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| 254 | if (!dev) {
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| 255 | usb_log_error("Transfer event on disabled slot %u", slot_id);
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| 256 | return ENOENT;
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| 257 | }
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| 258 |
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| 259 | const usb_endpoint_t ep_num = ep_dci / 2;
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| 260 | xhci_endpoint_t *ep = xhci_device_get_endpoint(dev, ep_num);
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| 261 | if (!ep) {
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| 262 | usb_log_error("Transfer event on dropped endpoint %u of device "
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| 263 | XHCI_DEV_FMT, ep_num, XHCI_DEV_ARGS(*dev));
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| 264 | return ENOENT;
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| 265 | }
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| 266 | // No need to add reference for endpoint, it is held by the transfer batch.
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| 267 |
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| 268 | /* FIXME: This is racy. Do we care? */
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| 269 | ep->ring.dequeue = addr;
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| 270 |
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| 271 | if (ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS) {
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| 272 | return isoch_handle_transfer_event(hc, ep, trb);
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| 273 | }
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| 274 |
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| 275 | fibril_mutex_lock(&ep->base.guard);
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| 276 | usb_transfer_batch_t *batch = ep->base.active_batch;
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| 277 | if (!batch) {
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| 278 | fibril_mutex_unlock(&ep->base.guard);
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| 279 | return ENOENT;
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| 280 | }
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| 281 |
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| 282 | const xhci_trb_completion_code_t completion_code = TRB_COMPLETION_CODE(*trb);
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| 283 | switch (completion_code) {
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| 284 | case XHCI_TRBC_SHORT_PACKET:
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| 285 | case XHCI_TRBC_SUCCESS:
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| 286 | batch->error = EOK;
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| 287 | batch->transfered_size = batch->buffer_size - TRB_TRANSFER_LENGTH(*trb);
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| 288 | break;
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| 289 |
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| 290 | default:
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| 291 | usb_log_warning("Transfer not successfull: %u", completion_code);
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| 292 | batch->error = EIO;
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| 293 | }
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| 294 |
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| 295 | endpoint_deactivate_locked(&ep->base);
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| 296 | fibril_mutex_unlock(&ep->base.guard);
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| 297 |
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| 298 | xhci_transfer_t *transfer = xhci_transfer_from_batch(batch);
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| 299 |
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| 300 | if (batch->dir == USB_DIRECTION_IN) {
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| 301 | assert(batch->buffer);
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| 302 | assert(batch->transfered_size <= batch->buffer_size);
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| 303 | memcpy(batch->buffer, transfer->hc_buffer.virt, batch->transfered_size);
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| 304 | }
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| 305 |
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| 306 | usb_transfer_batch_finish(batch);
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| 307 | return EOK;
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| 308 | }
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| 309 |
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| 310 | typedef int (*transfer_handler)(xhci_hc_t *, xhci_transfer_t *);
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| 311 |
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| 312 | static const transfer_handler transfer_handlers[] = {
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| 313 | [USB_TRANSFER_CONTROL] = schedule_control,
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| 314 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
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| 315 | [USB_TRANSFER_BULK] = schedule_bulk,
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| 316 | [USB_TRANSFER_INTERRUPT] = schedule_interrupt,
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| 317 | };
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| 318 |
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| 319 | int xhci_transfer_schedule(xhci_hc_t *hc, usb_transfer_batch_t *batch)
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| 320 | {
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| 321 | assert(hc);
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| 322 | endpoint_t *ep = batch->ep;
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| 323 |
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| 324 | xhci_transfer_t *transfer = xhci_transfer_from_batch(batch);
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| 325 | xhci_endpoint_t *xhci_ep = xhci_endpoint_get(ep);
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| 326 | xhci_device_t *xhci_dev = xhci_ep_to_dev(xhci_ep);
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| 327 |
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| 328 | // FIXME: find a better way to check if the ring is not initialized
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| 329 | if (!xhci_ep->ring.segment_count) {
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| 330 | usb_log_error("Ring not initialized for endpoint " XHCI_EP_FMT,
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| 331 | XHCI_EP_ARGS(*xhci_ep));
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| 332 | return EINVAL;
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| 333 | }
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| 334 |
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| 335 | // Isochronous transfer needs to be handled differently
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| 336 | if (batch->ep->transfer_type == USB_TRANSFER_ISOCHRONOUS) {
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| 337 | return schedule_isochronous(transfer);
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| 338 | }
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| 339 |
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| 340 | const usb_transfer_type_t type = batch->ep->transfer_type;
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| 341 | assert(transfer_handlers[type]);
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| 342 |
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| 343 | if (batch->buffer_size > 0) {
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| 344 | if (dma_buffer_alloc(&transfer->hc_buffer, batch->buffer_size))
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| 345 | return ENOMEM;
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| 346 | }
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| 347 |
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| 348 | if (batch->dir != USB_DIRECTION_IN) {
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| 349 | // Sending stuff from host to device, we need to copy the actual data.
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| 350 | memcpy(transfer->hc_buffer.virt, batch->buffer, batch->buffer_size);
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| 351 | }
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| 352 |
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| 353 | fibril_mutex_lock(&ep->guard);
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| 354 | endpoint_activate_locked(ep, batch);
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| 355 | const int err = transfer_handlers[batch->ep->transfer_type](hc, transfer);
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| 356 |
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| 357 | if (err) {
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| 358 | endpoint_deactivate_locked(ep);
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| 359 | fibril_mutex_unlock(&ep->guard);
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| 360 | return err;
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| 361 | }
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| 362 |
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| 363 | /* After the critical section, the transfer can already be finished or aborted. */
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| 364 | transfer = NULL; batch = NULL;
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| 365 | fibril_mutex_unlock(&ep->guard);
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| 366 |
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| 367 | const uint8_t slot_id = xhci_dev->slot_id;
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| 368 | const uint8_t target = xhci_endpoint_index(xhci_ep) + 1; /* EP Doorbells start at 1 */
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| 369 | hc_ring_doorbell(hc, slot_id, target);
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| 370 | return EOK;
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| 371 | }
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