1 | /*
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2 | * Copyright (c) 2017 Michal Staruch
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup drvusbxhci
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30 | * @{
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31 | */
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32 | /** @file
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33 | * @brief The host controller transfer ring management
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34 | */
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35 |
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36 | #include <usb/debug.h>
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37 | #include <usb/request.h>
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38 | #include "endpoint.h"
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39 | #include "hc.h"
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40 | #include "hw_struct/trb.h"
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41 | #include "streams.h"
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42 | #include "transfers.h"
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43 | #include "trb_ring.h"
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44 |
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45 | typedef enum {
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46 | STAGE_OUT,
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47 | STAGE_IN,
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48 | } stage_dir_flag_t;
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49 |
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50 | #define REQUEST_TYPE_DTD (0x80)
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51 | #define REQUEST_TYPE_IS_DEVICE_TO_HOST(rq) ((rq) & REQUEST_TYPE_DTD)
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52 |
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53 |
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54 | /** Get direction flag of data stage.
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55 | * See Table 7 of xHCI specification.
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56 | */
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57 | static inline stage_dir_flag_t get_status_direction_flag(xhci_trb_t* trb,
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58 | uint8_t bmRequestType, uint16_t wLength)
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59 | {
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60 | /* See Table 7 of xHCI specification */
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61 | return REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType) && (wLength > 0)
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62 | ? STAGE_OUT
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63 | : STAGE_IN;
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64 | }
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65 |
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66 | typedef enum {
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67 | DATA_STAGE_NO = 0,
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68 | DATA_STAGE_OUT = 2,
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69 | DATA_STAGE_IN = 3,
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70 | } data_stage_type_t;
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71 |
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72 | /** Get transfer type flag.
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73 | * See Table 8 of xHCI specification.
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74 | */
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75 | static inline data_stage_type_t get_transfer_type(xhci_trb_t* trb, uint8_t
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76 | bmRequestType, uint16_t wLength)
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77 | {
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78 | if (wLength == 0)
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79 | return DATA_STAGE_NO;
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80 |
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81 | /* See Table 7 of xHCI specification */
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82 | return REQUEST_TYPE_IS_DEVICE_TO_HOST(bmRequestType)
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83 | ? DATA_STAGE_IN
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84 | : DATA_STAGE_NO;
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85 | }
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86 |
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87 | static inline bool configure_endpoint_needed(usb_device_request_setup_packet_t *setup)
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88 | {
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89 | usb_request_type_t request_type = SETUP_REQUEST_TYPE_GET_TYPE(setup->request_type);
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90 |
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91 | return request_type == USB_REQUEST_TYPE_STANDARD &&
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92 | (setup->request == USB_DEVREQ_SET_CONFIGURATION
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93 | || setup->request == USB_DEVREQ_SET_INTERFACE);
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94 | }
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95 |
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96 | /**
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97 | * Create a xHCI-specific transfer batch.
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98 | *
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99 | * Bus callback.
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100 | */
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101 | usb_transfer_batch_t * xhci_transfer_create(endpoint_t* ep)
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102 | {
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103 | xhci_transfer_t *transfer = calloc(1, sizeof(xhci_transfer_t));
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104 | if (!transfer)
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105 | return NULL;
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106 |
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107 | usb_transfer_batch_init(&transfer->batch, ep);
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108 | return &transfer->batch;
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109 | }
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110 |
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111 | /**
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112 | * Destroy a xHCI transfer.
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113 | */
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114 | void xhci_transfer_destroy(usb_transfer_batch_t* batch)
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115 | {
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116 | xhci_transfer_t *transfer = xhci_transfer_from_batch(batch);
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117 |
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118 | dma_buffer_free(&transfer->hc_buffer);
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119 | free(transfer);
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120 | }
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121 |
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122 | static xhci_trb_ring_t *get_ring(xhci_transfer_t *transfer)
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123 | {
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124 | xhci_endpoint_t *xhci_ep = xhci_endpoint_get(transfer->batch.ep);
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125 | return xhci_endpoint_get_ring(xhci_ep, transfer->batch.target.stream);
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126 | }
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127 |
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128 | static int schedule_control(xhci_hc_t* hc, xhci_transfer_t* transfer)
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129 | {
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130 | usb_transfer_batch_t *batch = &transfer->batch;
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131 | xhci_endpoint_t *xhci_ep = xhci_endpoint_get(transfer->batch.ep);
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132 |
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133 | usb_device_request_setup_packet_t* setup = &batch->setup.packet;
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134 |
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135 | xhci_trb_t trbs[3];
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136 | int trbs_used = 0;
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137 |
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138 | xhci_trb_t *trb_setup = trbs + trbs_used++;
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139 | xhci_trb_clean(trb_setup);
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140 |
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141 | TRB_CTRL_SET_SETUP_WVALUE(*trb_setup, setup->value);
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142 | TRB_CTRL_SET_SETUP_WLENGTH(*trb_setup, setup->length);
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143 | TRB_CTRL_SET_SETUP_WINDEX(*trb_setup, setup->index);
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144 | TRB_CTRL_SET_SETUP_BREQ(*trb_setup, setup->request);
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145 | TRB_CTRL_SET_SETUP_BMREQTYPE(*trb_setup, setup->request_type);
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146 |
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147 | /* Size of the setup packet is always 8 */
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148 | TRB_CTRL_SET_XFER_LEN(*trb_setup, 8);
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149 |
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150 | /* Immediate data */
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151 | TRB_CTRL_SET_IDT(*trb_setup, 1);
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152 | TRB_CTRL_SET_TRB_TYPE(*trb_setup, XHCI_TRB_TYPE_SETUP_STAGE);
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153 | TRB_CTRL_SET_TRT(*trb_setup,
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154 | get_transfer_type(trb_setup, setup->request_type, setup->length));
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155 |
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156 | /* Data stage */
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157 | xhci_trb_t *trb_data = NULL;
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158 | if (setup->length > 0) {
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159 | trb_data = trbs + trbs_used++;
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160 | xhci_trb_clean(trb_data);
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161 |
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162 | trb_data->parameter = host2xhci(64, transfer->hc_buffer.phys);
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163 |
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164 | // data size (sent for OUT, or buffer size)
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165 | TRB_CTRL_SET_XFER_LEN(*trb_data, batch->buffer_size);
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166 | // FIXME: TD size 4.11.2.4
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167 | TRB_CTRL_SET_TD_SIZE(*trb_data, 1);
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168 |
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169 | // Some more fields here, no idea what they mean
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170 | TRB_CTRL_SET_TRB_TYPE(*trb_data, XHCI_TRB_TYPE_DATA_STAGE);
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171 |
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172 | int stage_dir = REQUEST_TYPE_IS_DEVICE_TO_HOST(setup->request_type)
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173 | ? STAGE_IN : STAGE_OUT;
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174 | TRB_CTRL_SET_DIR(*trb_data, stage_dir);
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175 | }
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176 |
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177 | /* Status stage */
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178 | xhci_trb_t *trb_status = trbs + trbs_used++;
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179 | xhci_trb_clean(trb_status);
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180 |
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181 | TRB_CTRL_SET_IOC(*trb_status, 1);
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182 | TRB_CTRL_SET_TRB_TYPE(*trb_status, XHCI_TRB_TYPE_STATUS_STAGE);
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183 | TRB_CTRL_SET_DIR(*trb_status, get_status_direction_flag(trb_setup,
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184 | setup->request_type, setup->length));
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185 |
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186 | // Issue a Configure Endpoint command, if needed.
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187 | if (configure_endpoint_needed(setup)) {
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188 | const int err = hc_configure_device(xhci_ep_to_dev(xhci_ep));
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189 | if (err)
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190 | return err;
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191 | }
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192 |
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193 | return xhci_trb_ring_enqueue_multiple(get_ring(transfer), trbs,
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194 | trbs_used, &transfer->interrupt_trb_phys);
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195 | }
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196 |
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197 | static int schedule_bulk(xhci_hc_t* hc, xhci_transfer_t *transfer)
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198 | {
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199 | xhci_trb_t trb;
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200 | xhci_trb_clean(&trb);
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201 | trb.parameter = host2xhci(64, transfer->hc_buffer.phys);
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202 |
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203 | // data size (sent for OUT, or buffer size)
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204 | TRB_CTRL_SET_XFER_LEN(trb, transfer->batch.buffer_size);
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205 |
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206 | /* The stream-enabled endpoints need to chain ED trb */
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207 | xhci_endpoint_t *ep = xhci_endpoint_get(transfer->batch.ep);
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208 | if (!ep->primary_stream_data_size) {
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209 | // FIXME: TD size 4.11.2.4
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210 | TRB_CTRL_SET_TD_SIZE(trb, 1);
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211 |
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212 | // we want an interrupt after this td is done
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213 | TRB_CTRL_SET_IOC(trb, 1);
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214 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
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215 |
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216 | xhci_trb_ring_t* ring = get_ring(transfer);
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217 | return xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
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218 | }
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219 | else {
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220 | TRB_CTRL_SET_TD_SIZE(trb, 2);
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221 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
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222 | TRB_CTRL_SET_CHAIN(trb, 1);
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223 | TRB_CTRL_SET_ENT(trb, 1);
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224 |
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225 | xhci_trb_ring_t* ring = get_ring(transfer);
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226 | if (!ring) {
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227 | return EINVAL;
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228 | }
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229 |
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230 | int err = xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
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231 |
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232 | if (err) {
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233 | return err;
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234 | }
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235 |
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236 | xhci_trb_clean(&trb);
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237 | trb.parameter = host2xhci(64, (uintptr_t) transfer);
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238 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_EVENT_DATA);
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239 | TRB_CTRL_SET_IOC(trb, 1);
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240 |
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241 | return xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
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242 | }
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243 | }
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244 |
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245 | static int schedule_interrupt(xhci_hc_t* hc, xhci_transfer_t* transfer)
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246 | {
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247 | xhci_trb_t trb;
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248 | xhci_trb_clean(&trb);
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249 | trb.parameter = host2xhci(64, transfer->hc_buffer.phys);
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250 |
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251 | // data size (sent for OUT, or buffer size)
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252 | TRB_CTRL_SET_XFER_LEN(trb, transfer->batch.buffer_size);
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253 | // FIXME: TD size 4.11.2.4
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254 | TRB_CTRL_SET_TD_SIZE(trb, 1);
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255 |
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256 | // we want an interrupt after this td is done
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257 | TRB_CTRL_SET_IOC(trb, 1);
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258 |
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259 | TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
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260 |
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261 | xhci_trb_ring_t* ring = get_ring(transfer);
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262 |
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263 | return xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
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264 | }
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265 |
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266 | static int schedule_isochronous(xhci_transfer_t* transfer)
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267 | {
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268 | endpoint_t *ep = transfer->batch.ep;
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269 |
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270 | return ep->direction == USB_DIRECTION_OUT
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271 | ? isoch_schedule_out(transfer)
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272 | : isoch_schedule_in(transfer);
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273 | }
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274 |
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275 | int xhci_handle_transfer_event(xhci_hc_t* hc, xhci_trb_t* trb)
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276 | {
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277 | uintptr_t addr = trb->parameter;
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278 | const unsigned slot_id = XHCI_DWORD_EXTRACT(trb->control, 31, 24);
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279 | const unsigned ep_dci = XHCI_DWORD_EXTRACT(trb->control, 20, 16);
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280 |
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281 | xhci_device_t *dev = hc->bus.devices_by_slot[slot_id];
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282 | if (!dev) {
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283 | usb_log_error("Transfer event on disabled slot %u", slot_id);
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284 | return ENOENT;
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285 | }
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286 |
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287 | const usb_endpoint_t ep_num = ep_dci / 2;
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288 | const usb_endpoint_t dir = ep_dci % 2 ? USB_DIRECTION_IN : USB_DIRECTION_OUT;
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289 | /* Creating temporary reference */
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290 | endpoint_t *ep_base = bus_find_endpoint(&dev->base, ep_num, dir);
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291 | if (!ep_base) {
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292 | usb_log_error("Transfer event on dropped endpoint %u %s of device "
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293 | XHCI_DEV_FMT, ep_num, usb_str_direction(dir), XHCI_DEV_ARGS(*dev));
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294 | return ENOENT;
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295 | }
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296 | xhci_endpoint_t *ep = xhci_endpoint_get(ep_base);
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297 |
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298 | usb_transfer_batch_t *batch;
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299 | xhci_transfer_t *transfer;
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300 |
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301 | if (TRB_EVENT_DATA(*trb)) {
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302 | /* We schedule those only when streams are involved */
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303 | assert(ep->primary_stream_ctx_array != NULL);
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304 |
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305 | /* We are received transfer pointer instead - work with that */
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306 | transfer = (xhci_transfer_t *) addr;
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307 | xhci_trb_ring_update_dequeue(get_ring(transfer),
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308 | transfer->interrupt_trb_phys);
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309 | batch = &transfer->batch;
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310 | }
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311 | else {
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312 | xhci_trb_ring_update_dequeue(&ep->ring, addr);
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313 |
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314 | if (ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS) {
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315 | isoch_handle_transfer_event(hc, ep, trb);
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316 | /* Dropping temporary reference */
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317 | endpoint_del_ref(&ep->base);
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318 | return EOK;
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319 | }
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320 |
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321 | fibril_mutex_lock(&ep->guard);
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322 | batch = ep->base.active_batch;
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323 | endpoint_deactivate_locked(&ep->base);
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324 | fibril_mutex_unlock(&ep->guard);
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325 |
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326 | if (!batch) {
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327 | /* Dropping temporary reference */
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328 | endpoint_del_ref(&ep->base);
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329 | return ENOENT;
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330 | }
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331 |
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332 | transfer = xhci_transfer_from_batch(batch);
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333 | }
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334 |
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335 | const xhci_trb_completion_code_t completion_code = TRB_COMPLETION_CODE(*trb);
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336 | switch (completion_code) {
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337 | case XHCI_TRBC_SHORT_PACKET:
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338 | case XHCI_TRBC_SUCCESS:
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339 | batch->error = EOK;
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340 | batch->transferred_size = batch->buffer_size - TRB_TRANSFER_LENGTH(*trb);
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341 | break;
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342 |
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343 | case XHCI_TRBC_DATA_BUFFER_ERROR:
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344 | usb_log_warning("Transfer ended with data buffer error.");
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345 | batch->error = EAGAIN;
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346 | batch->transferred_size = 0;
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347 | break;
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348 |
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349 | case XHCI_TRBC_BABBLE_DETECTED_ERROR:
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350 | usb_log_warning("Babble detected during the transfer.");
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351 | batch->error = EAGAIN;
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352 | batch->transferred_size = 0;
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353 | break;
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354 |
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355 | case XHCI_TRBC_USB_TRANSACTION_ERROR:
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356 | usb_log_warning("USB Transaction error.");
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357 | batch->error = EAGAIN;
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358 | batch->transferred_size = 0;
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359 | break;
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360 |
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361 | case XHCI_TRBC_TRB_ERROR:
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362 | usb_log_error("Invalid transfer parameters.");
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363 | batch->error = EINVAL;
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364 | batch->transferred_size = 0;
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365 | break;
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366 |
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367 | case XHCI_TRBC_STALL_ERROR:
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368 | usb_log_warning("Stall condition detected.");
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369 | batch->error = ESTALL;
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370 | batch->transferred_size = 0;
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371 | break;
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372 |
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373 | case XHCI_TRBC_SPLIT_TRANSACTION_ERROR:
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374 | usb_log_error("Split transcation error detected.");
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375 | batch->error = EAGAIN;
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376 | batch->transferred_size = 0;
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377 | break;
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378 |
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379 | default:
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380 | usb_log_warning("Transfer not successfull: %u", completion_code);
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381 | batch->error = EIO;
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382 | }
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383 |
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384 | if (batch->dir == USB_DIRECTION_IN) {
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385 | assert(batch->buffer);
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386 | assert(batch->transferred_size <= batch->buffer_size);
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387 | memcpy(batch->buffer, transfer->hc_buffer.virt, batch->transferred_size);
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388 | }
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389 |
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390 | usb_transfer_batch_finish(batch);
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391 | /* Dropping temporary reference */
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392 | endpoint_del_ref(&ep->base);
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393 | return EOK;
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394 | }
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395 |
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396 | typedef int (*transfer_handler)(xhci_hc_t *, xhci_transfer_t *);
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397 |
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398 | static const transfer_handler transfer_handlers[] = {
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399 | [USB_TRANSFER_CONTROL] = schedule_control,
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400 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
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401 | [USB_TRANSFER_BULK] = schedule_bulk,
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402 | [USB_TRANSFER_INTERRUPT] = schedule_interrupt,
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403 | };
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404 |
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405 | /**
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406 | * Schedule a batch for xHC.
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407 | *
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408 | * Bus callback.
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409 | */
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410 | int xhci_transfer_schedule(usb_transfer_batch_t *batch)
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411 | {
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412 | endpoint_t *ep = batch->ep;
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413 |
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414 | xhci_hc_t *hc = bus_to_hc(endpoint_get_bus(batch->ep));
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415 | xhci_transfer_t *transfer = xhci_transfer_from_batch(batch);
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416 | xhci_endpoint_t *xhci_ep = xhci_endpoint_get(ep);
|
---|
417 | xhci_device_t *xhci_dev = xhci_ep_to_dev(xhci_ep);
|
---|
418 |
|
---|
419 | if (!batch->target.address) {
|
---|
420 | usb_log_error("Attempted to schedule transfer to address 0.");
|
---|
421 | return EINVAL;
|
---|
422 | }
|
---|
423 |
|
---|
424 | // FIXME: find a better way to check if the ring is not initialized
|
---|
425 | if (!xhci_ep->ring.segment_count) {
|
---|
426 | usb_log_error("Ring not initialized for endpoint " XHCI_EP_FMT,
|
---|
427 | XHCI_EP_ARGS(*xhci_ep));
|
---|
428 | return EINVAL;
|
---|
429 | }
|
---|
430 |
|
---|
431 | // Isochronous transfer needs to be handled differently
|
---|
432 | if (batch->ep->transfer_type == USB_TRANSFER_ISOCHRONOUS) {
|
---|
433 | return schedule_isochronous(transfer);
|
---|
434 | }
|
---|
435 |
|
---|
436 | const usb_transfer_type_t type = batch->ep->transfer_type;
|
---|
437 | assert(transfer_handlers[type]);
|
---|
438 |
|
---|
439 | if (batch->buffer_size > 0) {
|
---|
440 | if (dma_buffer_alloc(&transfer->hc_buffer, batch->buffer_size))
|
---|
441 | return ENOMEM;
|
---|
442 | }
|
---|
443 |
|
---|
444 | if (batch->dir != USB_DIRECTION_IN) {
|
---|
445 | // Sending stuff from host to device, we need to copy the actual data.
|
---|
446 | memcpy(transfer->hc_buffer.virt, batch->buffer, batch->buffer_size);
|
---|
447 | }
|
---|
448 |
|
---|
449 | /*
|
---|
450 | * If this is a ClearFeature(ENDPOINT_HALT) request, we have to issue
|
---|
451 | * the Reset Endpoint command.
|
---|
452 | */
|
---|
453 | if (batch->ep->transfer_type == USB_TRANSFER_CONTROL
|
---|
454 | && batch->dir == USB_DIRECTION_OUT) {
|
---|
455 | const usb_device_request_setup_packet_t *request = &batch->setup.packet;
|
---|
456 | if (request->request == USB_DEVREQ_CLEAR_FEATURE
|
---|
457 | && request->request_type == USB_REQUEST_RECIPIENT_ENDPOINT
|
---|
458 | && request->value == USB_FEATURE_ENDPOINT_HALT) {
|
---|
459 | const uint16_t index = uint16_usb2host(request->index);
|
---|
460 | const usb_endpoint_t ep_num = index & 0xf;
|
---|
461 | const usb_direction_t dir = (index >> 7)
|
---|
462 | ? USB_DIRECTION_IN
|
---|
463 | : USB_DIRECTION_OUT;
|
---|
464 | endpoint_t *halted_ep = bus_find_endpoint(&xhci_dev->base, ep_num, dir);
|
---|
465 | if (halted_ep) {
|
---|
466 | /*
|
---|
467 | * TODO: Find out how to come up with stream_id. It might be
|
---|
468 | * possible that we have to clear all of them.
|
---|
469 | */
|
---|
470 | const int err = xhci_endpoint_clear_halt(xhci_endpoint_get(halted_ep), 0);
|
---|
471 | endpoint_del_ref(halted_ep);
|
---|
472 | if (err) {
|
---|
473 | /*
|
---|
474 | * The endpoint halt condition failed to be cleared in HC.
|
---|
475 | * As it does not make sense to send the reset to the device
|
---|
476 | * itself, return as unschedulable answer.
|
---|
477 | *
|
---|
478 | * Furthermore, if this is a request to clear EP 0 stall, it
|
---|
479 | * would be gone forever, as the endpoint is halted.
|
---|
480 | */
|
---|
481 | return err;
|
---|
482 | }
|
---|
483 | } else {
|
---|
484 | usb_log_warning("Device(%u): Resetting unregistered endpoint"
|
---|
485 | " %u %s.", xhci_dev->base.address, ep_num,
|
---|
486 | usb_str_direction(dir));
|
---|
487 | }
|
---|
488 | }
|
---|
489 | }
|
---|
490 |
|
---|
491 |
|
---|
492 | int err;
|
---|
493 | fibril_mutex_lock(&xhci_ep->guard);
|
---|
494 |
|
---|
495 | if ((err = endpoint_activate_locked(ep, batch))) {
|
---|
496 | fibril_mutex_unlock(&xhci_ep->guard);
|
---|
497 | return err;
|
---|
498 | }
|
---|
499 |
|
---|
500 | if ((err = transfer_handlers[batch->ep->transfer_type](hc, transfer))) {
|
---|
501 | endpoint_deactivate_locked(ep);
|
---|
502 | fibril_mutex_unlock(&xhci_ep->guard);
|
---|
503 | return err;
|
---|
504 | }
|
---|
505 |
|
---|
506 | hc_ring_ep_doorbell(xhci_ep, batch->target.stream);
|
---|
507 | fibril_mutex_unlock(&xhci_ep->guard);
|
---|
508 | return EOK;
|
---|
509 | }
|
---|