source: mainline/uspace/drv/bus/usb/xhci/transfers.c@ 7e74911

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 7e74911 was 7e74911, checked in by Petr Manek <petr.manek@…>, 8 years ago

Delegated transfer block recycling to the kernel frame allocator. Removed most of the dequeue mechanism.

  • Property mode set to 100644
File size: 8.4 KB
Line 
1/*
2 * Copyright (c) 2017 Michal Staruch
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller transfer ring management
34 */
35
36#include <usb/host/utils/malloc32.h>
37#include <usb/debug.h>
38#include "hc.h"
39#include "hw_struct/trb.h"
40#include "transfers.h"
41#include "trb_ring.h"
42
43static inline uint8_t get_transfer_type(xhci_trb_t* trb, uint8_t bmRequestType, uint16_t wLength)
44{
45 /* See Table 7 of xHCI specification */
46 if (bmRequestType & 0x80) {
47 /* Device-to-host transfer */
48 if (wLength) {
49 /* IN data stage */
50 return 3;
51 }
52 else {
53 /* No data stage */
54 return 0;
55 }
56 }
57 else {
58 /* Host-to-device transfer */
59 if (wLength) {
60 /* OUT data stage */
61 return 2;
62 }
63 else {
64 /* No data stage */
65 return 0;
66 }
67 }
68}
69
70static inline uint8_t get_data_direction(xhci_trb_t* trb, uint8_t bmRequestType, uint16_t wLength)
71{
72 /* See Table 7 of xHCI specification */
73 if (bmRequestType & 0x80) {
74 /* Device-to-host transfer */
75 return 1;
76 }
77 else {
78 /* Host-to-device transfer */
79 return 0;
80 }
81}
82
83static inline uint8_t get_status_direction(xhci_trb_t* trb, uint8_t bmRequestType, uint16_t wLength)
84{
85 /* See Table 7 of xHCI specification */
86 if (bmRequestType & 0x80) {
87 /* Device-to-host transfer */
88 if (wLength) {
89 /* Out direction */
90 return 0;
91 }
92 else {
93 /* In direction */
94 return 1;
95 }
96 }
97 else {
98 /* Host-to-device transfer, always IN direction */
99 return 1;
100 }
101}
102
103int xhci_init_transfers(xhci_hc_t *hc)
104{
105 assert(hc);
106
107 list_initialize(&hc->transfers);
108 return EOK;
109}
110
111void xhci_fini_transfers(xhci_hc_t *hc)
112{
113 // Note: Untested.
114 assert(hc);
115}
116
117xhci_transfer_t* xhci_transfer_alloc(usb_transfer_batch_t* batch) {
118 xhci_transfer_t* transfer = malloc(sizeof(xhci_transfer_t));
119 if (!transfer)
120 return NULL;
121
122 memset(transfer, 0, sizeof(xhci_transfer_t));
123 transfer->batch = batch;
124 link_initialize(&transfer->link);
125 transfer->hc_buffer = malloc32(batch->buffer_size);
126
127 return transfer;
128}
129
130void xhci_transfer_fini(xhci_transfer_t* transfer) {
131 if (transfer) {
132 free32(transfer->hc_buffer);
133 free(transfer);
134 }
135}
136
137int xhci_schedule_control_transfer(xhci_hc_t* hc, usb_transfer_batch_t* batch)
138{
139 if (!batch->setup_size) {
140 usb_log_error("Missing setup packet for the control transfer.");
141 return EINVAL;
142 }
143 if (batch->ep->endpoint != 0 || batch->ep->transfer_type != USB_TRANSFER_CONTROL) {
144 /* This method only works for control transfers. */
145 usb_log_error("Attempted to schedule control transfer to non 0 endpoint.");
146 return EINVAL;
147 }
148
149 uint8_t slot_id = batch->ep->hc_data.slot_id;
150 xhci_trb_ring_t* ring = hc->dcbaa_virt[slot_id].trs[0];
151
152 usb_device_request_setup_packet_t* setup =
153 (usb_device_request_setup_packet_t*) batch->setup_buffer;
154
155 /* For the TRB formats, see xHCI specification 6.4.1.2 */
156 xhci_transfer_t *transfer = xhci_transfer_alloc(batch);
157 memcpy(transfer->hc_buffer, batch->buffer, batch->buffer_size);
158
159 xhci_trb_t trb_setup;
160 memset(&trb_setup, 0, sizeof(xhci_trb_t));
161
162 TRB_CTRL_SET_SETUP_WVALUE(trb_setup, setup->value);
163 TRB_CTRL_SET_SETUP_WLENGTH(trb_setup, setup->length);
164 TRB_CTRL_SET_SETUP_WINDEX(trb_setup, setup->index);
165 TRB_CTRL_SET_SETUP_BREQ(trb_setup, setup->request);
166 TRB_CTRL_SET_SETUP_BMREQTYPE(trb_setup, setup->request_type);
167
168 /* Size of the setup packet is always 8 */
169 TRB_CTRL_SET_XFER_LEN(trb_setup, 8);
170 // if we want an interrupt after this td is done, use
171 // TRB_CTRL_SET_IOC(trb_setup, 1);
172
173 /* Immediate data */
174 TRB_CTRL_SET_IDT(trb_setup, 1);
175 TRB_CTRL_SET_TRB_TYPE(trb_setup, XHCI_TRB_TYPE_SETUP_STAGE);
176 TRB_CTRL_SET_TRT(trb_setup, get_transfer_type(&trb_setup, setup->request_type, setup->length));
177
178 /* Data stage */
179 xhci_trb_t trb_data;
180 memset(&trb_data, 0, sizeof(xhci_trb_t));
181
182 if (setup->length > 0) {
183 trb_data.parameter = addr_to_phys(transfer->hc_buffer);
184
185 // data size (sent for OUT, or buffer size)
186 TRB_CTRL_SET_XFER_LEN(trb_data, batch->buffer_size);
187 // FIXME: TD size 4.11.2.4
188 TRB_CTRL_SET_TD_SIZE(trb_data, 1);
189
190 // if we want an interrupt after this td is done, use
191 // TRB_CTRL_SET_IOC(trb_data, 1);
192
193 // Some more fields here, no idea what they mean
194 TRB_CTRL_SET_TRB_TYPE(trb_data, XHCI_TRB_TYPE_DATA_STAGE);
195
196 transfer->direction = get_data_direction(&trb_setup, setup->request_type, setup->length);
197 TRB_CTRL_SET_DIR(trb_data, transfer->direction);
198 }
199
200 /* Status stage */
201 xhci_trb_t trb_status;
202 memset(&trb_status, 0, sizeof(xhci_trb_t));
203
204 // FIXME: Evaluate next TRB? 4.12.3
205 // TRB_CTRL_SET_ENT(trb_status, 1);
206
207 // if we want an interrupt after this td is done, use
208 TRB_CTRL_SET_IOC(trb_status, 1);
209
210 TRB_CTRL_SET_TRB_TYPE(trb_status, XHCI_TRB_TYPE_STATUS_STAGE);
211 TRB_CTRL_SET_DIR(trb_status, get_status_direction(&trb_setup, setup->request_type, setup->length));
212
213 uintptr_t dummy = 0;
214 xhci_trb_ring_enqueue(ring, &trb_setup, &dummy);
215 if (setup->length > 0) {
216 xhci_trb_ring_enqueue(ring, &trb_data, &dummy);
217 }
218 xhci_trb_ring_enqueue(ring, &trb_status, &transfer->interrupt_trb_phys);
219
220 list_append(&transfer->link, &hc->transfers);
221
222 /* For control transfers, the target is always 1. */
223 hc_ring_doorbell(hc, slot_id, 1);
224 return EOK;
225}
226
227int xhci_schedule_bulk_transfer(xhci_hc_t* hc, usb_transfer_batch_t* batch) {
228 if (batch->setup_size) {
229 usb_log_warning("Setup packet present for a bulk transfer.");
230 }
231
232 uint8_t slot_id = batch->ep->hc_data.slot_id;
233 xhci_trb_ring_t* ring = hc->dcbaa_virt[slot_id].trs[batch->ep->endpoint];
234
235 xhci_transfer_t *transfer = xhci_transfer_alloc(batch);
236 memcpy(transfer->hc_buffer, batch->buffer, batch->buffer_size);
237
238 xhci_trb_t trb;
239 memset(&trb, 0, sizeof(xhci_trb_t));
240 trb.parameter = addr_to_phys(transfer->hc_buffer);
241
242 // data size (sent for OUT, or buffer size)
243 TRB_CTRL_SET_XFER_LEN(trb, batch->buffer_size);
244 // FIXME: TD size 4.11.2.4
245 TRB_CTRL_SET_TD_SIZE(trb, 1);
246
247 // we want an interrupt after this td is done
248 TRB_CTRL_SET_IOC(trb, 1);
249
250 TRB_CTRL_SET_TRB_TYPE(trb, XHCI_TRB_TYPE_NORMAL);
251
252 xhci_trb_ring_enqueue(ring, &trb, &transfer->interrupt_trb_phys);
253 list_append(&transfer->link, &hc->transfers);
254
255 /* For control transfers, the target is always 1. */
256 hc_ring_doorbell(hc, slot_id, 1);
257 return EOK;
258}
259
260int xhci_handle_transfer_event(xhci_hc_t* hc, xhci_trb_t* trb)
261{
262 uintptr_t addr = trb->parameter;
263 xhci_transfer_t *transfer = NULL;
264
265 link_t *transfer_link = list_first(&hc->transfers);
266 while (transfer_link) {
267 transfer = list_get_instance(transfer_link, xhci_transfer_t, link);
268
269 if (transfer->interrupt_trb_phys == addr)
270 break;
271
272 transfer_link = list_next(transfer_link, &hc->transfers);
273 }
274
275 if (!transfer_link) {
276 usb_log_warning("Transfer not found.");
277 return ENOENT;
278 }
279
280 list_remove(transfer_link);
281 usb_transfer_batch_t *batch = transfer->batch;
282
283 batch->error = (TRB_COMPLETION_CODE(*trb) == XHCI_TRBC_SUCCESS) ? EOK : ENAK;
284 batch->transfered_size = batch->buffer_size - TRB_TRANSFER_LENGTH(*trb);
285 if (transfer->direction) {
286 /* Device-to-host, IN */
287 if (batch->callback_in)
288 batch->callback_in(batch->error, batch->transfered_size, batch->arg);
289 }
290 else {
291 /* Host-to-device, OUT */
292 if (batch->callback_out)
293 batch->callback_out(batch->error, batch->arg);
294 }
295
296 xhci_transfer_fini(transfer);
297 return EOK;
298}
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