source: mainline/uspace/drv/bus/usb/xhci/hc.h@ 9f5b613

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9f5b613 was 110d795, checked in by Jaroslav Jindrak <dzejrou@…>, 8 years ago

Overhauled command system, not a special structure is passed that can be kept and polled for completion.

  • Property mode set to 100644
File size: 2.9 KB
Line 
1/*
2 * Copyright (c) 2017 Ondrej Hlavaty
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller data bookkeeping.
34 */
35
36#ifndef XHCI_HC_H
37#define XHCI_HC_H
38
39#include <usb/host/usb_transfer_batch.h>
40#include "hw_struct/regs.h"
41#include "hw_struct/context.h"
42#include "scratchpad.h"
43#include "trb_ring.h"
44
45/**
46 * xHCI lets the controller define speeds of ports it controls.
47 */
48typedef struct xhci_port_speed {
49 uint64_t rx_bps, tx_bps;
50} xhci_port_speed_t;
51
52typedef struct xhci_hc {
53 /* MMIO range */
54 addr_range_t mmio_range;
55 void *base;
56
57 /* Mapped register sets */
58 xhci_cap_regs_t *cap_regs;
59 xhci_op_regs_t *op_regs;
60 xhci_rt_regs_t *rt_regs;
61 xhci_doorbell_t *db_arry;
62 xhci_extcap_t *xecp; /**< First extended capability */
63 xhci_legsup_t *legsup; /**< Legacy support capability */
64
65 /* Structures in allocated memory */
66 xhci_trb_ring_t command_ring;
67 xhci_event_ring_t event_ring;
68 xhci_device_ctx_t **dcbaa;
69 xhci_scratchpad_t *scratchpad;
70
71 /* Cached capabilities */
72 xhci_port_speed_t speeds [16];
73 unsigned max_slots;
74 bool ac64;
75
76 /* Command list */
77 list_t commands;
78} xhci_hc_t;
79
80int hc_init_mmio(xhci_hc_t *, const hw_res_list_parsed_t *);
81int hc_init_memory(xhci_hc_t *);
82int hc_claim(xhci_hc_t *, ddf_dev_t *);
83int hc_irq_code_gen(irq_code_t *, xhci_hc_t *, const hw_res_list_parsed_t *);
84int hc_start(xhci_hc_t *, bool);
85int hc_schedule(xhci_hc_t *hc, usb_transfer_batch_t *batch);
86int hc_status(xhci_hc_t *, uint32_t *);
87void hc_interrupt(xhci_hc_t *, uint32_t);
88void hc_fini(xhci_hc_t *);
89
90#endif
91
92/**
93 * @}
94 */
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