| 1 | /*
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| 2 | * Copyright (c) 2017 Ondrej Hlavaty
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief The host controller data bookkeeping.
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| 34 | */
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| 35 |
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| 36 | #ifndef XHCI_HC_H
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| 37 | #define XHCI_HC_H
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| 38 |
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| 39 | #include <fibril_synch.h>
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| 40 | #include <usb/host/usb_transfer_batch.h>
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| 41 | #include "hw_struct/regs.h"
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| 42 | #include "hw_struct/context.h"
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| 43 | #include "scratchpad.h"
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| 44 | #include "trb_ring.h"
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| 45 |
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| 46 | #include "rh.h"
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| 47 | #include "commands.h"
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| 48 | #include "bus.h"
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| 49 |
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| 50 | typedef struct xhci_command xhci_cmd_t;
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| 51 |
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| 52 | typedef struct xhci_hc {
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| 53 | /** Common HC device header */
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| 54 | hc_device_t base;
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| 55 |
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| 56 | /* MMIO range */
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| 57 | addr_range_t mmio_range;
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| 58 |
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| 59 | /* Mapped register sets */
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| 60 | void *reg_base;
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| 61 | xhci_cap_regs_t *cap_regs;
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| 62 | xhci_op_regs_t *op_regs;
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| 63 | xhci_rt_regs_t *rt_regs;
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| 64 | xhci_doorbell_t *db_arry;
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| 65 | xhci_extcap_t *xecp; /**< First extended capability */
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| 66 | xhci_legsup_t *legsup; /**< Legacy support capability */
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| 67 |
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| 68 | /* Structures in allocated memory */
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| 69 | xhci_event_ring_t event_ring;
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| 70 | uint64_t *dcbaa;
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| 71 | dma_buffer_t dcbaa_dma;
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| 72 | dma_buffer_t scratchpad_array;
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| 73 |
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| 74 | /* Command ring management */
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| 75 | xhci_cmd_ring_t cr;
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| 76 |
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| 77 | /* Root hub emulation */
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| 78 | xhci_rh_t rh;
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| 79 |
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| 80 | /* Bus bookkeeping */
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| 81 | xhci_bus_t bus;
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| 82 |
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| 83 | /* Cached capabilities */
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| 84 | unsigned max_slots;
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| 85 | bool ac64;
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| 86 | unsigned ist; /**< IST in microframes */
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| 87 |
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| 88 | /** Port speed mapping */
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| 89 | xhci_port_speed_t speeds [16];
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| 90 | uint8_t speed_to_psiv [USB_SPEED_MAX];
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| 91 | } xhci_hc_t;
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| 92 |
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| 93 | static inline xhci_hc_t *bus_to_hc(bus_t *bus)
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| 94 | {
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| 95 | assert(bus);
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| 96 | return member_to_inst(bus, xhci_hc_t, bus);
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| 97 | }
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| 98 |
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| 99 | typedef struct xhci_endpoint xhci_endpoint_t;
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| 100 | typedef struct xhci_device xhci_device_t;
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| 101 |
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| 102 | int hc_init_mmio(xhci_hc_t *, const hw_res_list_parsed_t *);
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| 103 | int hc_init_memory(xhci_hc_t *, ddf_dev_t *);
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| 104 | int hc_claim(xhci_hc_t *, ddf_dev_t *);
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| 105 | int hc_irq_code_gen(irq_code_t *, xhci_hc_t *, const hw_res_list_parsed_t *);
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| 106 | int hc_start(xhci_hc_t *, bool);
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| 107 | void hc_fini(xhci_hc_t *);
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| 108 | void hc_ring_doorbell(xhci_hc_t *, unsigned, unsigned);
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| 109 | int hc_enable_slot(xhci_hc_t *, uint32_t *);
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| 110 | int hc_disable_slot(xhci_hc_t *, xhci_device_t *);
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| 111 | int hc_address_device(xhci_hc_t *, xhci_device_t *, xhci_endpoint_t *);
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| 112 | int hc_configure_device(xhci_hc_t *, uint32_t);
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| 113 | int hc_deconfigure_device(xhci_hc_t *, uint32_t);
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| 114 | int hc_add_endpoint(xhci_hc_t *, uint32_t, uint8_t, xhci_ep_ctx_t *);
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| 115 | int hc_drop_endpoint(xhci_hc_t *, uint32_t, uint8_t);
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| 116 | int hc_update_endpoint(xhci_hc_t *, uint32_t, uint8_t, xhci_ep_ctx_t *);
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| 117 |
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| 118 | int hc_status(bus_t *, uint32_t *);
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| 119 | void hc_interrupt(bus_t *, uint32_t);
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| 120 |
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| 121 | #endif
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| 122 |
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| 123 | /**
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| 124 | * @}
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| 125 | */
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