1 | /*
|
---|
2 | * Copyright (c) 2017 Ondrej Hlavaty
|
---|
3 | * All rights reserved.
|
---|
4 | *
|
---|
5 | * Redistribution and use in source and binary forms, with or without
|
---|
6 | * modification, are permitted provided that the following conditions
|
---|
7 | * are met:
|
---|
8 | *
|
---|
9 | * - Redistributions of source code must retain the above copyright
|
---|
10 | * notice, this list of conditions and the following disclaimer.
|
---|
11 | * - Redistributions in binary form must reproduce the above copyright
|
---|
12 | * notice, this list of conditions and the following disclaimer in the
|
---|
13 | * documentation and/or other materials provided with the distribution.
|
---|
14 | * - The name of the author may not be used to endorse or promote products
|
---|
15 | * derived from this software without specific prior written permission.
|
---|
16 | *
|
---|
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
---|
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
---|
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
---|
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
---|
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
---|
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
---|
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
---|
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
---|
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
---|
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
27 | */
|
---|
28 |
|
---|
29 | /** @addtogroup drvusbxhci
|
---|
30 | * @{
|
---|
31 | */
|
---|
32 | /** @file
|
---|
33 | * @brief The host controller data bookkeeping.
|
---|
34 | */
|
---|
35 |
|
---|
36 | #ifndef XHCI_HC_H
|
---|
37 | #define XHCI_HC_H
|
---|
38 |
|
---|
39 | #include <fibril_synch.h>
|
---|
40 | #include <usb/host/usb_transfer_batch.h>
|
---|
41 | #include <usb/host/utility.h>
|
---|
42 | #include "hw_struct/regs.h"
|
---|
43 | #include "hw_struct/context.h"
|
---|
44 | #include "scratchpad.h"
|
---|
45 | #include "trb_ring.h"
|
---|
46 |
|
---|
47 | #include "rh.h"
|
---|
48 | #include "commands.h"
|
---|
49 | #include "bus.h"
|
---|
50 |
|
---|
51 | typedef struct xhci_command xhci_cmd_t;
|
---|
52 |
|
---|
53 | typedef struct xhci_hc {
|
---|
54 | /** Common HC device header */
|
---|
55 | hc_device_t base;
|
---|
56 |
|
---|
57 | /* MMIO range */
|
---|
58 | addr_range_t mmio_range;
|
---|
59 |
|
---|
60 | /* Mapped register sets */
|
---|
61 | void *reg_base;
|
---|
62 | xhci_cap_regs_t *cap_regs;
|
---|
63 | xhci_op_regs_t *op_regs;
|
---|
64 | xhci_rt_regs_t *rt_regs;
|
---|
65 | xhci_doorbell_t *db_arry;
|
---|
66 | xhci_extcap_t *xecp; /**< First extended capability */
|
---|
67 | xhci_legsup_t *legsup; /**< Legacy support capability */
|
---|
68 |
|
---|
69 | /* Structures in allocated memory */
|
---|
70 | xhci_event_ring_t event_ring;
|
---|
71 | uint64_t *dcbaa;
|
---|
72 | dma_buffer_t dcbaa_dma;
|
---|
73 | dma_buffer_t scratchpad_array;
|
---|
74 |
|
---|
75 | /* Command ring management */
|
---|
76 | xhci_cmd_ring_t cr;
|
---|
77 |
|
---|
78 | /* Buffer for events */
|
---|
79 | xhci_sw_ring_t sw_ring;
|
---|
80 |
|
---|
81 | /** Event handling fibril */
|
---|
82 | joinable_fibril_t *event_worker;
|
---|
83 |
|
---|
84 | /* Root hub emulation */
|
---|
85 | xhci_rh_t rh;
|
---|
86 |
|
---|
87 | /* Bus bookkeeping */
|
---|
88 | xhci_bus_t bus;
|
---|
89 |
|
---|
90 | /* Fibril that is currently hanling events */
|
---|
91 | fid_t event_handler;
|
---|
92 |
|
---|
93 | /* Cached capabilities */
|
---|
94 | unsigned max_slots;
|
---|
95 | bool ac64;
|
---|
96 | bool csz;
|
---|
97 | uint64_t wrap_time; /** The last time when mfindex wrap happened */
|
---|
98 | uint64_t wrap_count; /** Amount of mfindex wraps HC has done */
|
---|
99 | unsigned ist; /**< IST in microframes */
|
---|
100 |
|
---|
101 | /** Port speed mapping */
|
---|
102 | xhci_port_speed_t speeds [16];
|
---|
103 | } xhci_hc_t;
|
---|
104 |
|
---|
105 | static inline xhci_hc_t *bus_to_hc(bus_t *bus)
|
---|
106 | {
|
---|
107 | assert(bus);
|
---|
108 | return member_to_inst(bus, xhci_hc_t, bus);
|
---|
109 | }
|
---|
110 |
|
---|
111 | typedef struct xhci_endpoint xhci_endpoint_t;
|
---|
112 | typedef struct xhci_device xhci_device_t;
|
---|
113 |
|
---|
114 | extern int hc_init_mmio(xhci_hc_t *, const hw_res_list_parsed_t *);
|
---|
115 | extern int hc_init_memory(xhci_hc_t *, ddf_dev_t *);
|
---|
116 | extern int hc_claim(xhci_hc_t *, ddf_dev_t *);
|
---|
117 | extern int hc_irq_code_gen(irq_code_t *, xhci_hc_t *, const hw_res_list_parsed_t *, int *);
|
---|
118 | extern int hc_start(xhci_hc_t *, bool);
|
---|
119 | extern void hc_fini(xhci_hc_t *);
|
---|
120 |
|
---|
121 | extern void hc_ring_doorbell(xhci_hc_t *, unsigned, unsigned);
|
---|
122 | extern void hc_ring_ep_doorbell(xhci_endpoint_t *, uint32_t);
|
---|
123 | extern unsigned hc_speed_to_psiv(usb_speed_t);
|
---|
124 |
|
---|
125 | extern int hc_enable_slot(xhci_device_t *);
|
---|
126 | extern int hc_disable_slot(xhci_device_t *);
|
---|
127 | extern int hc_address_device(xhci_device_t *);
|
---|
128 | extern int hc_configure_device(xhci_device_t *);
|
---|
129 | extern int hc_deconfigure_device(xhci_device_t *);
|
---|
130 | extern int hc_add_endpoint(xhci_endpoint_t *);
|
---|
131 | extern int hc_drop_endpoint(xhci_endpoint_t *);
|
---|
132 | extern int hc_update_endpoint(xhci_endpoint_t *);
|
---|
133 | extern int hc_stop_endpoint(xhci_endpoint_t *);
|
---|
134 | extern int hc_reset_endpoint(xhci_endpoint_t *);
|
---|
135 | extern int hc_reset_ring(xhci_endpoint_t *, uint32_t);
|
---|
136 |
|
---|
137 | extern int hc_status(bus_t *, uint32_t *);
|
---|
138 | extern void hc_interrupt(bus_t *, uint32_t);
|
---|
139 |
|
---|
140 | #endif
|
---|
141 |
|
---|
142 | /**
|
---|
143 | * @}
|
---|
144 | */
|
---|