source: mainline/uspace/drv/bus/usb/xhci/endpoint.c@ eb862fd

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since eb862fd was eb862fd, checked in by Jenda <jenda.jzqk73@…>, 8 years ago

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1/*
2 * Copyright (c) 2017 Petr Manek
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief The host controller endpoint management.
34 */
35
36#include <usb/host/endpoint.h>
37#include <usb/descriptor.h>
38
39#include <errno.h>
40#include <macros.h>
41#include <str_error.h>
42
43#include "hc.h"
44#include "bus.h"
45#include "commands.h"
46#include "device.h"
47#include "endpoint.h"
48#include "streams.h"
49
50static errno_t alloc_transfer_ds(xhci_endpoint_t *);
51
52/**
53 * Initialize new XHCI endpoint.
54 * @param[in] xhci_ep Allocated XHCI endpoint to initialize.
55 * @param[in] dev Device, to which the endpoint belongs.
56 * @param[in] desc USB endpoint descriptor carrying configuration data.
57 *
58 * @return Error code.
59 */
60static errno_t xhci_endpoint_init(xhci_endpoint_t *xhci_ep, device_t *dev,
61 const usb_endpoint_descriptors_t *desc)
62{
63 errno_t rc;
64 assert(xhci_ep);
65
66 endpoint_t *ep = &xhci_ep->base;
67
68 endpoint_init(ep, dev, desc);
69
70 fibril_mutex_initialize(&xhci_ep->guard);
71
72 xhci_ep->max_burst = desc->companion.max_burst + 1;
73
74 if (ep->transfer_type == USB_TRANSFER_BULK)
75 xhci_ep->max_streams = 1 << (USB_SSC_MAX_STREAMS(desc->companion));
76 else
77 xhci_ep->max_streams = 1;
78
79 if (ep->transfer_type == USB_TRANSFER_ISOCHRONOUS)
80 xhci_ep->mult = USB_SSC_MULT(desc->companion) + 1;
81 else
82 xhci_ep->mult = 1;
83
84 /*
85 * In USB 3, the semantics of wMaxPacketSize changed. Now the number of
86 * packets per service interval is determined from max_burst and mult.
87 */
88 if (dev->speed >= USB_SPEED_SUPER) {
89 ep->packets_per_uframe = xhci_ep->max_burst * xhci_ep->mult;
90 if (ep->transfer_type == USB_TRANSFER_ISOCHRONOUS
91 || ep->transfer_type == USB_TRANSFER_INTERRUPT) {
92 ep->max_transfer_size = ep->max_packet_size * ep->packets_per_uframe;
93 }
94 else {
95 ep->max_transfer_size = 200 * PAGE_SIZE;
96 }
97 }
98
99 xhci_ep->interval = desc->endpoint.poll_interval;
100
101 /*
102 * Only Low/Full speed interrupt endpoints have interval as a linear field,
103 * others have 2-based log of it.
104 */
105 if (dev->speed >= USB_SPEED_HIGH
106 || ep->transfer_type != USB_TRANSFER_INTERRUPT) {
107 xhci_ep->interval = 1 << (xhci_ep->interval - 1);
108 }
109
110 /* Full speed devices have interval in frames */
111 if (dev->speed <= USB_SPEED_FULL) {
112 xhci_ep->interval *= 8;
113 }
114
115 if (xhci_ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS)
116 isoch_init(xhci_ep, desc);
117
118 if ((rc = alloc_transfer_ds(xhci_ep)))
119 goto err;
120
121 return EOK;
122
123err:
124 return rc;
125}
126
127/**
128 * Create a new xHCI endpoint structure.
129 *
130 * Bus callback.
131 */
132endpoint_t *xhci_endpoint_create(device_t *dev,
133 const usb_endpoint_descriptors_t *desc)
134{
135 const usb_transfer_type_t type = USB_ED_GET_TRANSFER_TYPE(desc->endpoint);
136
137 xhci_endpoint_t *ep = calloc(1, sizeof(xhci_endpoint_t)
138 + (type == USB_TRANSFER_ISOCHRONOUS) * sizeof(*ep->isoch));
139 if (!ep)
140 return NULL;
141
142 if (xhci_endpoint_init(ep, dev, desc)) {
143 free(ep);
144 return NULL;
145 }
146
147 return &ep->base;
148}
149
150/**
151 * Finalize XHCI endpoint.
152 * @param[in] xhci_ep XHCI endpoint to finalize.
153 */
154static void xhci_endpoint_fini(xhci_endpoint_t *xhci_ep)
155{
156 assert(xhci_ep);
157
158 xhci_endpoint_free_transfer_ds(xhci_ep);
159
160 // TODO: Something missed?
161}
162
163/**
164 * Destroy given xHCI endpoint structure.
165 *
166 * Bus callback.
167 */
168void xhci_endpoint_destroy(endpoint_t *ep)
169{
170 xhci_endpoint_t *xhci_ep = xhci_endpoint_get(ep);
171
172 xhci_endpoint_fini(xhci_ep);
173 free(xhci_ep);
174}
175
176
177/**
178 * Register an andpoint to the xHC.
179 *
180 * Bus callback.
181 */
182errno_t xhci_endpoint_register(endpoint_t *ep_base)
183{
184 errno_t err;
185 xhci_endpoint_t *ep = xhci_endpoint_get(ep_base);
186
187 if (ep_base->endpoint != 0 && (err = hc_add_endpoint(ep)))
188 return err;
189
190 endpoint_set_online(ep_base, &ep->guard);
191 return EOK;
192}
193
194/**
195 * Abort a transfer on an endpoint.
196 */
197static void endpoint_abort(endpoint_t *ep)
198{
199 xhci_device_t *dev = xhci_device_get(ep->device);
200 xhci_endpoint_t *xhci_ep = xhci_endpoint_get(ep);
201
202 /* This function can only abort endpoints without streams. */
203 assert(xhci_ep->primary_stream_data_array == NULL);
204
205 fibril_mutex_lock(&xhci_ep->guard);
206
207 endpoint_set_offline_locked(ep);
208
209 if (!ep->active_batch) {
210 fibril_mutex_unlock(&xhci_ep->guard);
211 return;
212 }
213
214 /* First, offer the batch a short chance to be finished. */
215 endpoint_wait_timeout_locked(ep, 10000);
216
217 if (!ep->active_batch) {
218 fibril_mutex_unlock(&xhci_ep->guard);
219 return;
220 }
221
222 usb_transfer_batch_t * const batch = ep->active_batch;
223
224 const errno_t err = hc_stop_endpoint(xhci_ep);
225 if (err) {
226 usb_log_error("Failed to stop endpoint %u of device "
227 XHCI_DEV_FMT ": %s", ep->endpoint, XHCI_DEV_ARGS(*dev),
228 str_error(err));
229 }
230
231 fibril_mutex_unlock(&xhci_ep->guard);
232
233 batch->error = EINTR;
234 batch->transferred_size = 0;
235 usb_transfer_batch_finish(batch);
236 return;
237}
238
239/**
240 * Unregister an endpoint. If the device is still available, inform the xHC
241 * about it.
242 *
243 * Bus callback.
244 */
245void xhci_endpoint_unregister(endpoint_t *ep_base)
246{
247 errno_t err;
248 xhci_endpoint_t *ep = xhci_endpoint_get(ep_base);
249 xhci_device_t *dev = xhci_device_get(ep_base->device);
250
251 endpoint_abort(ep_base);
252
253 /* If device slot is still available, drop the endpoint. */
254 if (ep_base->endpoint != 0 && dev->slot_id) {
255
256 if ((err = hc_drop_endpoint(ep))) {
257 usb_log_error("Failed to drop endpoint " XHCI_EP_FMT ": %s",
258 XHCI_EP_ARGS(*ep), str_error(err));
259 }
260 } else {
261 usb_log_debug("Not going to drop endpoint " XHCI_EP_FMT " because"
262 " the slot has already been disabled.", XHCI_EP_ARGS(*ep));
263 }
264}
265
266/**
267 * Determine the type of a XHCI endpoint.
268 * @param[in] ep XHCI endpoint to query.
269 *
270 * @return EP_TYPE_[CONTROL|ISOCH|BULK|INTERRUPT]_[IN|OUT]
271 */
272int xhci_endpoint_type(xhci_endpoint_t *ep)
273{
274 const bool in = ep->base.direction == USB_DIRECTION_IN;
275
276 switch (ep->base.transfer_type) {
277 case USB_TRANSFER_CONTROL:
278 return EP_TYPE_CONTROL;
279
280 case USB_TRANSFER_ISOCHRONOUS:
281 return in ? EP_TYPE_ISOCH_IN
282 : EP_TYPE_ISOCH_OUT;
283
284 case USB_TRANSFER_BULK:
285 return in ? EP_TYPE_BULK_IN
286 : EP_TYPE_BULK_OUT;
287
288 case USB_TRANSFER_INTERRUPT:
289 return in ? EP_TYPE_INTERRUPT_IN
290 : EP_TYPE_INTERRUPT_OUT;
291 }
292
293 return EP_TYPE_INVALID;
294}
295
296/**
297 * Allocate transfer data structures for XHCI endpoint not using streams.
298 * @param[in] xhci_ep XHCI endpoint to allocate data structures for.
299 *
300 * @return Error code.
301 */
302static errno_t alloc_transfer_ds(xhci_endpoint_t *xhci_ep)
303{
304 /* Can't use XHCI_EP_FMT because the endpoint may not have device. */
305 usb_log_debug("Allocating main transfer ring for endpoint " XHCI_EP_FMT,
306 XHCI_EP_ARGS(*xhci_ep));
307
308 xhci_ep->primary_stream_data_array = NULL;
309 xhci_ep->primary_stream_data_size = 0;
310
311 errno_t err;
312 if ((err = xhci_trb_ring_init(&xhci_ep->ring, 0))) {
313 return err;
314 }
315
316 if (xhci_ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS) {
317 if ((err = isoch_alloc_transfers(xhci_ep))) {
318 xhci_trb_ring_fini(&xhci_ep->ring);
319 return err;
320 }
321 }
322
323 return EOK;
324}
325
326/**
327 * Free transfer data structures for XHCI endpoint.
328 * @param[in] xhci_ep XHCI endpoint to free data structures for.
329 */
330void xhci_endpoint_free_transfer_ds(xhci_endpoint_t *xhci_ep)
331{
332 if (xhci_ep->primary_stream_data_size) {
333 xhci_stream_free_ds(xhci_ep);
334 } else {
335 usb_log_debug("Freeing main transfer ring of endpoint " XHCI_EP_FMT,
336 XHCI_EP_ARGS(*xhci_ep));
337 xhci_trb_ring_fini(&xhci_ep->ring);
338 }
339
340 if (xhci_ep->base.transfer_type == USB_TRANSFER_ISOCHRONOUS)
341 isoch_fini(xhci_ep);
342}
343
344xhci_trb_ring_t *xhci_endpoint_get_ring(xhci_endpoint_t *ep, uint32_t stream_id)
345{
346 if (ep->primary_stream_data_size == 0)
347 return stream_id == 0 ? &ep->ring : NULL;
348
349 xhci_stream_data_t *stream_data = xhci_get_stream_ctx_data(ep, stream_id);
350 if (stream_data == NULL) {
351 usb_log_warning("No transfer ring was found for stream %u.", stream_id);
352 return NULL;
353 }
354
355 return &stream_data->ring;
356}
357
358/**
359 * Configure endpoint context of a control endpoint.
360 * @param[in] ep XHCI control endpoint.
361 * @param[in] ctx Endpoint context to configure.
362 */
363static void setup_control_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
364{
365 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
366 XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size);
367 XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst - 1);
368 XHCI_EP_MULT_SET(*ctx, ep->mult - 1);
369 XHCI_EP_ERROR_COUNT_SET(*ctx, 3);
370 XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
371 XHCI_EP_DCS_SET(*ctx, 1);
372}
373
374/**
375 * Configure endpoint context of a bulk endpoint.
376 * @param[in] ep XHCI bulk endpoint.
377 * @param[in] ctx Endpoint context to configure.
378 */
379static void setup_bulk_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
380{
381 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
382 XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size);
383 XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst - 1);
384 XHCI_EP_ERROR_COUNT_SET(*ctx, 3);
385
386 XHCI_EP_MAX_P_STREAMS_SET(*ctx, 0);
387 XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
388 XHCI_EP_DCS_SET(*ctx, 1);
389}
390
391/**
392 * Configure endpoint context of a isochronous endpoint.
393 * @param[in] ep XHCI isochronous endpoint.
394 * @param[in] ctx Endpoint context to configure.
395 */
396static void setup_isoch_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
397{
398 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
399 XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size & 0x07FF);
400 XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst - 1);
401 XHCI_EP_MULT_SET(*ctx, ep->mult - 1);
402 XHCI_EP_ERROR_COUNT_SET(*ctx, 0);
403 XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
404 XHCI_EP_DCS_SET(*ctx, 1);
405 XHCI_EP_INTERVAL_SET(*ctx, fnzb32(ep->interval) % 32);
406
407 XHCI_EP_MAX_ESIT_PAYLOAD_LO_SET(*ctx, ep->isoch->max_size & 0xFFFF);
408 XHCI_EP_MAX_ESIT_PAYLOAD_HI_SET(*ctx, (ep->isoch->max_size >> 16) & 0xFF);
409}
410
411/**
412 * Configure endpoint context of a interrupt endpoint.
413 * @param[in] ep XHCI interrupt endpoint.
414 * @param[in] ctx Endpoint context to configure.
415 */
416static void setup_interrupt_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
417{
418 XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
419 XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size & 0x07FF);
420 XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst - 1);
421 XHCI_EP_MULT_SET(*ctx, 0);
422 XHCI_EP_ERROR_COUNT_SET(*ctx, 3);
423 XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
424 XHCI_EP_DCS_SET(*ctx, 1);
425 XHCI_EP_INTERVAL_SET(*ctx, fnzb32(ep->interval) % 32);
426 // TODO: max ESIT payload
427}
428
429/** Type of endpoint context configuration function. */
430typedef void (*setup_ep_ctx_helper)(xhci_endpoint_t *, xhci_ep_ctx_t *);
431
432/**
433 * Static array, which maps USB endpoint types to their respective endpoint
434 * context configuration functions.
435 */
436static const setup_ep_ctx_helper setup_ep_ctx_helpers[] = {
437 [USB_TRANSFER_CONTROL] = setup_control_ep_ctx,
438 [USB_TRANSFER_ISOCHRONOUS] = setup_isoch_ep_ctx,
439 [USB_TRANSFER_BULK] = setup_bulk_ep_ctx,
440 [USB_TRANSFER_INTERRUPT] = setup_interrupt_ep_ctx,
441};
442
443/** Configure endpoint context of XHCI endpoint.
444 * @param[in] ep Associated XHCI endpoint.
445 * @param[in] ep_ctx Endpoint context to configure.
446 */
447void xhci_setup_endpoint_context(xhci_endpoint_t *ep, xhci_ep_ctx_t *ep_ctx)
448{
449 assert(ep);
450 assert(ep_ctx);
451
452 usb_transfer_type_t tt = ep->base.transfer_type;
453
454 memset(ep_ctx, 0, sizeof(*ep_ctx));
455 setup_ep_ctx_helpers[tt](ep, ep_ctx);
456}
457
458/**
459 * Clear endpoint halt condition by resetting the endpoint and skipping the
460 * offending transfer.
461 */
462errno_t xhci_endpoint_clear_halt(xhci_endpoint_t *ep, uint32_t stream_id)
463{
464 errno_t err;
465
466 if ((err = hc_reset_endpoint(ep)))
467 return err;
468
469 if ((err = hc_reset_ring(ep, stream_id)))
470 return err;
471
472 return EOK;
473}
474
475/**
476 * @}
477 */
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