1 | /*
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2 | * Copyright (c) 2017 Ondrej Hlavaty
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup drvusbxhci
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30 | * @{
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31 | */
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32 | /** @file
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33 | * Memory-mapped register structures of the xHC.
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34 | */
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35 |
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36 | #include <inttypes.h>
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37 | #include <byteorder.h>
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38 | #include <usb/debug.h>
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39 |
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40 | #include "hw_struct/trb.h"
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41 | #include "debug.h"
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42 | #include "hc.h"
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43 |
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44 | #define PX "\t%-21s = "
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45 |
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46 | #define DUMP_REG_FIELD(ptr, title, size, ...) \
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47 | usb_log_debug2(PX "%" PRIu##size, title, XHCI_REG_RD_FIELD(ptr, size, ##__VA_ARGS__))
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48 |
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49 | #define DUMP_REG_RANGE(ptr, title, size, ...) \
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50 | usb_log_debug2(PX "%" PRIu##size, title, XHCI_REG_RD_RANGE(ptr, size, ##__VA_ARGS__))
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51 |
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52 | #define DUMP_REG_FLAG(ptr, title, size, ...) \
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53 | usb_log_debug2(PX "%s", title, XHCI_REG_RD_FLAG(ptr, size, ##__VA_ARGS__) ? "true" : "false")
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54 |
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55 | #define DUMP_REG_INNER(set, title, field, size, type, ...) \
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56 | DUMP_REG_##type(&(set)->field, title, size, ##__VA_ARGS__)
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57 |
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58 | #define DUMP_REG(set, c) DUMP_REG_INNER(set, #c, c)
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59 |
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60 | /**
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61 | * Dumps all capability registers.
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62 | */
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63 | void xhci_dump_cap_regs(const xhci_cap_regs_t *cap)
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64 | {
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65 | usb_log_debug2("Capabilities:");
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66 |
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67 | DUMP_REG(cap, XHCI_CAP_LENGTH);
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68 | DUMP_REG(cap, XHCI_CAP_VERSION);
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69 | DUMP_REG(cap, XHCI_CAP_MAX_SLOTS);
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70 | DUMP_REG(cap, XHCI_CAP_MAX_INTRS);
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71 | DUMP_REG(cap, XHCI_CAP_MAX_PORTS);
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72 | DUMP_REG(cap, XHCI_CAP_IST);
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73 | DUMP_REG(cap, XHCI_CAP_ERST_MAX);
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74 | usb_log_debug2(PX "%u", "Max Scratchpad bufs", xhci_get_max_spbuf(cap));
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75 | DUMP_REG(cap, XHCI_CAP_SPR);
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76 | DUMP_REG(cap, XHCI_CAP_U1EL);
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77 | DUMP_REG(cap, XHCI_CAP_U2EL);
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78 | DUMP_REG(cap, XHCI_CAP_AC64);
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79 | DUMP_REG(cap, XHCI_CAP_BNC);
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80 | DUMP_REG(cap, XHCI_CAP_CSZ);
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81 | DUMP_REG(cap, XHCI_CAP_PPC);
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82 | DUMP_REG(cap, XHCI_CAP_PIND);
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83 | DUMP_REG(cap, XHCI_CAP_C);
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84 | DUMP_REG(cap, XHCI_CAP_LTC);
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85 | DUMP_REG(cap, XHCI_CAP_NSS);
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86 | DUMP_REG(cap, XHCI_CAP_PAE);
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87 | DUMP_REG(cap, XHCI_CAP_SPC);
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88 | DUMP_REG(cap, XHCI_CAP_SEC);
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89 | DUMP_REG(cap, XHCI_CAP_CFC);
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90 | DUMP_REG(cap, XHCI_CAP_MAX_PSA_SIZE);
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91 | DUMP_REG(cap, XHCI_CAP_XECP);
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92 | DUMP_REG(cap, XHCI_CAP_DBOFF);
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93 | DUMP_REG(cap, XHCI_CAP_RTSOFF);
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94 | DUMP_REG(cap, XHCI_CAP_U3C);
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95 | DUMP_REG(cap, XHCI_CAP_CMC);
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96 | DUMP_REG(cap, XHCI_CAP_FSC);
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97 | DUMP_REG(cap, XHCI_CAP_CTC);
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98 | DUMP_REG(cap, XHCI_CAP_LEC);
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99 | DUMP_REG(cap, XHCI_CAP_CIC);
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100 | }
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101 |
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102 | void xhci_dump_port(const xhci_port_regs_t *port)
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103 | {
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104 | DUMP_REG(port, XHCI_PORT_CCS);
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105 | DUMP_REG(port, XHCI_PORT_PED);
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106 | DUMP_REG(port, XHCI_PORT_OCA);
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107 | DUMP_REG(port, XHCI_PORT_PR);
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108 | DUMP_REG(port, XHCI_PORT_PLS);
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109 | DUMP_REG(port, XHCI_PORT_PP);
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110 | DUMP_REG(port, XHCI_PORT_PIC);
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111 | DUMP_REG(port, XHCI_PORT_LWS);
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112 | DUMP_REG(port, XHCI_PORT_CSC);
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113 | DUMP_REG(port, XHCI_PORT_PEC);
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114 | DUMP_REG(port, XHCI_PORT_WRC);
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115 | DUMP_REG(port, XHCI_PORT_OCC);
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116 | DUMP_REG(port, XHCI_PORT_PRC);
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117 | DUMP_REG(port, XHCI_PORT_PLC);
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118 | DUMP_REG(port, XHCI_PORT_CEC);
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119 | DUMP_REG(port, XHCI_PORT_CAS);
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120 | DUMP_REG(port, XHCI_PORT_WCE);
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121 | DUMP_REG(port, XHCI_PORT_WDE);
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122 | DUMP_REG(port, XHCI_PORT_WOE);
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123 | DUMP_REG(port, XHCI_PORT_DR);
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124 | DUMP_REG(port, XHCI_PORT_WPR);
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125 | }
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126 |
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127 | void xhci_dump_state(const xhci_hc_t *hc)
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128 | {
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129 | usb_log_debug2("Operational registers:");
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130 |
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131 | DUMP_REG(hc->op_regs, XHCI_OP_RS);
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132 | DUMP_REG(hc->op_regs, XHCI_OP_HCRST);
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133 | DUMP_REG(hc->op_regs, XHCI_OP_INTE);
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134 | DUMP_REG(hc->op_regs, XHCI_OP_HSEE);
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135 | DUMP_REG(hc->op_regs, XHCI_OP_LHCRST);
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136 | DUMP_REG(hc->op_regs, XHCI_OP_CSS);
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137 | DUMP_REG(hc->op_regs, XHCI_OP_CRS);
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138 | DUMP_REG(hc->op_regs, XHCI_OP_EWE);
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139 | DUMP_REG(hc->op_regs, XHCI_OP_EU3S);
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140 | DUMP_REG(hc->op_regs, XHCI_OP_CME);
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141 | DUMP_REG(hc->op_regs, XHCI_OP_HCH);
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142 | DUMP_REG(hc->op_regs, XHCI_OP_HSE);
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143 | DUMP_REG(hc->op_regs, XHCI_OP_EINT);
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144 | DUMP_REG(hc->op_regs, XHCI_OP_PCD);
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145 | DUMP_REG(hc->op_regs, XHCI_OP_SSS);
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146 | DUMP_REG(hc->op_regs, XHCI_OP_RSS);
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147 | DUMP_REG(hc->op_regs, XHCI_OP_SRE);
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148 | DUMP_REG(hc->op_regs, XHCI_OP_CNR);
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149 | DUMP_REG(hc->op_regs, XHCI_OP_HCE);
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150 | DUMP_REG(hc->op_regs, XHCI_OP_PAGESIZE);
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151 | DUMP_REG(hc->op_regs, XHCI_OP_NOTIFICATION);
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152 | DUMP_REG(hc->op_regs, XHCI_OP_RCS);
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153 | DUMP_REG(hc->op_regs, XHCI_OP_CS);
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154 | DUMP_REG(hc->op_regs, XHCI_OP_CA);
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155 | DUMP_REG(hc->op_regs, XHCI_OP_CRR);
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156 | DUMP_REG(hc->op_regs, XHCI_OP_CRCR_LO);
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157 | DUMP_REG(hc->op_regs, XHCI_OP_CRCR_HI);
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158 | DUMP_REG(hc->op_regs, XHCI_OP_DCBAAP_LO);
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159 | DUMP_REG(hc->op_regs, XHCI_OP_DCBAAP_HI);
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160 | DUMP_REG(hc->rt_regs, XHCI_RT_MFINDEX);
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161 |
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162 | usb_log_debug2("Interrupter 0 state:");
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163 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IP);
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164 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IE);
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165 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IMI);
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166 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_IMC);
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167 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTSZ);
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168 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTBA_LO);
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169 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERSTBA_HI);
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170 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERDP_LO);
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171 | DUMP_REG(&hc->rt_regs->ir[0], XHCI_INTR_ERDP_HI);
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172 | }
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173 |
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174 | void xhci_dump_ports(const xhci_hc_t *hc)
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175 | {
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176 | const size_t num_ports = XHCI_REG_RD(hc->cap_regs, XHCI_CAP_MAX_PORTS);
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177 | for (size_t i = 0; i < num_ports; i++) {
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178 | usb_log_debug2("Port %zu state:", i);
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179 |
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180 | xhci_dump_port(&hc->op_regs->portrs[i]);
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181 | }
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182 | }
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183 |
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184 | static const char *trb_types [] = {
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185 | [0] = "<empty>",
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186 | #define TRB(t) [XHCI_TRB_TYPE_##t] = #t
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187 | TRB(NORMAL),
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188 | TRB(SETUP_STAGE),
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189 | TRB(DATA_STAGE),
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190 | TRB(STATUS_STAGE),
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191 | TRB(ISOCH),
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192 | TRB(LINK),
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193 | TRB(EVENT_DATA),
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194 | TRB(NO_OP),
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195 | TRB(ENABLE_SLOT_CMD),
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196 | TRB(DISABLE_SLOT_CMD),
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197 | TRB(ADDRESS_DEVICE_CMD),
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198 | TRB(CONFIGURE_ENDPOINT_CMD),
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199 | TRB(EVALUATE_CONTEXT_CMD),
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200 | TRB(RESET_ENDPOINT_CMD),
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201 | TRB(STOP_ENDPOINT_CMD),
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202 | TRB(SET_TR_DEQUEUE_POINTER_CMD),
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203 | TRB(RESET_DEVICE_CMD),
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204 | TRB(FORCE_EVENT_CMD),
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205 | TRB(NEGOTIATE_BANDWIDTH_CMD),
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206 | TRB(SET_LATENCY_TOLERANCE_VALUE_CMD),
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207 | TRB(GET_PORT_BANDWIDTH_CMD),
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208 | TRB(FORCE_HEADER_CMD),
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209 | TRB(NO_OP_CMD),
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210 | TRB(TRANSFER_EVENT),
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211 | TRB(COMMAND_COMPLETION_EVENT),
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212 | TRB(PORT_STATUS_CHANGE_EVENT),
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213 | TRB(BANDWIDTH_REQUEST_EVENT),
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214 | TRB(DOORBELL_EVENT),
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215 | TRB(HOST_CONTROLLER_EVENT),
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216 | TRB(DEVICE_NOTIFICATION_EVENT),
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217 | TRB(MFINDEX_WRAP_EVENT),
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218 | #undef TRB
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219 | [XHCI_TRB_TYPE_MAX] = NULL,
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220 | };
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221 |
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222 | const char *xhci_trb_str_type(unsigned type)
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223 | {
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224 | static char type_buf [20];
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225 |
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226 | if (type < XHCI_TRB_TYPE_MAX && trb_types[type] != NULL)
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227 | return trb_types[type];
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228 |
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229 | snprintf(type_buf, sizeof(type_buf), "<unknown (%u)>", type);
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230 | return type_buf;
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231 | }
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232 |
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233 | void xhci_dump_trb(const xhci_trb_t *trb)
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234 | {
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235 | usb_log_debug2("TRB(%p): type %s, cycle %u", trb, xhci_trb_str_type(TRB_TYPE(*trb)), TRB_CYCLE(*trb));
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236 | }
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237 |
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238 | static const char *ec_ids [] = {
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239 | [0] = "<empty>",
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240 | #define EC(t) [XHCI_EC_##t] = #t
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241 | EC(USB_LEGACY),
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242 | EC(SUPPORTED_PROTOCOL),
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243 | EC(EXTENDED_POWER_MANAGEMENT),
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244 | EC(IOV),
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245 | EC(MSI),
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246 | EC(LOCALMEM),
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247 | EC(DEBUG),
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248 | EC(MSIX),
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249 | #undef EC
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250 | [XHCI_EC_MAX] = NULL
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251 | };
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252 |
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253 | const char *xhci_ec_str_id(unsigned id)
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254 | {
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255 | static char buf [20];
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256 |
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257 | if (id < XHCI_EC_MAX && ec_ids[id] != NULL)
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258 | return ec_ids[id];
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259 |
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260 | snprintf(buf, sizeof(buf), "<unknown (%u)>", id);
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261 | return buf;
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262 | }
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263 |
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264 | static void xhci_dump_psi(const xhci_psi_t *psi)
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265 | {
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266 | static const char speed_exp [] = " KMG";
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267 | static const char *psi_types [] = { "", " rsvd", " RX", " TX" };
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268 |
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269 | usb_log_debug("Speed %u%s: %5u %cb/s, %s",
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270 | XHCI_REG_RD(psi, XHCI_PSI_PSIV),
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271 | psi_types[XHCI_REG_RD(psi, XHCI_PSI_PLT)],
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272 | XHCI_REG_RD(psi, XHCI_PSI_PSIM),
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273 | speed_exp[XHCI_REG_RD(psi, XHCI_PSI_PSIE)],
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274 | XHCI_REG_RD(psi, XHCI_PSI_PFD) ? "full-duplex" : "");
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275 | }
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276 |
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277 | void xhci_dump_extcap(const xhci_extcap_t *ec)
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278 | {
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279 | xhci_sp_name_t name;
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280 | unsigned ports_from, ports_to;
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281 |
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282 | unsigned id = XHCI_REG_RD(ec, XHCI_EC_CAP_ID);
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283 | usb_log_debug("Extended capability %s", xhci_ec_str_id(id));
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284 |
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285 | switch (id) {
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286 | case XHCI_EC_SUPPORTED_PROTOCOL:
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287 | name.packed = host2uint32_t_le(XHCI_REG_RD(ec, XHCI_EC_SP_NAME));
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288 | ports_from = XHCI_REG_RD(ec, XHCI_EC_SP_CP_OFF);
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289 | ports_to = ports_from + XHCI_REG_RD(ec, XHCI_EC_SP_CP_COUNT) - 1;
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290 | usb_log_debug("\tProtocol %4s%u.%u, ports %u-%u", name.str,
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291 | XHCI_REG_RD(ec, XHCI_EC_SP_MAJOR),
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292 | XHCI_REG_RD(ec, XHCI_EC_SP_MINOR),
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293 | ports_from, ports_to);
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294 |
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295 | unsigned psic = XHCI_REG_RD(ec, XHCI_EC_SP_PSIC);
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296 | for (unsigned i = 0; i < psic; i++)
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297 | xhci_dump_psi(xhci_extcap_psi(ec, i));
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298 | break;
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299 | }
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300 | }
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301 |
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302 | /**
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303 | * @}
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304 | */
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