source: mainline/uspace/drv/bus/usb/xhci/commands.c@ e454d9c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e454d9c was 8033f89, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci: cstyle
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1/*
2 * Copyright (c) 2017 Jaroslav Jindrak
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief Command sending functions.
34 */
35
36#include <errno.h>
37#include <str_error.h>
38#include <usb/debug.h>
39#include "commands.h"
40#include "debug.h"
41#include "hc.h"
42#include "hw_struct/context.h"
43#include "hw_struct/trb.h"
44
45#define TRB_SET_TSP(trb, tsp) (trb).control |= host2xhci(32, (((tsp) & 0x1) << 9))
46#define TRB_SET_TYPE(trb, type) (trb).control |= host2xhci(32, (type) << 10)
47#define TRB_SET_DC(trb, dc) (trb).control |= host2xhci(32, (dc) << 9)
48#define TRB_SET_EP(trb, ep) (trb).control |= host2xhci(32, ((ep) & 0x5) << 16)
49#define TRB_SET_STREAM(trb, st) (trb).control |= host2xhci(32, ((st) & 0xFFFF) << 16)
50#define TRB_SET_SUSP(trb, susp) (trb).control |= host2xhci(32, ((susp) & 0x1) << 23)
51#define TRB_SET_SLOT(trb, slot) (trb).control |= host2xhci(32, (slot) << 24)
52#define TRB_SET_DEV_SPEED(trb, speed) (trb).control |= host2xhci(32, (speed & 0xF) << 16)
53#define TRB_SET_DEQUEUE_PTR(trb, dptr) (trb).parameter |= host2xhci(64, (dptr))
54#define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(64, (phys) & (~0xF))
55
56#define TRB_GET_CODE(trb) XHCI_DWORD_EXTRACT((trb).status, 31, 24)
57#define TRB_GET_SLOT(trb) XHCI_DWORD_EXTRACT((trb).control, 31, 24)
58#define TRB_GET_PHYS(trb) (XHCI_QWORD_EXTRACT((trb).parameter, 63, 4) << 4)
59
60/* Control functions */
61
62static xhci_cmd_ring_t *get_cmd_ring(xhci_hc_t *hc)
63{
64 assert(hc);
65 return &hc->cr;
66}
67
68/**
69 * Initialize the command subsystem. Allocates the comand ring.
70 *
71 * Does not configure the CR pointer to the hardware, because the xHC will be
72 * reset before starting.
73 */
74int xhci_init_commands(xhci_hc_t *hc)
75{
76 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
77 int err;
78
79 if ((err = xhci_trb_ring_init(&cr->trb_ring, 0)))
80 return err;
81
82 fibril_mutex_initialize(&cr->guard);
83 fibril_condvar_initialize(&cr->state_cv);
84 fibril_condvar_initialize(&cr->stopped_cv);
85
86 list_initialize(&cr->cmd_list);
87
88 cr->state = XHCI_CR_STATE_OPEN;
89
90 return EOK;
91}
92
93/**
94 * Finish the command subsystem. Stops the hardware from running commands, then
95 * deallocates the ring.
96 */
97void xhci_fini_commands(xhci_hc_t *hc)
98{
99 assert(hc);
100 xhci_stop_command_ring(hc);
101
102 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
103
104 fibril_mutex_lock(&cr->guard);
105 xhci_trb_ring_fini(&cr->trb_ring);
106 fibril_mutex_unlock(&cr->guard);
107}
108
109/**
110 * Initialize a command structure for the given command.
111 */
112void xhci_cmd_init(xhci_cmd_t *cmd, xhci_cmd_type_t type)
113{
114 memset(cmd, 0, sizeof(*cmd));
115
116 link_initialize(&cmd->_header.link);
117
118 fibril_mutex_initialize(&cmd->_header.completed_mtx);
119 fibril_condvar_initialize(&cmd->_header.completed_cv);
120
121 cmd->_header.cmd = type;
122}
123
124/**
125 * Finish the command structure. Some command invocation includes allocating
126 * a context structure. To have the convenience in calling commands, this
127 * method deallocates all resources.
128 */
129void xhci_cmd_fini(xhci_cmd_t *cmd)
130{
131 list_remove(&cmd->_header.link);
132
133 dma_buffer_free(&cmd->input_ctx);
134 dma_buffer_free(&cmd->bandwidth_ctx);
135
136 if (cmd->_header.async) {
137 free(cmd);
138 }
139}
140
141/**
142 * Find a command issued by TRB at @c phys inside the command list.
143 *
144 * Call with guard locked only.
145 */
146static inline xhci_cmd_t *find_command(xhci_hc_t *hc, uint64_t phys)
147{
148 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
149 assert(fibril_mutex_is_locked(&cr->guard));
150
151 link_t *cmd_link = list_first(&cr->cmd_list);
152
153 while (cmd_link != NULL) {
154 xhci_cmd_t *cmd = list_get_instance(cmd_link, xhci_cmd_t, _header.link);
155
156 if (cmd->_header.trb_phys == phys)
157 break;
158
159 cmd_link = list_next(cmd_link, &cr->cmd_list);
160 }
161
162 return cmd_link ? list_get_instance(cmd_link, xhci_cmd_t, _header.link)
163 : NULL;
164}
165
166static void cr_set_state(xhci_cmd_ring_t *cr, xhci_cr_state_t state)
167{
168 assert(fibril_mutex_is_locked(&cr->guard));
169
170 cr->state = state;
171 if (state == XHCI_CR_STATE_OPEN
172 || state == XHCI_CR_STATE_CLOSED)
173 fibril_condvar_broadcast(&cr->state_cv);
174}
175
176static int wait_for_ring_open(xhci_cmd_ring_t *cr)
177{
178 assert(fibril_mutex_is_locked(&cr->guard));
179
180 while (true) {
181 switch (cr->state) {
182 case XHCI_CR_STATE_CHANGING:
183 case XHCI_CR_STATE_FULL:
184 fibril_condvar_wait(&cr->state_cv, &cr->guard);
185 break;
186 case XHCI_CR_STATE_OPEN:
187 return EOK;
188 case XHCI_CR_STATE_CLOSED:
189 return ENAK;
190 }
191 }
192}
193
194/**
195 * Enqueue a command on the TRB ring. Ring the doorbell to initiate processing.
196 * Register the command as waiting for completion inside the command list.
197 */
198static inline int enqueue_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
199{
200 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
201 assert(cmd);
202
203 fibril_mutex_lock(&cr->guard);
204
205 if (wait_for_ring_open(cr)) {
206 fibril_mutex_unlock(&cr->guard);
207 return ENAK;
208 }
209
210 usb_log_debug("Sending command %s", xhci_trb_str_type(TRB_TYPE(cmd->_header.trb)));
211
212 list_append(&cmd->_header.link, &cr->cmd_list);
213
214 int err = EOK;
215 while (err == EOK) {
216 err = xhci_trb_ring_enqueue(&cr->trb_ring,
217 &cmd->_header.trb, &cmd->_header.trb_phys);
218 if (err != EAGAIN)
219 break;
220
221 cr_set_state(cr, XHCI_CR_STATE_FULL);
222 err = wait_for_ring_open(cr);
223 }
224
225 if (err == EOK)
226 hc_ring_doorbell(hc, 0, 0);
227
228 fibril_mutex_unlock(&cr->guard);
229
230 return err;
231}
232
233/**
234 * Stop the command ring. Stop processing commands, block issuing new ones.
235 * Wait until hardware acknowledges it is stopped.
236 */
237void xhci_stop_command_ring(xhci_hc_t *hc)
238{
239 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
240
241 fibril_mutex_lock(&cr->guard);
242
243 // Prevent others from starting CR again.
244 cr_set_state(cr, XHCI_CR_STATE_CLOSED);
245
246 /* Some systems, inc. QEMU, need whole 64-bit qword to be written */
247 XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
248 XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0);
249
250 while (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR))
251 fibril_condvar_wait(&cr->stopped_cv, &cr->guard);
252
253 fibril_mutex_unlock(&cr->guard);
254}
255
256/**
257 * Abort currently processed command. Note that it is only aborted when the
258 * command is "blocking" - see section 4.6.1.2 of xHCI spec.
259 */
260static void abort_command_ring(xhci_hc_t *hc)
261{
262 /* Some systems, inc. QEMU, need whole 64-bit qword to be written */
263 XHCI_REG_SET(hc->op_regs, XHCI_OP_CA, 1);
264 XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0);
265}
266
267static const char *trb_codes [] = {
268#define TRBC(t) [XHCI_TRBC_##t] = #t
269 TRBC(INVALID),
270 TRBC(SUCCESS),
271 TRBC(DATA_BUFFER_ERROR),
272 TRBC(BABBLE_DETECTED_ERROR),
273 TRBC(USB_TRANSACTION_ERROR),
274 TRBC(TRB_ERROR),
275 TRBC(STALL_ERROR),
276 TRBC(RESOURCE_ERROR),
277 TRBC(BANDWIDTH_ERROR),
278 TRBC(NO_SLOTS_ERROR),
279 TRBC(INVALID_STREAM_ERROR),
280 TRBC(SLOT_NOT_ENABLED_ERROR),
281 TRBC(EP_NOT_ENABLED_ERROR),
282 TRBC(SHORT_PACKET),
283 TRBC(RING_UNDERRUN),
284 TRBC(RING_OVERRUN),
285 TRBC(VF_EVENT_RING_FULL),
286 TRBC(PARAMETER_ERROR),
287 TRBC(BANDWIDTH_OVERRUN_ERROR),
288 TRBC(CONTEXT_STATE_ERROR),
289 TRBC(NO_PING_RESPONSE_ERROR),
290 TRBC(EVENT_RING_FULL_ERROR),
291 TRBC(INCOMPATIBLE_DEVICE_ERROR),
292 TRBC(MISSED_SERVICE_ERROR),
293 TRBC(COMMAND_RING_STOPPED),
294 TRBC(COMMAND_ABORTED),
295 TRBC(STOPPED),
296 TRBC(STOPPED_LENGTH_INVALID),
297 TRBC(STOPPED_SHORT_PACKET),
298 TRBC(MAX_EXIT_LATENCY_TOO_LARGE_ERROR),
299 [30] = "<reserved>",
300 TRBC(ISOCH_BUFFER_OVERRUN),
301 TRBC(EVENT_LOST_ERROR),
302 TRBC(UNDEFINED_ERROR),
303 TRBC(INVALID_STREAM_ID_ERROR),
304 TRBC(SECONDARY_BANDWIDTH_ERROR),
305 TRBC(SPLIT_TRANSACTION_ERROR),
306 [XHCI_TRBC_MAX] = NULL
307#undef TRBC
308};
309
310/**
311 * Report an error according to command completion code.
312 */
313static void report_error(int code)
314{
315 if (code < XHCI_TRBC_MAX && trb_codes[code] != NULL)
316 usb_log_error("Command resulted in error: %s.", trb_codes[code]);
317 else
318 usb_log_error("Command resulted in reserved or vendor specific error.");
319}
320
321/**
322 * Handle a command completion. Feed the fibril waiting for result.
323 *
324 * @param trb The COMMAND_COMPLETION TRB found in event ring.
325 */
326int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
327{
328 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
329 assert(trb);
330
331 fibril_mutex_lock(&cr->guard);
332
333 int code = TRB_GET_CODE(*trb);
334
335 if (code == XHCI_TRBC_COMMAND_RING_STOPPED) {
336 /* This can either mean that the ring is being stopped, or
337 * a command was aborted. In either way, wake threads waiting
338 * on stopped_cv.
339 *
340 * Note that we need to hold mutex, because we must be sure the
341 * requesting thread is waiting inside the CV.
342 */
343 usb_log_debug("Command ring stopped.");
344 fibril_condvar_broadcast(&cr->stopped_cv);
345 fibril_mutex_unlock(&cr->guard);
346 return EOK;
347 }
348
349 const uint64_t phys = TRB_GET_PHYS(*trb);
350 xhci_trb_ring_update_dequeue(&cr->trb_ring, phys);
351
352 if (cr->state == XHCI_CR_STATE_FULL)
353 cr_set_state(cr, XHCI_CR_STATE_OPEN);
354
355 xhci_cmd_t *command = find_command(hc, phys);
356 if (command == NULL) {
357 usb_log_error("No command struct for completion event found.");
358
359 if (code != XHCI_TRBC_SUCCESS)
360 report_error(code);
361
362 return EOK;
363 }
364
365 list_remove(&command->_header.link);
366
367 /* Semantics of NO_OP_CMD is that success is marked as a TRB error. */
368 if (command->_header.cmd == XHCI_CMD_NO_OP && code == XHCI_TRBC_TRB_ERROR)
369 code = XHCI_TRBC_SUCCESS;
370
371 command->status = code;
372 command->slot_id = TRB_GET_SLOT(*trb);
373
374 usb_log_debug("Completed command %s",
375 xhci_trb_str_type(TRB_TYPE(command->_header.trb)));
376
377 if (code != XHCI_TRBC_SUCCESS) {
378 report_error(code);
379 xhci_dump_trb(&command->_header.trb);
380 }
381
382 fibril_mutex_unlock(&cr->guard);
383
384 fibril_mutex_lock(&command->_header.completed_mtx);
385 command->_header.completed = true;
386 fibril_condvar_broadcast(&command->_header.completed_cv);
387 fibril_mutex_unlock(&command->_header.completed_mtx);
388
389 if (command->_header.async) {
390 /* Free the command and other DS upon completion. */
391 xhci_cmd_fini(command);
392 }
393
394 return EOK;
395}
396
397/* Command-issuing functions */
398
399static int no_op_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
400{
401 assert(hc);
402
403 xhci_trb_clean(&cmd->_header.trb);
404
405 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_NO_OP_CMD);
406
407 return enqueue_command(hc, cmd);
408}
409
410static int enable_slot_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
411{
412 assert(hc);
413
414 xhci_trb_clean(&cmd->_header.trb);
415
416 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ENABLE_SLOT_CMD);
417 cmd->_header.trb.control |=
418 host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
419
420 return enqueue_command(hc, cmd);
421}
422
423static int disable_slot_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
424{
425 assert(hc);
426 assert(cmd);
427
428 xhci_trb_clean(&cmd->_header.trb);
429
430 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_DISABLE_SLOT_CMD);
431 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
432
433 return enqueue_command(hc, cmd);
434}
435
436static int address_device_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
437{
438 assert(hc);
439 assert(cmd);
440 assert(dma_buffer_is_set(&cmd->input_ctx));
441
442 /**
443 * TODO: Requirements for this command:
444 * dcbaa[slot_id] is properly sized and initialized
445 * ictx has valids slot context and endpoint 0, all
446 * other should be ignored at this point (see section 4.6.5).
447 */
448
449 xhci_trb_clean(&cmd->_header.trb);
450
451 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
452
453 /**
454 * Note: According to section 6.4.3.4, we can set the 9th bit
455 * of the control field of the trb (BSR) to 1 and then the xHC
456 * will not issue the SET_ADDRESS request to the USB device.
457 * This can be used to provide compatibility with legacy USB devices
458 * that require their device descriptor to be read before such request.
459 */
460 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD);
461 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
462
463 return enqueue_command(hc, cmd);
464}
465
466static int configure_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
467{
468 assert(hc);
469 assert(cmd);
470
471 xhci_trb_clean(&cmd->_header.trb);
472
473 if (!cmd->deconfigure) {
474 /* If the DC flag is on, input context is not evaluated. */
475 assert(dma_buffer_is_set(&cmd->input_ctx));
476
477 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
478 }
479
480 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD);
481 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
482 TRB_SET_DC(cmd->_header.trb, cmd->deconfigure);
483
484 return enqueue_command(hc, cmd);
485}
486
487static int evaluate_context_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
488{
489 assert(hc);
490 assert(cmd);
491 assert(dma_buffer_is_set(&cmd->input_ctx));
492
493 /**
494 * Note: All Drop Context flags of the input context shall be 0,
495 * all Add Context flags shall be initialize to indicate IDs
496 * of the contexts affected by the command.
497 * Refer to sections 6.2.2.3 and 6.3.3.3 for further info.
498 */
499 xhci_trb_clean(&cmd->_header.trb);
500
501 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
502
503 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD);
504 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
505
506 return enqueue_command(hc, cmd);
507}
508
509static int reset_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
510{
511 assert(hc);
512 assert(cmd);
513
514 xhci_trb_clean(&cmd->_header.trb);
515
516 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD);
517 TRB_SET_TSP(cmd->_header.trb, cmd->tsp);
518 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
519 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
520
521 return enqueue_command(hc, cmd);
522}
523
524static int stop_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
525{
526 assert(hc);
527 assert(cmd);
528
529 xhci_trb_clean(&cmd->_header.trb);
530
531 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_STOP_ENDPOINT_CMD);
532 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
533 TRB_SET_SUSP(cmd->_header.trb, cmd->susp);
534 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
535
536 return enqueue_command(hc, cmd);
537}
538
539static int set_tr_dequeue_pointer_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
540{
541 assert(hc);
542 assert(cmd);
543
544 xhci_trb_clean(&cmd->_header.trb);
545
546 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_SET_TR_DEQUEUE_POINTER_CMD);
547 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
548 TRB_SET_STREAM(cmd->_header.trb, cmd->stream_id);
549 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
550 TRB_SET_DEQUEUE_PTR(cmd->_header.trb, cmd->dequeue_ptr);
551
552 return enqueue_command(hc, cmd);
553}
554
555static int reset_device_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
556{
557 assert(hc);
558 assert(cmd);
559
560 xhci_trb_clean(&cmd->_header.trb);
561
562 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_DEVICE_CMD);
563 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
564
565 return enqueue_command(hc, cmd);
566}
567
568static int get_port_bandwidth_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
569{
570 assert(hc);
571 assert(cmd);
572
573 xhci_trb_clean(&cmd->_header.trb);
574
575 TRB_SET_ICTX(cmd->_header.trb, cmd->bandwidth_ctx.phys);
576
577 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_GET_PORT_BANDWIDTH_CMD);
578 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
579 TRB_SET_DEV_SPEED(cmd->_header.trb, cmd->device_speed);
580
581 return enqueue_command(hc, cmd);
582}
583
584/* The table of command-issuing functions. */
585
586typedef int (*cmd_handler) (xhci_hc_t *hc, xhci_cmd_t *cmd);
587
588static cmd_handler cmd_handlers [] = {
589 [XHCI_CMD_ENABLE_SLOT] = enable_slot_cmd,
590 [XHCI_CMD_DISABLE_SLOT] = disable_slot_cmd,
591 [XHCI_CMD_ADDRESS_DEVICE] = address_device_cmd,
592 [XHCI_CMD_CONFIGURE_ENDPOINT] = configure_endpoint_cmd,
593 [XHCI_CMD_EVALUATE_CONTEXT] = evaluate_context_cmd,
594 [XHCI_CMD_RESET_ENDPOINT] = reset_endpoint_cmd,
595 [XHCI_CMD_STOP_ENDPOINT] = stop_endpoint_cmd,
596 [XHCI_CMD_SET_TR_DEQUEUE_POINTER] = set_tr_dequeue_pointer_cmd,
597 [XHCI_CMD_RESET_DEVICE] = reset_device_cmd,
598 [XHCI_CMD_FORCE_EVENT] = NULL,
599 [XHCI_CMD_NEGOTIATE_BANDWIDTH] = NULL,
600 [XHCI_CMD_SET_LATENCY_TOLERANCE_VALUE] = NULL,
601 [XHCI_CMD_GET_PORT_BANDWIDTH] = get_port_bandwidth_cmd,
602 [XHCI_CMD_FORCE_HEADER] = NULL,
603 [XHCI_CMD_NO_OP] = no_op_cmd
604};
605
606/**
607 * Try to abort currently processed command. This is tricky, because
608 * calling fibril is not necessarily the one which issued the blocked command.
609 * Also, the trickiness intensifies by the fact that stopping a CR is denoted by
610 * event, which is again handled in different fibril. but, once we go to sleep
611 * on waiting for that event, another fibril may wake up and try to abort the
612 * blocked command.
613 *
614 * So, we mark the command ring as being restarted, wait for it to stop, and
615 * then start it again. If there was a blocked command, it will be satisfied by
616 * COMMAND_ABORTED event.
617 */
618static int try_abort_current_command(xhci_hc_t *hc)
619{
620 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
621
622 fibril_mutex_lock(&cr->guard);
623
624 if (cr->state == XHCI_CR_STATE_CLOSED) {
625 fibril_mutex_unlock(&cr->guard);
626 return ENAK;
627 }
628
629 if (cr->state == XHCI_CR_STATE_CHANGING) {
630 fibril_mutex_unlock(&cr->guard);
631 return EOK;
632 }
633
634 usb_log_error("Timeout while waiting for command: aborting current command.");
635
636 cr_set_state(cr, XHCI_CR_STATE_CHANGING);
637
638 abort_command_ring(hc);
639
640 fibril_condvar_wait_timeout(&cr->stopped_cv, &cr->guard, XHCI_CR_ABORT_TIMEOUT);
641
642 if (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR)) {
643 /* 4.6.1.2, implementation note
644 * Assume there are larger problems with HC and
645 * reset it.
646 */
647 usb_log_error("Command didn't abort.");
648
649 cr_set_state(cr, XHCI_CR_STATE_CLOSED);
650
651 // TODO: Reset HC completely.
652 // Don't forget to somehow complete all commands with error.
653
654 fibril_mutex_unlock(&cr->guard);
655 return ENAK;
656 }
657
658 cr_set_state(cr, XHCI_CR_STATE_OPEN);
659
660 fibril_mutex_unlock(&cr->guard);
661
662 usb_log_error("Command ring stopped. Starting again.");
663 hc_ring_doorbell(hc, 0, 0);
664
665 return EOK;
666}
667
668/**
669 * Wait, until the command is completed. The completion is triggered by
670 * COMMAND_COMPLETION event. As we do not want to rely on HW completing the
671 * command in timely manner, we timeout. Note that we can't just return an
672 * error after the timeout pass - it may be other command blocking the ring,
673 * and ours can be completed afterwards. Therefore, it is not guaranteed that
674 * this function will return in XHCI_COMMAND_TIMEOUT. It will continue waiting
675 * until COMMAND_COMPLETION event arrives.
676 */
677static int wait_for_cmd_completion(xhci_hc_t *hc, xhci_cmd_t *cmd)
678{
679 int rv = EOK;
680
681 if (fibril_get_id() == hc->event_handler) {
682 usb_log_error("Deadlock detected in waiting for command.");
683 abort();
684 }
685
686 fibril_mutex_lock(&cmd->_header.completed_mtx);
687 while (!cmd->_header.completed) {
688
689 rv = fibril_condvar_wait_timeout(&cmd->_header.completed_cv,
690 &cmd->_header.completed_mtx, XHCI_COMMAND_TIMEOUT);
691
692 /* The waiting timed out. Current command (not necessarily
693 * ours) is probably blocked.
694 */
695 if (!cmd->_header.completed && rv == ETIMEOUT) {
696 fibril_mutex_unlock(&cmd->_header.completed_mtx);
697
698 rv = try_abort_current_command(hc);
699 if (rv)
700 return rv;
701
702 fibril_mutex_lock(&cmd->_header.completed_mtx);
703 }
704 }
705 fibril_mutex_unlock(&cmd->_header.completed_mtx);
706
707 return rv;
708}
709
710/**
711 * Issue command and block the current fibril until it is completed or timeout
712 * expires. Nothing is deallocated. Caller should always execute `xhci_cmd_fini`.
713 */
714int xhci_cmd_sync(xhci_hc_t *hc, xhci_cmd_t *cmd)
715{
716 assert(hc);
717 assert(cmd);
718
719 int err;
720
721 if (!cmd_handlers[cmd->_header.cmd]) {
722 /* Handler not implemented. */
723 return ENOTSUP;
724 }
725
726 if ((err = cmd_handlers[cmd->_header.cmd](hc, cmd))) {
727 /* Command could not be issued. */
728 return err;
729 }
730
731 if ((err = wait_for_cmd_completion(hc, cmd))) {
732 /* Command failed. */
733 return err;
734 }
735
736 switch (cmd->status) {
737 case XHCI_TRBC_SUCCESS:
738 return EOK;
739 case XHCI_TRBC_USB_TRANSACTION_ERROR:
740 return ESTALL;
741 case XHCI_TRBC_RESOURCE_ERROR:
742 case XHCI_TRBC_BANDWIDTH_ERROR:
743 case XHCI_TRBC_NO_SLOTS_ERROR:
744 return ELIMIT;
745 case XHCI_TRBC_SLOT_NOT_ENABLED_ERROR:
746 return ENOENT;
747 default:
748 return EINVAL;
749 }
750}
751
752/**
753 * Does the same thing as `xhci_cmd_sync` and executes `xhci_cmd_fini`. This
754 * is a useful shorthand for issuing commands without out parameters.
755 */
756int xhci_cmd_sync_fini(xhci_hc_t *hc, xhci_cmd_t *cmd)
757{
758 const int err = xhci_cmd_sync(hc, cmd);
759 xhci_cmd_fini(cmd);
760
761 return err;
762}
763
764/**
765 * Does the same thing as `xhci_cmd_sync_fini` without blocking the current
766 * fibril. The command is copied to stack memory and `fini` is called upon its completion.
767 */
768int xhci_cmd_async_fini(xhci_hc_t *hc, xhci_cmd_t *stack_cmd)
769{
770 assert(hc);
771 assert(stack_cmd);
772
773 /* Save the command for later. */
774 xhci_cmd_t *heap_cmd = (xhci_cmd_t *) malloc(sizeof(xhci_cmd_t));
775 if (!heap_cmd) {
776 return ENOMEM;
777 }
778
779 /* TODO: Is this good for the mutex and the condvar? */
780 memcpy(heap_cmd, stack_cmd, sizeof(xhci_cmd_t));
781 heap_cmd->_header.async = true;
782
783 /* Issue the command. */
784 int err;
785
786 if (!cmd_handlers[heap_cmd->_header.cmd]) {
787 /* Handler not implemented. */
788 err = ENOTSUP;
789 goto err_heap_cmd;
790 }
791
792 if ((err = cmd_handlers[heap_cmd->_header.cmd](hc, heap_cmd))) {
793 /* Command could not be issued. */
794 goto err_heap_cmd;
795 }
796
797 return EOK;
798
799err_heap_cmd:
800 free(heap_cmd);
801 return err;
802}
803
804/**
805 * @}
806 */
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