| 1 | /*
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| 2 | * Copyright (c) 2017 Jaroslav Jindrak
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief Command sending functions.
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| 34 | */
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| 35 |
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| 36 | #include <errno.h>
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| 37 | #include <str_error.h>
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| 38 | #include <usb/debug.h>
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| 39 | #include <usb/host/utils/malloc32.h>
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| 40 | #include "commands.h"
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| 41 | #include "debug.h"
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| 42 | #include "hc.h"
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| 43 | #include "hw_struct/context.h"
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| 44 | #include "hw_struct/trb.h"
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| 45 |
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| 46 | int xhci_init_commands(xhci_hc_t *hc)
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| 47 | {
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| 48 | assert(hc);
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| 49 |
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| 50 | list_initialize(&hc->commands);
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| 51 | return EOK;
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| 52 | }
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| 53 |
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| 54 | void xhci_fini_commands(xhci_hc_t *hc)
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| 55 | {
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| 56 | // Note: Untested.
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| 57 | assert(hc);
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| 58 |
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| 59 | // We assume that the hc is dying/stopping, so we ignore
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| 60 | // the ownership of the commands.
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| 61 | list_foreach(hc->commands, link, xhci_cmd_t, cmd) {
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| 62 | xhci_free_command(cmd);
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| 63 | }
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| 64 | }
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| 65 |
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| 66 | int xhci_wait_for_command(xhci_cmd_t *cmd, uint32_t timeout)
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| 67 | {
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| 68 | uint32_t time = 0;
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| 69 | while (!cmd->completed) {
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| 70 | async_usleep(1000);
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| 71 | time += 1000;
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| 72 |
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| 73 | if (time > timeout)
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| 74 | return ETIMEOUT;
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| 75 | }
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| 76 |
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| 77 | return EOK;
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| 78 | }
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| 79 |
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| 80 | xhci_cmd_t *xhci_alloc_command(void)
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| 81 | {
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| 82 | xhci_cmd_t *cmd = malloc32(sizeof(xhci_cmd_t));
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| 83 | memset(cmd, 0, sizeof(xhci_cmd_t));
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| 84 |
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| 85 | link_initialize(&cmd->link);
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| 86 |
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| 87 | /**
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| 88 | * Internal functions will set this to false, other are implicit
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| 89 | * owners unless they overwrite this field.
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| 90 | * TODO: Is this wise?
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| 91 | */
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| 92 | cmd->has_owner = true;
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| 93 |
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| 94 | return cmd;
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| 95 | }
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| 96 |
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| 97 | void xhci_free_command(xhci_cmd_t *cmd)
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| 98 | {
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| 99 | if (cmd->ictx)
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| 100 | free32(cmd->ictx);
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| 101 | if (cmd->trb)
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| 102 | free32(cmd->trb);
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| 103 |
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| 104 | free32(cmd);
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| 105 | }
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| 106 |
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| 107 | static inline xhci_cmd_t *get_next_command(xhci_hc_t *hc)
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| 108 | {
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| 109 | link_t *cmd_link = list_first(&hc->commands);
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| 110 |
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| 111 | if (cmd_link != NULL) {
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| 112 | list_remove(cmd_link);
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| 113 |
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| 114 | return list_get_instance(cmd_link, xhci_cmd_t, link);
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| 115 | }
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| 116 |
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| 117 | return NULL;
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| 118 | }
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| 119 |
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| 120 | static inline int ring_doorbell(xhci_hc_t *hc, unsigned doorbell, unsigned target)
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| 121 | {
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| 122 | assert(hc);
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| 123 | uint32_t v = host2xhci(32, target & BIT_RRANGE(uint32_t, 7));
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| 124 | pio_write_32(&hc->db_arry[doorbell], v);
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| 125 | return EOK;
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| 126 | }
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| 127 |
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| 128 | static inline int enqueue_trb(xhci_hc_t *hc, xhci_trb_t *trb,
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| 129 | unsigned doorbell, unsigned target)
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| 130 | {
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| 131 | assert(hc);
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| 132 | assert(trb);
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| 133 |
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| 134 | xhci_trb_ring_enqueue(&hc->command_ring, trb);
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| 135 | ring_doorbell(hc, doorbell, target);
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| 136 |
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| 137 | xhci_dump_trb(trb);
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| 138 | usb_log_debug2("HC(%p): Sent TRB", hc);
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| 139 |
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| 140 | return EOK;
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| 141 | }
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| 142 |
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| 143 | static inline xhci_cmd_t *add_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 144 | {
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| 145 | if (cmd == NULL) {
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| 146 | cmd = xhci_alloc_command();
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| 147 | if (cmd == NULL)
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| 148 | return cmd;
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| 149 |
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| 150 | cmd->has_owner = false;
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| 151 | }
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| 152 |
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| 153 | list_append(&cmd->link, &hc->commands);
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| 154 | cmd->trb = hc->command_ring.enqueue_trb;
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| 155 |
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| 156 | return cmd;
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| 157 | }
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| 158 |
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| 159 | static const char *trb_codes [] = {
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| 160 | #define TRBC(t) [XHCI_TRBC_##t] = #t
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| 161 | TRBC(INVALID),
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| 162 | TRBC(SUCCESS),
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| 163 | TRBC(DATA_BUFFER_ERROR),
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| 164 | TRBC(BABBLE_DETECTED_ERROR),
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| 165 | TRBC(USB_TRANSACTION_ERROR),
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| 166 | TRBC(TRB_ERROR),
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| 167 | TRBC(STALL_ERROR),
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| 168 | TRBC(RESOURCE_ERROR),
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| 169 | TRBC(BANDWIDTH_ERROR),
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| 170 | TRBC(NO_SLOTS_ERROR),
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| 171 | TRBC(INVALID_STREAM_ERROR),
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| 172 | TRBC(SLOT_NOT_ENABLED_ERROR),
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| 173 | TRBC(EP_NOT_ENABLED_ERROR),
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| 174 | TRBC(SHORT_PACKET),
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| 175 | TRBC(RING_UNDERRUN),
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| 176 | TRBC(RING_OVERRUN),
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| 177 | TRBC(VF_EVENT_RING_FULL),
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| 178 | TRBC(PARAMETER_ERROR),
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| 179 | TRBC(BANDWIDTH_OVERRUN_ERROR),
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| 180 | TRBC(CONTEXT_STATE_ERROR),
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| 181 | TRBC(NO_PING_RESPONSE_ERROR),
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| 182 | TRBC(EVENT_RING_FULL_ERROR),
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| 183 | TRBC(INCOMPATIBLE_DEVICE_ERROR),
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| 184 | TRBC(MISSED_SERVICE_ERROR),
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| 185 | TRBC(COMMAND_RING_STOPPED),
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| 186 | TRBC(COMMAND_ABORTED),
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| 187 | TRBC(STOPPED),
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| 188 | TRBC(STOPPED_LENGTH_INVALID),
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| 189 | TRBC(STOPPED_SHORT_PACKET),
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| 190 | TRBC(MAX_EXIT_LATENCY_TOO_LARGE_ERROR),
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| 191 | [30] = "<reserved>",
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| 192 | TRBC(ISOCH_BUFFER_OVERRUN),
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| 193 | TRBC(EVENT_LOST_ERROR),
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| 194 | TRBC(UNDEFINED_ERROR),
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| 195 | TRBC(INVALID_STREAM_ID_ERROR),
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| 196 | TRBC(SECONDARY_BANDWIDTH_ERROR),
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| 197 | TRBC(SPLIT_TRANSACTION_ERROR),
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| 198 | [XHCI_TRBC_MAX] = NULL
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| 199 | #undef TRBC
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| 200 | };
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| 201 |
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| 202 | static void report_error(int code)
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| 203 | {
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| 204 | if (code < XHCI_TRBC_MAX && trb_codes[code] != NULL)
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| 205 | usb_log_error("Command resulted in error: %s.", trb_codes[code]);
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| 206 | else
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| 207 | usb_log_error("Command resulted in reserved or vendor specific error.");
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| 208 | }
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| 209 |
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| 210 | int xhci_send_no_op_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 211 | {
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| 212 | assert(hc);
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| 213 |
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| 214 | xhci_trb_t trb;
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| 215 | memset(&trb, 0, sizeof(trb));
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| 216 |
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| 217 | trb.control = host2xhci(32, XHCI_TRB_TYPE_NO_OP_CMD << 10);
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| 218 |
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| 219 | cmd = add_cmd(hc, cmd);
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| 220 |
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| 221 | return enqueue_trb(hc, &trb, 0, 0);
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| 222 | }
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| 223 |
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| 224 | int xhci_send_enable_slot_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 225 | {
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| 226 | assert(hc);
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| 227 |
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| 228 | xhci_trb_t trb;
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| 229 | memset(&trb, 0, sizeof(trb));
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| 230 |
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| 231 | trb.control = host2xhci(32, XHCI_TRB_TYPE_ENABLE_SLOT_CMD << 10);
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| 232 | trb.control |= host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
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| 233 | trb.control |= host2xhci(32, hc->command_ring.pcs);
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| 234 |
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| 235 | cmd = add_cmd(hc, cmd);
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| 236 |
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| 237 | return enqueue_trb(hc, &trb, 0, 0);
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| 238 | }
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| 239 |
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| 240 | int xhci_send_disable_slot_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 241 | {
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| 242 | assert(hc);
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| 243 | assert(cmd);
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| 244 |
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| 245 | xhci_trb_t trb;
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| 246 | memset(&trb, 0, sizeof(trb));
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| 247 |
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| 248 | trb.control = host2xhci(32, XHCI_TRB_TYPE_DISABLE_SLOT_CMD << 10);
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| 249 | trb.control |= host2xhci(32, hc->command_ring.pcs);
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| 250 | trb.control |= host2xhci(32, cmd->slot_id << 24);
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| 251 |
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| 252 | add_cmd(hc, cmd);
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| 253 |
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| 254 | return enqueue_trb(hc, &trb, 0, 0);
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| 255 | }
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| 256 |
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| 257 | int xhci_send_address_device_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 258 | {
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| 259 | assert(hc);
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| 260 | assert(cmd);
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| 261 | assert(cmd->ictx);
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| 262 |
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| 263 | /**
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| 264 | * TODO: Requirements for this command:
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| 265 | * dcbaa[slot_id] is properly sized and initialized
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| 266 | * ictx has valids slot context and endpoint 0, all
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| 267 | * other should be ignored at this point (see section 4.6.5).
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| 268 | */
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| 269 | xhci_trb_t trb;
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| 270 | memset(&trb, 0, sizeof(trb));
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| 271 |
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| 272 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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| 273 | trb.parameter = host2xhci(32, phys_addr & (~0xF));
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| 274 |
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| 275 | /**
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| 276 | * Note: According to section 6.4.3.4, we can set the 9th bit
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| 277 | * of the control field of the trb (BSR) to 1 and then the xHC
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| 278 | * will not issue the SET_ADDRESS request to the USB device.
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| 279 | * This can be used to provide compatibility with legacy USB devices
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| 280 | * that require their device descriptor to be read before such request.
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| 281 | */
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| 282 | trb.control = host2xhci(32, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD << 10);
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| 283 | trb.control |= host2xhci(32, hc->command_ring.pcs);
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| 284 | trb.control |= host2xhci(32, cmd->slot_id << 24);
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| 285 |
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| 286 | cmd = add_cmd(hc, cmd);
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| 287 |
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| 288 | return enqueue_trb(hc, &trb, 0, 0);
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| 289 | }
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| 290 |
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| 291 | int xhci_send_configure_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 292 | {
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| 293 | assert(hc);
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| 294 | assert(cmd);
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| 295 | assert(cmd->ictx);
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| 296 |
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| 297 | xhci_trb_t trb;
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| 298 | memset(&trb, 0, sizeof(trb));
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| 299 |
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| 300 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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| 301 | trb.parameter = host2xhci(32, phys_addr & (~0xF));
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| 302 |
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| 303 | trb.control = host2xhci(32, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD << 10);
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| 304 | trb.control |= host2xhci(32, hc->command_ring.pcs);
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| 305 | trb.control |= host2xhci(32, cmd->slot_id << 24);
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| 306 |
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| 307 | cmd = add_cmd(hc, cmd);
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| 308 |
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| 309 | return enqueue_trb(hc, &trb, 0, 0);
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| 310 | }
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| 311 |
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| 312 | int xhci_send_evaluate_context_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 313 | {
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| 314 | assert(hc);
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| 315 | assert(cmd);
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| 316 | assert(cmd->ictx);
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| 317 |
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| 318 | /**
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| 319 | * Note: All Drop Context flags of the input context shall be 0,
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| 320 | * all Add Context flags shall be initialize to indicate IDs
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| 321 | * of the contexts affected by the command.
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| 322 | * Refer to sections 6.2.2.3 and 6.3.3.3 for further info.
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| 323 | */
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| 324 | xhci_trb_t trb;
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| 325 | memset(&trb, 0, sizeof(trb));
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| 326 |
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| 327 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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| 328 | trb.parameter = host2xhci(32, phys_addr & (~0xF));
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| 329 |
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| 330 | trb.control = host2xhci(32, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD << 10);
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| 331 | trb.control |= host2xhci(32, hc->command_ring.pcs);
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| 332 | trb.control |= host2xhci(32, cmd->slot_id << 24);
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| 333 |
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| 334 | cmd = add_cmd(hc, cmd);
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| 335 |
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| 336 | return enqueue_trb(hc, &trb, 0, 0);
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| 337 | }
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| 338 |
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| 339 | int xhci_send_reset_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd, uint32_t ep_id, uint8_t tcs)
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| 340 | {
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| 341 | assert(hc);
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| 342 | assert(cmd);
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| 343 |
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| 344 | /**
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| 345 | * Note: TCS can have values 0 or 1. If it is set to 0, see sectuon 4.5.8 for
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| 346 | * information about this flag.
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| 347 | */
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| 348 | xhci_trb_t trb;
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| 349 | memset(&trb, 0, sizeof(trb));
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| 350 |
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| 351 | trb.control = host2xhci(32, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD << 10);
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| 352 | trb.control |= host2xhci(32, hc->command_ring.pcs);
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| 353 | trb.control |= host2xhci(32, (tcs & 0x1) << 9);
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| 354 | trb.control |= host2xhci(32, (ep_id & 0x5) << 16);
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| 355 | trb.control |= host2xhci(32, cmd->slot_id << 24);
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| 356 |
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| 357 | return enqueue_trb(hc, &trb, 0, 0);
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| 358 | }
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| 359 |
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| 360 | int xhci_send_stop_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd, uint32_t ep_id, uint8_t susp)
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| 361 | {
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| 362 | assert(hc);
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| 363 | assert(cmd);
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| 364 |
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| 365 | xhci_trb_t trb;
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| 366 | memset(&trb, 0, sizeof(trb));
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| 367 |
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| 368 | trb.control = host2xhci(32, XHCI_TRB_TYPE_STOP_ENDPOINT_CMD << 10);
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| 369 | trb.control |= host2xhci(32, hc->command_ring.pcs);
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| 370 | trb.control |= host2xhci(32, (ep_id & 0x5) << 16);
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| 371 | trb.control |= host2xhci(32, (susp & 0x1) << 23);
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| 372 | trb.control |= host2xhci(32, cmd->slot_id << 24);
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| 373 |
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| 374 | cmd = add_cmd(hc, cmd);
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| 375 |
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| 376 | return enqueue_trb(hc, &trb, 0, 0);
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| 377 | }
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| 378 |
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| 379 | int xhci_send_reset_device_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 380 | {
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| 381 | assert(hc);
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| 382 | assert(cmd);
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| 383 |
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| 384 | xhci_trb_t trb;
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| 385 | memset(&trb, 0, sizeof(trb));
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| 386 |
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| 387 | trb.control = host2xhci(32, XHCI_TRB_TYPE_RESET_DEVICE_CMD << 10);
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| 388 | trb.control |= host2xhci(32, hc->command_ring.pcs);
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| 389 | trb.control |= host2xhci(32, cmd->slot_id << 24);
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| 390 |
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| 391 | return enqueue_trb(hc, &trb, 0, 0);
|
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| 392 | }
|
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| 393 |
|
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| 394 | int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
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| 395 | {
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|---|
| 396 | // TODO: Update dequeue ptrs.
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| 397 | assert(hc);
|
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| 398 | assert(trb);
|
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| 399 |
|
|---|
| 400 | usb_log_debug("HC(%p) Command completed.", hc);
|
|---|
| 401 |
|
|---|
| 402 | int code;
|
|---|
| 403 | uint32_t slot_id;
|
|---|
| 404 | xhci_cmd_t *command;
|
|---|
| 405 | xhci_trb_t *command_trb;
|
|---|
| 406 |
|
|---|
| 407 | command = get_next_command(hc);
|
|---|
| 408 | assert(command);
|
|---|
| 409 |
|
|---|
| 410 | command_trb = command->trb;
|
|---|
| 411 |
|
|---|
| 412 | code = XHCI_DWORD_EXTRACT(trb->status, 31, 24);
|
|---|
| 413 | command->status = code;
|
|---|
| 414 |
|
|---|
| 415 | slot_id = XHCI_DWORD_EXTRACT(trb->control, 31, 24);
|
|---|
| 416 | command->slot_id = slot_id;
|
|---|
| 417 |
|
|---|
| 418 | usb_log_debug2("Completed command trb:");
|
|---|
| 419 | xhci_dump_trb(command_trb);
|
|---|
| 420 | if (TRB_TYPE(*command_trb) != XHCI_TRB_TYPE_NO_OP_CMD) {
|
|---|
| 421 | if (code != XHCI_TRBC_SUCCESS) {
|
|---|
| 422 | report_error(code);
|
|---|
| 423 | xhci_dump_trb(command_trb);
|
|---|
| 424 | }
|
|---|
| 425 | }
|
|---|
| 426 |
|
|---|
| 427 | switch (TRB_TYPE(*command_trb)) {
|
|---|
| 428 | case XHCI_TRB_TYPE_NO_OP_CMD:
|
|---|
| 429 | assert(code = XHCI_TRBC_TRB_ERROR);
|
|---|
| 430 | break;
|
|---|
| 431 | case XHCI_TRB_TYPE_ENABLE_SLOT_CMD:
|
|---|
| 432 | break;
|
|---|
| 433 | case XHCI_TRB_TYPE_DISABLE_SLOT_CMD:
|
|---|
| 434 | break;
|
|---|
| 435 | case XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD:
|
|---|
| 436 | break;
|
|---|
| 437 | case XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD:
|
|---|
| 438 | break;
|
|---|
| 439 | case XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD:
|
|---|
| 440 | break;
|
|---|
| 441 | case XHCI_TRB_TYPE_RESET_ENDPOINT_CMD:
|
|---|
| 442 | break;
|
|---|
| 443 | case XHCI_TRB_TYPE_STOP_ENDPOINT_CMD:
|
|---|
| 444 | // Note: If the endpoint was in the middle of a transfer, then the xHC
|
|---|
| 445 | // will add a Transfer TRB before the Event TRB, research that and
|
|---|
| 446 | // handle it appropriately!
|
|---|
| 447 | break;
|
|---|
| 448 | case XHCI_TRB_TYPE_RESET_DEVICE_CMD:
|
|---|
| 449 | break;
|
|---|
| 450 | default:
|
|---|
| 451 | usb_log_debug2("Unsupported command trb.");
|
|---|
| 452 | xhci_dump_trb(command_trb);
|
|---|
| 453 |
|
|---|
| 454 | command->completed = true;
|
|---|
| 455 | return ENAK;
|
|---|
| 456 | }
|
|---|
| 457 |
|
|---|
| 458 | command->completed = true;
|
|---|
| 459 |
|
|---|
| 460 | if (!command->has_owner) {
|
|---|
| 461 | xhci_free_command(command);
|
|---|
| 462 | } else {
|
|---|
| 463 | /* Copy the trb for later use so that we can free space on the cmd ring. */
|
|---|
| 464 | command->trb = malloc32(sizeof(xhci_trb_t));
|
|---|
| 465 | xhci_trb_copy(command->trb, command_trb);
|
|---|
| 466 | }
|
|---|
| 467 |
|
|---|
| 468 | return EOK;
|
|---|
| 469 | }
|
|---|
| 470 |
|
|---|
| 471 |
|
|---|
| 472 | /**
|
|---|
| 473 | * @}
|
|---|
| 474 | */
|
|---|