source: mainline/uspace/drv/bus/usb/xhci/commands.c@ 61e27e80

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 61e27e80 was d2c3dcd, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

xhci commands: wait if the ring is full
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1/*
2 * Copyright (c) 2017 Jaroslav Jindrak
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbxhci
30 * @{
31 */
32/** @file
33 * @brief Command sending functions.
34 */
35
36#include <errno.h>
37#include <str_error.h>
38#include <usb/debug.h>
39#include "commands.h"
40#include "debug.h"
41#include "hc.h"
42#include "hw_struct/context.h"
43#include "hw_struct/trb.h"
44
45#define TRB_SET_TCS(trb, tcs) (trb).control |= host2xhci(32, ((tcs &0x1) << 9))
46#define TRB_SET_TYPE(trb, type) (trb).control |= host2xhci(32, (type) << 10)
47#define TRB_SET_DC(trb, dc) (trb).control |= host2xhci(32, (dc) << 9)
48#define TRB_SET_EP(trb, ep) (trb).control |= host2xhci(32, ((ep) & 0x5) << 16)
49#define TRB_SET_STREAM(trb, st) (trb).control |= host2xhci(32, ((st) & 0xFFFF) << 16)
50#define TRB_SET_SUSP(trb, susp) (trb).control |= host2xhci(32, ((susp) & 0x1) << 23)
51#define TRB_SET_SLOT(trb, slot) (trb).control |= host2xhci(32, (slot) << 24)
52#define TRB_SET_DEV_SPEED(trb, speed) (trb).control |= host2xhci(32, (speed & 0xF) << 16)
53
54/**
55 * TODO: Not sure about SCT and DCS (see section 6.4.3.9).
56 */
57#define TRB_SET_DEQUEUE_PTR(trb, dptr) (trb).parameter |= host2xhci(64, (dptr))
58#define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(64, (phys) & (~0xF))
59
60#define TRB_GET_CODE(trb) XHCI_DWORD_EXTRACT((trb).status, 31, 24)
61#define TRB_GET_SLOT(trb) XHCI_DWORD_EXTRACT((trb).control, 31, 24)
62#define TRB_GET_PHYS(trb) (XHCI_QWORD_EXTRACT((trb).parameter, 63, 4) << 4)
63
64/* Control functions */
65
66static xhci_cmd_ring_t *get_cmd_ring(xhci_hc_t *hc)
67{
68 assert(hc);
69 return &hc->cr;
70}
71
72/**
73 * Initialize the command subsystem. Allocates the comand ring.
74 *
75 * Does not configure the CR pointer to the hardware, because the xHC will be
76 * reset before starting.
77 */
78int xhci_init_commands(xhci_hc_t *hc)
79{
80 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
81 int err;
82
83 if ((err = xhci_trb_ring_init(&cr->trb_ring)))
84 return err;
85
86 fibril_mutex_initialize(&cr->guard);
87 fibril_condvar_initialize(&cr->state_cv);
88 fibril_condvar_initialize(&cr->stopped_cv);
89
90 list_initialize(&cr->cmd_list);
91
92 cr->state = XHCI_CR_STATE_OPEN;
93
94 return EOK;
95}
96
97/**
98 * Finish the command subsystem. Stops the hardware from running commands, then
99 * deallocates the ring.
100 */
101void xhci_fini_commands(xhci_hc_t *hc)
102{
103 assert(hc);
104 xhci_stop_command_ring(hc);
105
106 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
107
108 fibril_mutex_lock(&cr->guard);
109 xhci_trb_ring_fini(&cr->trb_ring);
110 fibril_mutex_unlock(&cr->guard);
111}
112
113/**
114 * Initialize a command structure for the given command.
115 */
116void xhci_cmd_init(xhci_cmd_t *cmd, xhci_cmd_type_t type)
117{
118 memset(cmd, 0, sizeof(*cmd));
119
120 link_initialize(&cmd->_header.link);
121
122 fibril_mutex_initialize(&cmd->_header.completed_mtx);
123 fibril_condvar_initialize(&cmd->_header.completed_cv);
124
125 cmd->_header.cmd = type;
126}
127
128/**
129 * Finish the command structure. Some command invocation includes allocating
130 * a context structure. To have the convenience in calling commands, this
131 * method deallocates all resources.
132 */
133void xhci_cmd_fini(xhci_cmd_t *cmd)
134{
135 list_remove(&cmd->_header.link);
136
137 dma_buffer_free(&cmd->input_ctx);
138 dma_buffer_free(&cmd->bandwidth_ctx);
139
140 if (cmd->_header.async) {
141 free(cmd);
142 }
143}
144
145/**
146 * Find a command issued by TRB at @c phys inside the command list.
147 *
148 * Call with guard locked only.
149 */
150static inline xhci_cmd_t *find_command(xhci_hc_t *hc, uint64_t phys)
151{
152 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
153 assert(fibril_mutex_is_locked(&cr->guard));
154
155 link_t *cmd_link = list_first(&cr->cmd_list);
156
157 while (cmd_link != NULL) {
158 xhci_cmd_t *cmd = list_get_instance(cmd_link, xhci_cmd_t, _header.link);
159
160 if (cmd->_header.trb_phys == phys)
161 break;
162
163 cmd_link = list_next(cmd_link, &cr->cmd_list);
164 }
165
166 return cmd_link ? list_get_instance(cmd_link, xhci_cmd_t, _header.link)
167 : NULL;
168}
169
170static void cr_set_state(xhci_cmd_ring_t *cr, xhci_cr_state_t state)
171{
172 assert(fibril_mutex_is_locked(&cr->guard));
173
174 cr->state = state;
175 if (state == XHCI_CR_STATE_OPEN
176 || state == XHCI_CR_STATE_CLOSED)
177 fibril_condvar_broadcast(&cr->state_cv);
178}
179
180static int wait_for_ring_open(xhci_cmd_ring_t *cr)
181{
182 assert(fibril_mutex_is_locked(&cr->guard));
183
184 while (true) {
185 switch (cr->state) {
186 case XHCI_CR_STATE_CHANGING:
187 case XHCI_CR_STATE_FULL:
188 fibril_condvar_wait(&cr->state_cv, &cr->guard);
189 break;
190 case XHCI_CR_STATE_OPEN:
191 return EOK;
192 case XHCI_CR_STATE_CLOSED:
193 return ENAK;
194 }
195 }
196}
197
198/**
199 * Enqueue a command on the TRB ring. Ring the doorbell to initiate processing.
200 * Register the command as waiting for completion inside the command list.
201 */
202static inline int enqueue_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
203{
204 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
205 assert(cmd);
206
207 fibril_mutex_lock(&cr->guard);
208
209 if (wait_for_ring_open(cr)) {
210 fibril_mutex_unlock(&cr->guard);
211 return ENAK;
212 }
213
214 usb_log_debug("Sending command %s", xhci_trb_str_type(TRB_TYPE(cmd->_header.trb)));
215
216 list_append(&cmd->_header.link, &cr->cmd_list);
217
218 int err = EOK;
219 while (err == EOK) {
220 err = xhci_trb_ring_enqueue(&cr->trb_ring,
221 &cmd->_header.trb, &cmd->_header.trb_phys);
222 if (err != EAGAIN)
223 break;
224
225 cr_set_state(cr, XHCI_CR_STATE_FULL);
226 err = wait_for_ring_open(cr);
227 }
228
229 if (err == EOK)
230 hc_ring_doorbell(hc, 0, 0);
231
232 fibril_mutex_unlock(&cr->guard);
233
234 return err;
235}
236
237/**
238 * Stop the command ring. Stop processing commands, block issuing new ones.
239 * Wait until hardware acknowledges it is stopped.
240 */
241void xhci_stop_command_ring(xhci_hc_t *hc)
242{
243 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
244
245 fibril_mutex_lock(&cr->guard);
246
247 // Prevent others from starting CR again.
248 cr_set_state(cr, XHCI_CR_STATE_CLOSED);
249
250 XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
251 XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0); // Some systems (incl. QEMU) require 64-bit write
252
253 while (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR))
254 fibril_condvar_wait(&cr->stopped_cv, &cr->guard);
255
256 fibril_mutex_unlock(&cr->guard);
257}
258
259/**
260 * Abort currently processed command. Note that it is only aborted when the
261 * command is "blocking" - see section 4.6.1.2 of xHCI spec.
262 */
263static void abort_command_ring(xhci_hc_t *hc)
264{
265 XHCI_REG_WR(hc->op_regs, XHCI_OP_CA, 1);
266 XHCI_REG_SET(hc->op_regs, XHCI_OP_CRCR_HI, 0); // Some systems (incl. QEMU) require 64-bit write
267}
268
269static const char *trb_codes [] = {
270#define TRBC(t) [XHCI_TRBC_##t] = #t
271 TRBC(INVALID),
272 TRBC(SUCCESS),
273 TRBC(DATA_BUFFER_ERROR),
274 TRBC(BABBLE_DETECTED_ERROR),
275 TRBC(USB_TRANSACTION_ERROR),
276 TRBC(TRB_ERROR),
277 TRBC(STALL_ERROR),
278 TRBC(RESOURCE_ERROR),
279 TRBC(BANDWIDTH_ERROR),
280 TRBC(NO_SLOTS_ERROR),
281 TRBC(INVALID_STREAM_ERROR),
282 TRBC(SLOT_NOT_ENABLED_ERROR),
283 TRBC(EP_NOT_ENABLED_ERROR),
284 TRBC(SHORT_PACKET),
285 TRBC(RING_UNDERRUN),
286 TRBC(RING_OVERRUN),
287 TRBC(VF_EVENT_RING_FULL),
288 TRBC(PARAMETER_ERROR),
289 TRBC(BANDWIDTH_OVERRUN_ERROR),
290 TRBC(CONTEXT_STATE_ERROR),
291 TRBC(NO_PING_RESPONSE_ERROR),
292 TRBC(EVENT_RING_FULL_ERROR),
293 TRBC(INCOMPATIBLE_DEVICE_ERROR),
294 TRBC(MISSED_SERVICE_ERROR),
295 TRBC(COMMAND_RING_STOPPED),
296 TRBC(COMMAND_ABORTED),
297 TRBC(STOPPED),
298 TRBC(STOPPED_LENGTH_INVALID),
299 TRBC(STOPPED_SHORT_PACKET),
300 TRBC(MAX_EXIT_LATENCY_TOO_LARGE_ERROR),
301 [30] = "<reserved>",
302 TRBC(ISOCH_BUFFER_OVERRUN),
303 TRBC(EVENT_LOST_ERROR),
304 TRBC(UNDEFINED_ERROR),
305 TRBC(INVALID_STREAM_ID_ERROR),
306 TRBC(SECONDARY_BANDWIDTH_ERROR),
307 TRBC(SPLIT_TRANSACTION_ERROR),
308 [XHCI_TRBC_MAX] = NULL
309#undef TRBC
310};
311
312/**
313 * Report an error according to command completion code.
314 */
315static void report_error(int code)
316{
317 if (code < XHCI_TRBC_MAX && trb_codes[code] != NULL)
318 usb_log_error("Command resulted in error: %s.", trb_codes[code]);
319 else
320 usb_log_error("Command resulted in reserved or vendor specific error.");
321}
322
323/**
324 * Handle a command completion. Feed the fibril waiting for result.
325 *
326 * @param trb The COMMAND_COMPLETION TRB found in event ring.
327 */
328int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
329{
330 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
331 assert(trb);
332
333 fibril_mutex_lock(&cr->guard);
334
335 int code = TRB_GET_CODE(*trb);
336
337 if (code == XHCI_TRBC_COMMAND_RING_STOPPED) {
338 /* This can either mean that the ring is being stopped, or
339 * a command was aborted. In either way, wake threads waiting
340 * on stopped_cv.
341 *
342 * Note that we need to hold mutex, because we must be sure the
343 * requesting thread is waiting inside the CV.
344 */
345 usb_log_debug2("Command ring stopped.");
346 fibril_condvar_broadcast(&cr->stopped_cv);
347 fibril_mutex_unlock(&cr->guard);
348 return EOK;
349 }
350
351 const uint64_t phys = TRB_GET_PHYS(*trb);
352 xhci_trb_ring_update_dequeue(&cr->trb_ring, phys);
353
354 if (cr->state == XHCI_CR_STATE_FULL)
355 cr_set_state(cr, XHCI_CR_STATE_OPEN);
356
357 xhci_cmd_t *command = find_command(hc, phys);
358 if (command == NULL) {
359 usb_log_error("No command struct for completion event found.");
360
361 if (code != XHCI_TRBC_SUCCESS)
362 report_error(code);
363
364 return EOK;
365 }
366
367 list_remove(&command->_header.link);
368
369 /* Semantics of NO_OP_CMD is that success is marked as a TRB error. */
370 if (command->_header.cmd == XHCI_CMD_NO_OP && code == XHCI_TRBC_TRB_ERROR)
371 code = XHCI_TRBC_SUCCESS;
372
373 command->status = code;
374 command->slot_id = TRB_GET_SLOT(*trb);
375
376 usb_log_debug("Completed command %s", xhci_trb_str_type(TRB_TYPE(command->_header.trb)));
377
378 if (code != XHCI_TRBC_SUCCESS) {
379 report_error(code);
380 xhci_dump_trb(&command->_header.trb);
381 }
382
383 fibril_mutex_unlock(&cr->guard);
384
385 fibril_mutex_lock(&command->_header.completed_mtx);
386 command->_header.completed = true;
387 fibril_condvar_broadcast(&command->_header.completed_cv);
388 fibril_mutex_unlock(&command->_header.completed_mtx);
389
390 if (command->_header.async) {
391 /* Free the command and other DS upon completion. */
392 xhci_cmd_fini(command);
393 }
394
395 return EOK;
396}
397
398/* Command-issuing functions */
399
400static int no_op_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
401{
402 assert(hc);
403
404 xhci_trb_clean(&cmd->_header.trb);
405
406 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_NO_OP_CMD);
407
408 return enqueue_command(hc, cmd);
409}
410
411static int enable_slot_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
412{
413 assert(hc);
414
415 xhci_trb_clean(&cmd->_header.trb);
416
417 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ENABLE_SLOT_CMD);
418 cmd->_header.trb.control |= host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
419
420 return enqueue_command(hc, cmd);
421}
422
423static int disable_slot_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
424{
425 assert(hc);
426 assert(cmd);
427
428 xhci_trb_clean(&cmd->_header.trb);
429
430 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_DISABLE_SLOT_CMD);
431 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
432
433 return enqueue_command(hc, cmd);
434}
435
436static int address_device_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
437{
438 assert(hc);
439 assert(cmd);
440 assert(dma_buffer_is_set(&cmd->input_ctx));
441
442 /**
443 * TODO: Requirements for this command:
444 * dcbaa[slot_id] is properly sized and initialized
445 * ictx has valids slot context and endpoint 0, all
446 * other should be ignored at this point (see section 4.6.5).
447 */
448
449 xhci_trb_clean(&cmd->_header.trb);
450
451 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
452
453 /**
454 * Note: According to section 6.4.3.4, we can set the 9th bit
455 * of the control field of the trb (BSR) to 1 and then the xHC
456 * will not issue the SET_ADDRESS request to the USB device.
457 * This can be used to provide compatibility with legacy USB devices
458 * that require their device descriptor to be read before such request.
459 */
460 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD);
461 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
462
463 return enqueue_command(hc, cmd);
464}
465
466static int configure_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
467{
468 assert(hc);
469 assert(cmd);
470
471 xhci_trb_clean(&cmd->_header.trb);
472
473 if (!cmd->deconfigure) {
474 /* If the DC flag is on, input context is not evaluated. */
475 assert(dma_buffer_is_set(&cmd->input_ctx));
476
477 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
478 }
479
480 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD);
481 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
482 TRB_SET_DC(cmd->_header.trb, cmd->deconfigure);
483
484 return enqueue_command(hc, cmd);
485}
486
487static int evaluate_context_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
488{
489 assert(hc);
490 assert(cmd);
491 assert(dma_buffer_is_set(&cmd->input_ctx));
492
493 /**
494 * Note: All Drop Context flags of the input context shall be 0,
495 * all Add Context flags shall be initialize to indicate IDs
496 * of the contexts affected by the command.
497 * Refer to sections 6.2.2.3 and 6.3.3.3 for further info.
498 */
499 xhci_trb_clean(&cmd->_header.trb);
500
501 TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
502
503 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD);
504 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
505
506 return enqueue_command(hc, cmd);
507}
508
509static int reset_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
510{
511 assert(hc);
512 assert(cmd);
513
514 /**
515 * Note: TCS can have values 0 or 1. If it is set to 0, see sectuon 4.5.8 for
516 * information about this flag.
517 */
518 xhci_trb_clean(&cmd->_header.trb);
519
520 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD);
521 TRB_SET_TCS(cmd->_header.trb, cmd->tcs);
522 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
523 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
524
525 return enqueue_command(hc, cmd);
526}
527
528static int stop_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
529{
530 assert(hc);
531 assert(cmd);
532
533 xhci_trb_clean(&cmd->_header.trb);
534
535 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_STOP_ENDPOINT_CMD);
536 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
537 TRB_SET_SUSP(cmd->_header.trb, cmd->susp);
538 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
539
540 return enqueue_command(hc, cmd);
541}
542
543static int set_tr_dequeue_pointer_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
544{
545 assert(hc);
546 assert(cmd);
547
548 xhci_trb_clean(&cmd->_header.trb);
549
550 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_SET_TR_DEQUEUE_POINTER_CMD);
551 TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
552 TRB_SET_STREAM(cmd->_header.trb, cmd->stream_id);
553 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
554 TRB_SET_DEQUEUE_PTR(cmd->_header.trb, cmd->dequeue_ptr);
555
556 /**
557 * TODO: Set DCS (see section 4.6.10).
558 */
559
560 return enqueue_command(hc, cmd);
561}
562
563static int reset_device_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
564{
565 assert(hc);
566 assert(cmd);
567
568 xhci_trb_clean(&cmd->_header.trb);
569
570 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_DEVICE_CMD);
571 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
572
573 return enqueue_command(hc, cmd);
574}
575
576static int get_port_bandwidth_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
577{
578 assert(hc);
579 assert(cmd);
580
581 xhci_trb_clean(&cmd->_header.trb);
582
583 TRB_SET_ICTX(cmd->_header.trb, cmd->bandwidth_ctx.phys);
584
585 TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_GET_PORT_BANDWIDTH_CMD);
586 TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
587 TRB_SET_DEV_SPEED(cmd->_header.trb, cmd->device_speed);
588
589 return enqueue_command(hc, cmd);
590}
591
592/* The table of command-issuing functions. */
593
594typedef int (*cmd_handler) (xhci_hc_t *hc, xhci_cmd_t *cmd);
595
596static cmd_handler cmd_handlers [] = {
597 [XHCI_CMD_ENABLE_SLOT] = enable_slot_cmd,
598 [XHCI_CMD_DISABLE_SLOT] = disable_slot_cmd,
599 [XHCI_CMD_ADDRESS_DEVICE] = address_device_cmd,
600 [XHCI_CMD_CONFIGURE_ENDPOINT] = configure_endpoint_cmd,
601 [XHCI_CMD_EVALUATE_CONTEXT] = evaluate_context_cmd,
602 [XHCI_CMD_RESET_ENDPOINT] = reset_endpoint_cmd,
603 [XHCI_CMD_STOP_ENDPOINT] = stop_endpoint_cmd,
604 [XHCI_CMD_SET_TR_DEQUEUE_POINTER] = set_tr_dequeue_pointer_cmd,
605 [XHCI_CMD_RESET_DEVICE] = reset_device_cmd,
606 [XHCI_CMD_FORCE_EVENT] = NULL,
607 [XHCI_CMD_NEGOTIATE_BANDWIDTH] = NULL,
608 [XHCI_CMD_SET_LATENCY_TOLERANCE_VALUE] = NULL,
609 [XHCI_CMD_GET_PORT_BANDWIDTH] = get_port_bandwidth_cmd,
610 [XHCI_CMD_FORCE_HEADER] = NULL,
611 [XHCI_CMD_NO_OP] = no_op_cmd
612};
613
614/**
615 * Try to abort currently processed command. This is tricky, because
616 * calling fibril is not necessarily the one which issued the blocked command.
617 * Also, the trickiness intensifies by the fact that stopping a CR is denoted by
618 * event, which is again handled in different fibril. but, once we go to sleep
619 * on waiting for that event, another fibril may wake up and try to abort the
620 * blocked command.
621 *
622 * So, we mark the command ring as being restarted, wait for it to stop, and
623 * then start it again. If there was a blocked command, it will be satisfied by
624 * COMMAND_ABORTED event.
625 */
626static int try_abort_current_command(xhci_hc_t *hc)
627{
628 xhci_cmd_ring_t *cr = get_cmd_ring(hc);
629
630 fibril_mutex_lock(&cr->guard);
631
632 if (cr->state == XHCI_CR_STATE_CLOSED) {
633 fibril_mutex_unlock(&cr->guard);
634 return ENAK;
635 }
636
637 if (cr->state == XHCI_CR_STATE_CHANGING) {
638 fibril_mutex_unlock(&cr->guard);
639 return EOK;
640 }
641
642 usb_log_error("Timeout while waiting for command: aborting current command.");
643
644 cr_set_state(cr, XHCI_CR_STATE_CHANGING);
645
646 abort_command_ring(hc);
647
648 fibril_condvar_wait_timeout(&cr->stopped_cv, &cr->guard, XHCI_CR_ABORT_TIMEOUT);
649
650 if (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR)) {
651 /* 4.6.1.2, implementation note
652 * Assume there are larger problems with HC and
653 * reset it.
654 */
655 usb_log_error("Command didn't abort.");
656
657 cr_set_state(cr, XHCI_CR_STATE_CLOSED);
658
659 // TODO: Reset HC completely.
660 // Don't forget to somehow complete all commands with error.
661
662 fibril_mutex_unlock(&cr->guard);
663 return ENAK;
664 }
665
666 cr_set_state(cr, XHCI_CR_STATE_OPEN);
667
668 fibril_mutex_unlock(&cr->guard);
669
670 usb_log_error("Command ring stopped. Starting again.");
671 hc_ring_doorbell(hc, 0, 0);
672
673 return EOK;
674}
675
676/**
677 * Wait, until the command is completed. The completion is triggered by
678 * COMMAND_COMPLETION event. As we do not want to rely on HW completing the
679 * command in timely manner, we timeout. Note that we can't just return an
680 * error after the timeout pass - it may be other command blocking the ring,
681 * and ours can be completed afterwards. Therefore, it is not guaranteed that
682 * this function will return in XHCI_COMMAND_TIMEOUT. It will continue waiting
683 * until COMMAND_COMPLETION event arrives.
684 */
685static int wait_for_cmd_completion(xhci_hc_t *hc, xhci_cmd_t *cmd)
686{
687 int rv = EOK;
688
689 if (fibril_get_id() == hc->event_handler) {
690 usb_log_error("Deadlock detected in waiting for command.");
691 abort();
692 }
693
694 fibril_mutex_lock(&cmd->_header.completed_mtx);
695 while (!cmd->_header.completed) {
696
697 rv = fibril_condvar_wait_timeout(&cmd->_header.completed_cv, &cmd->_header.completed_mtx, XHCI_COMMAND_TIMEOUT);
698
699 /* The waiting timed out. Current command (not necessarily
700 * ours) is probably blocked.
701 */
702 if (!cmd->_header.completed && rv == ETIMEOUT) {
703 fibril_mutex_unlock(&cmd->_header.completed_mtx);
704
705 rv = try_abort_current_command(hc);
706 if (rv)
707 return rv;
708
709 fibril_mutex_lock(&cmd->_header.completed_mtx);
710 }
711 }
712 fibril_mutex_unlock(&cmd->_header.completed_mtx);
713
714 return rv;
715}
716
717/**
718 * Issue command and block the current fibril until it is completed or timeout
719 * expires. Nothing is deallocated. Caller should always execute `xhci_cmd_fini`.
720 */
721int xhci_cmd_sync(xhci_hc_t *hc, xhci_cmd_t *cmd)
722{
723 assert(hc);
724 assert(cmd);
725
726 int err;
727
728 if (!cmd_handlers[cmd->_header.cmd]) {
729 /* Handler not implemented. */
730 return ENOTSUP;
731 }
732
733 if ((err = cmd_handlers[cmd->_header.cmd](hc, cmd))) {
734 /* Command could not be issued. */
735 return err;
736 }
737
738 if ((err = wait_for_cmd_completion(hc, cmd))) {
739 /* Command failed. */
740 return err;
741 }
742
743 switch (cmd->status) {
744 case XHCI_TRBC_SUCCESS:
745 return EOK;
746 case XHCI_TRBC_USB_TRANSACTION_ERROR:
747 return ESTALL;
748 default:
749 return EINVAL;
750 }
751}
752
753/**
754 * Does the same thing as `xhci_cmd_sync` and executes `xhci_cmd_fini`. This
755 * is a useful shorthand for issuing commands without out parameters.
756 */
757int xhci_cmd_sync_fini(xhci_hc_t *hc, xhci_cmd_t *cmd)
758{
759 const int err = xhci_cmd_sync(hc, cmd);
760 xhci_cmd_fini(cmd);
761
762 return err;
763}
764
765/**
766 * Does the same thing as `xhci_cmd_sync_fini` without blocking the current
767 * fibril. The command is copied to stack memory and `fini` is called upon its completion.
768 */
769int xhci_cmd_async_fini(xhci_hc_t *hc, xhci_cmd_t *stack_cmd)
770{
771 assert(hc);
772 assert(stack_cmd);
773
774 /* Save the command for later. */
775 xhci_cmd_t *heap_cmd = (xhci_cmd_t *) malloc(sizeof(xhci_cmd_t));
776 if (!heap_cmd) {
777 return ENOMEM;
778 }
779
780 /* TODO: Is this good for the mutex and the condvar? */
781 memcpy(heap_cmd, stack_cmd, sizeof(xhci_cmd_t));
782 heap_cmd->_header.async = true;
783
784 /* Issue the command. */
785 int err;
786
787 if (!cmd_handlers[heap_cmd->_header.cmd]) {
788 /* Handler not implemented. */
789 err = ENOTSUP;
790 goto err_heap_cmd;
791 }
792
793 if ((err = cmd_handlers[heap_cmd->_header.cmd](hc, heap_cmd))) {
794 /* Command could not be issued. */
795 goto err_heap_cmd;
796 }
797
798 return EOK;
799
800err_heap_cmd:
801 free(heap_cmd);
802 return err;
803}
804
805/**
806 * @}
807 */
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